54LS164/DM54LS164/DM74LS164 8-Bit Serial In/Parallel Out Shift Registers General Description Features These 8-bit shift registers feature gated serial inputs and an asynchronous clear. A low logic level at either input inhibits entry of the new data, and resets the first flip-flop to the low level at the next clock pulse, thus providing complete control over incoming data. A high logic level on either input enables the other input, which will then determine the state of the first flip-flop. Data at the serial inputs may be changed while the clock is high or low, but only information meeting the setup and hold time requirements will be entered. Clocking occurs on the low-to-high level transition of the clock input. All inputs are diode-clamped to minimize transmission-line effects. Y Connection Diagram Function Table Y Y Y Y Y Gated (enable/disable) serial inputs Fully buffered clock and serial inputs Asynchronous clear Typical clock frequency 36 MHz Typical power dissipation 80 mW Alternate Military/Aerospace device (54LS164) is available. Contact a National Semiconductor Sales Office/ Distributor for specifications. Dual-In-Line Package Inputs Outputs Clear Clock A B QA QB ... QH L H H H H X L X X H L X X X H X L L QA0 H L L L QB0 QAn QAn QAn ... ... ... ... ... L QH0 QGn QGn QGn u u u H e High Level (steady state), L e Low Level (steady state) X e Don’t Care (any input, including transitions) u e Transition from low to high level QA0, QB0, QH0 e The level of QA, QB, or QH, respectively, before the indicated steady-state input conditions were established. QAn, QGn e The level of QA or QG before the most recent the clock; indicates a one-bit shift. u transition of TL/F/6398 – 1 Order Number 54LS164DMQB, 54LS164FMQB, 54LS164LMQB, DM54LS164J, DM54LS164W, DM74LS164M or DM74LS164N See NS Package Number E20A, J14A, M14A, N14A or W14B Logic Diagram TL/F/6398 – 2 C1995 National Semiconductor Corporation TL/F/6398 RRD-B30M105/Printed in U. S. A. 54LS164/DM54LS164/DM74LS164 8-Bit Serial In/Parallel Out Shift Registers June 1989 Absolute Maximum Ratings (Note) Note: The ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the ‘‘Electrical Characteristics’’ table are not guaranteed at the absolute maximum ratings. The ‘‘Recommended Operating Conditions’’ tables will define the conditions for actual device operation. If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage 7V Input Voltage 7V Operating Free Air Temperature Range b 55§ C to a 125§ C DM54LS and 54LS DM74LS 0§ C to a 70§ C Storage Temperature Range b 65§ C to a 150§ C Recommended Operating Conditions Symbol DM54LS164 Parameter DM74LS164 Units Min Nom Max Min Nom Max 4.5 5 5.5 4.75 5 5.25 V 0.7 0.8 V mA VCC Supply Voltage VIH High Level Input Voltage VIL Low Level Input Voltage IOH High Level Output Current b 0.4 b 0.4 IOL Low Level Output Current 4 8 mA fCLK Clock Frequency (Note 4) 0 25 MHz tW Pulse Width (Note 4) Clock 20 20 Clear 20 20 2 2 25 V 0 ns tSU Data Setup Time (Note 4) 17 17 ns tH Data Hold Time (Note 4) 5 5 ns tREL Clear Release Time (Note 4) 30 30 TA Free Air Operating Temperature b 55 125 ns 0 70 §C Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol Parameter VI Input Clamp Voltage VOH High Level Output Voltage VOL Low Level Output Voltage Min Typ (Note 1) DM54 2.5 3.4 DM74 2.7 3.4 Conditions VCC e Min, II e b18 mA VCC e Min, IOH e Max Max Units b 1.5 V V VIL e Max, VIH e Min VCC e Min, IOL e Max VIL e Max, VIH e Min DM54 0.25 0.4 DM74 0.35 0.5 IOL e 4 mA, VCC e Min DM74 0.25 0.4 V II Input Current @ Max Input Voltage VCC e Max, VI e 7V IIH High Level Input Current VCC e Max, VI e 2.7V 20 mA IIL Low Level Input Current VCC e Max, VI e 0.4V b 0.4 mA IOS Short Circuit Output Current VCC e Max (Note 2) Supply Current VCC e Max (Note 3) ICC 0.1 DM54 b 20 b 100 DM74 b 20 b 100 16 27 mA mA mA Note 1: All typicals are at VCC e 5V, TA e 25§ C. Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second. Note 3: ICC is measured with all outputs open, the SERIAL input grounded, the CLOCK input at 2.4V, and a momentary ground, then 4.5V, applied to the CLEAR input. Note 4: TA e 25§ C and VCC e 5V. 2 Switching Characteristics Symbol Parameter at VCC e 5V and TA e 25§ C (See Section 1 for Test Waveforms and Output Load) From (Input) To (Output) RL e 2 kX CL e 15 pF Min Max CL e 50 pF Min Units Max fMAX Maximum Clock Frequency tPLH Propagation Delay Time Low to High Level Output Clock to Output 25 MHz 27 30 ns tPHL Propagation Delay Time High to Low Level Output Clock to Output 32 40 ns tPHL Propagation Delay Time High to Low Level Output Clear to Output 36 45 ns Timing Diagram TL/F/6398 – 3 3 Physical Dimensions inches (millimeters) Ceramic Leadless Chip Carrier Package (E) Order Number 54LS164LMQB NS Package Number E20A 14-Lead Ceramic Dual-In-Line Package (J) Order Number 54LS164DMQB or DM54LS164J NS Package Number J14A 4 Physical Dimensions inches (millimeters) (Continued) 14-Lead Small Outline Molded Package (M) Order Number DM74LS164M NS Package Number M14A 14-Lead Molded Dual-In-Line Package (N) Order Number DM74LS164N NS Package Number N14A 5 54LS164/DM54LS164/DM74LS164 8-Bit Serial In/Parallel Out Shift Registers Physical Dimensions inches (millimeters) (Continued) 14-Lead Ceramic Flat Package (W) Order Number 54LS164FMQB or DM54LS164W NS Package Number W14B LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. 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