PTB48500, PTB48501, PTB48502 Dual-Output, 48-V Input Isolated DC/DC Converter for xDSL SLTS218B - SEPTEMBER 2003 - REVISED NOVEMBER 2004 Features • Dual Outputs (Independently Regulated) • Input Voltage Range: 36 V to 75 V • Power-up/Down Sequencing • 1500 VDC Isolation • Over-Current Protection • Over-Temperature Shutdown • Under-Voltage Lockout • • • • Fixed Frequency Operation Temp Range: –40 to 100 °C Industry Standard Outline Operates with PTB4851x for Complete AC7 Power Solution • Powers up to 64 DSL Ports • Safety Approvals: UL/cUL 60950 EN 60950 Description Pin Configuration The PTB4850x power modules are a dual-output isolated DC/DC converter, designed to provide the logic supply voltages for AC-7 based xDSL applications. The PTB48500 is rated for 13 A of total output current, making it suitable for 32-channel xDSL applications. The PTB48501 and PTB48502 provide output current for powering up to 64 xDSL channels. The PTB48501 is rated for 16.5 A total output current, and the PTB48502, 21 A. The PTB48502 incorporates 10 W of additional capacity for powering peripheral circuitry. Any of these converters can be used for other applications with similar power requirements. The modules operate from a standard telecom (-48 V) central office (CO) supply and include an “on/off” enable control, output current limit, over-temperature protection, input under-voltage lockout (UVLO). The PTB48500 and PTB48501 also incorporates a power-up reset (POR) output. The modules are designed to operate with one of the PTB4851x DC/DC converter modules. The combination of a PTB4850x and PTB4851x converter provides the complete the power supply for an AC7 chipset. The “EN Out” and “Sync Out” pins provide compatible output signals for controlling both the power up sequence and switching frequency of the PTB48510. The PTB4850x modules employ double-sided surface mount construction, and are an industry standard size. Pin 1 2 3 4 5 6 7 8 9 10 Function +VI Sync Out Enable # EN Out –V I +V O 2 COM POR* / COM † Vo2 Adjust +V O 1 Shaded functions indicate signals that are referenced to –V I. # Denotes positive logic: Open = Normal operation –VI = Outputs Off * Denotes negative logic: High = Normal operation Low = Reset † This pin is COM on the PTB48502 Stand-Alone Application +V I Sync Out 1 EN Out +VI 2 4 * Pin 8 is ‘COM’ on PTB48502 PTB4850x POR –VI Vo 1 5 –VI Vo 2 3 Vo2 Adj 10 6 Vo 1 Vo 2 9 L O A D Enable COM For technical support and further information visit http://power.ti.com (8) * 7, (8) * COM L O A D PTB48500, PTB48501, PTB48502 Dual-Output, 48-V Input Isolated DC/DC Converter for xDSL SLTS218B - SEPTEMBER 2003 - REVISED NOVEMBER 2004 Ordering Information Base Part No. (PTB4850❒xxx) Output Voltage (PTB4850x❒xx) Package Options (PT4850xx❒❒) Order Prefix PTB48500xxx PTB48501xxx PTB48502xx Code A Description 13 A (32-Ports) 16.5 A (48/64-Ports) 21 A (64-Ports + 10 W) Voltage 3.3 V / 1.2 V Code AH AS Description Horiz. T/H SMD, Standard (2) Pkg Ref. (1) (ERH) (ERJ) Notes: (1) Reference the applicable package reference drawing for the dimensions and PC board layout (2) “Standard” option specifies 63/37, Sn/Pb pin solder material. Pin Descriptions +VI: The positive input supply for the module with respect to –Vin. When powering the module from a –48 V telecom central office supply, this input is connected to the primary system ground. –VI: The negative input supply for the module, and the 0 VDC reference for the ‘Enable’, ‘EN Out’, and ‘Sync Out’ signals. When the module is powered from a +48-V supply, this input is connected to the 48-V Return. VO 1: The higher regulated power output voltage, which is referenced to the COM node. V0 2: The lower regulated power output voltage, which is referenced to the COM node. COM: The secondary return reference for the module’s two regulated output voltages. It is dc isolated from the input supply pins. VO 2 Adjust: Using a single resistor, this pin allows Vo2 to be adjusted higher or lower than the preset value. If not used, this pin should be left open circuit. Enable: This is an open-collector (open-drain) positive logic input that enables the module output. This pin is referenced to -Vin. A logic ‘0’ at this pin disables the module’s outputs, and a high impedance enables the outputs. If not used the pin should be left unconnected. Environmental and General Specifications EN Out: This open-collector output may be used to enable the output of other DC/DC converters in applications where the power-up sequence of the related voltages must be precisely controlled. The output is used principally to control the startup up of a PTB4851xx module when powering ADSL circuits based on the AC7 chipset. The signal is referenced to -Vin, and is active low. It is initially ‘off’ (high impedance), and turns ‘on’ when the output voltage, Vo1, has risen to its nominal set-point voltage. Sync Out: The signal generated by this pin is designed to be used exclusively with the PTB48510 in AC7 ADSL applications. When the ‘Sync Out’ of this converter is connected directly to the ‘Sync In’ pin of the PTB48510, both modules will operate at the same switch conversion frequency. POR*: (Available to PTB48500 and PTB48501 only!) This pin produces an active-low power-on reset signal that may be used to reset logic circuitry. The output is set low during power up just as the output voltage from Vo1 starts to rise. It remains low for 10 ms after the voltage at Vo1 has reached its nominal set-point voltage. This signal is referenced to the COM node, and has a 3.3-kΩ internal pull-up resistor to Vo1. (Unless otherwise stated, all voltages are with respect to –V in ) Characteristics Symbols Conditions Min Typ Max Units Input Voltage Range Isolation Voltage Capacitance Resistance Operating Temperature Range Over-Temperature Protection Vin 36 1500 — 10 –40 — — 48 — 1500 — — 115 10 Treflow Ts –40 — 75 — — — +85 — — 235 (i) 125 VDC V pF MΩ °C Solder Reflow Temperature Storage Temperature Mechanical Shock Over output load range Input–output/input–case Input to output Input to output Over Vin Range Shutdown threshold Hysterisis Surface temperature of module body or pins — Per Mil-STD-883D, Method 2002.3 1 msec, ½ Sine, mounted Mil-STD-883D, Method 2007.2 Suffix H 20-2000 Hz Suffix C — 500 — G’s — — — 20 5 20 — — — grams Ta OTP Mechanical Vibration Weight Flammability — — °C °C °C G’s Meets UL 94V-O Notes: (i) During reflow of SMD package version do not elevate peak temperature of the module, pins or internal components above the stated maximum. For technical support and further information visit http://power.ti.com PTB48500 Dual-Output, 48-V Input Isolated DC/DC Converter for xDSL Specifications SLTS218B - SEPTEMBER 2003 - REVISED NOVEMBER 2004 (Unless otherwise stated, TA =25°C, V I =48 V, CI =0µF, CO =0 µF, and IO =50% I omax) Characteristic Symbol Output Power Po1, Po2 Output Current Po total Io1, Io2 Both outputs Over VI range Temperature Variation Io1 + Io2 Vo1 Vo2 ∆Regtemp Total (both outputs) Inlcudes set point, line, load, –40 ≤ TA ≤ +85°C –40° ≤TA ≤ +85°C, IO =IO min Line Regulation Load Regulation Cross Regulation ∆Regline ∆Regload ∆Regcross Efficiency Vo Ripple (pk-pk) η Vr Over VI range Over IO range IO min ≤ Io2 ≤ Iomax, Io1 =1 A IO min ≤ Io1 ≤ Iomax, Io2 =1 A Io1, Io2 =Iomax 20 MHz bandwidth Transient Response ttr ∆Vtr Iotrip Output Voltage Over Current Threshold Output Voltage Adjust Range Switching Frequency Under-Voltage Lockout On/Off Enable (pin 3) Input High Voltage Input Low Voltage Input Low Current Standby Input Current Internal Input Capacitance External Output Capacitance Reliability Vadj ƒs VI on VI off VIH VIL IIL II standby CI Co1 Co2 MTBF Conditions Min Vo1 (3.3 V) Vo2 (1.2 V) Vo1 (3.3 V) Vo2 (1.2 V) Vo1 Vo2 Vo1, Vo2 Vo1, Vo2 ∆Vo1 ∆Vo2 Vo1 Vo2 1 A/µs load step, 50% to 100% Iomax Vo1, Vo2 over/undershoot VI =36 V, Io1 + Io2 reset followed by auto-recovery Vo2 only Over VI and IO ranges VI increasing VI decreasing Referenced to –VI (pin 5) pins 3 & 5 connected Per Telcordia SR-332 50% stress, TA =40°C, ground benign PTB48500A Typ Max Units — — — 0 0 0 3.2 1.16 — — — — — — — — — — — — — — — — — 3.3 1.2 ±0.5 ±0.8 ±1 ±3 — — 82 20 20 30 ±2.0 19.8 8.4 28 6 (1) 7 (1) 13 3.4 1.24 — — ±10 ±12 10 10 — 50 50 — — W 13.5 16 — A -10 500 — — — 550 34 32 +20 600 — — %Vo kHz +3.6 –0.2 — — — 0 (3) 0 (3) — — –1 2 2 — — +75 (2) +0.8 — — — 5,000 5,000 V 1.5 — — W A A V %Vo mV mV mV % mVpp µs %Vo V mA mA µF µF 106 Hrs Notes: (1) See Safe Operating Area curves or contact the factory for the appropriate derating. (2) The On/Off Enable (pin 3) has an internal pull-up and may be controlled with an open-collector (or open-drain) transistor. The input is diode protected and may be connected to +V I. The maximum open-circuit voltage is 7 V. If it is left open circuit the converter will operate when input power is applied. (3) An output capacitor is not required. For technical support and further information visit http://power.ti.com PTB48500 Typical Characteristics Dual-Output, 48-V Input Isolated DC/DC Converter for xDSL SLTS218B - SEPTEMBER 2003 - REVISED NOVEMBER 2004 PTB48500A Characteristic Data (See Note A) Safe Operating Area PTB48500A Efficiency vs Load Current (See Note B) (See Note C) VIN =48 VDC (See Note B) 100 90 Efficiency - % VIN 80 48 V 36 V 75 V 70 60 Ambient Temperature (°C) 80 90 Airflow 70 400LFM 200LFM 100LFM Nat Conv 60 50 40 30 50 20 0 2 4 6 8 10 12 0 Io1 + Io2 (A) 5 10 15 20 25 30 Total Output Power (W) Power Dissipation vs Load Current (See Note B) 10 8 Pd - Watts VIN 6 48 V 36 V 75 V 4 2 0 0 2 4 6 8 10 12 Io1 + Io2 (A) Cross Regulation, ∆ Vox vs Ioy @Iox =1 A & V IN =48 V Cross Regulation ∆Vo (mV) 6 4 2 Vo1 vs Io2 Vo2 vs Io1 0 -2 -4 -6 0 1 2 3 4 5 6 7 Io1 : Io2 (A) Note A: Characteristic data has been developed from actual products tested at 25°C. This data is considered typical data for the converter. Note B: Load current is increased proportionally from both outputs, up to the respective maximum value of each output. Note C: SOA curves represent the conditions at which internal components are at or below the manufacturer’s maximum operating temperatures. Derating limits apply to modules soldered directly to a 4 in. × 4 in. double-sided PCB with 1 oz. copper. For technical support and further information visit http://power.ti.com PTB48501 Dual-Output, 48-V Input Isolated DC/DC Converter for xDSL Specifications SLTS218B - SEPTEMBER 2003 - REVISED NOVEMBER 2004 (Unless otherwise stated, TA =25°C, V I =48 V, CI =0 µF, CO =0 µF, and Io =50% I O max) Characteristic Symbol Output Power Po1, Po2 Output Current Po total Io1, Io2 Both outputs Over VI range Temperature Variation Io1 + Io2 Vo1 Vo2 ∆Regtemp Total (both outputs) Inlcudes set point, line, load, –40 ≤ TA ≤ +85°C –40° ≤TA ≤ +85°C, IO =IO min Line Regulation Load Regulation Cross Regulation ∆Regline ∆Regload ∆Regcross Efficiency Vo Ripple (pk-pk) η Vr Over VI range Over Io range IO min ≤ Io2 ≤ Iomax, Io1 =1 A IO min ≤ Io1 ≤ Iomax, Io2 =1 A Io1, Io2 =Iomax 20 MHz bandwidth Transient Response ttr ∆Vtr IO trip Output Voltage Over Current Threshold Output Voltage Adjust Range Switching Frequency Under-Voltage Lockout On/Off Enable (pin 3) Input High Voltage Input Low Voltage Input Low Current Standby Input Current Internal Input Capacitance External Output Capacitance Reliability Vadj ƒs VI on VI off VIH VIL IIL II standby CI Co1 Co2 MTBF Conditions Min Vo1 (3.3 V) Vo2 (1.2 V) Vo1 (3.3 V) Vo2 (1.2 V) Vo1 Vo2 Vo1, Vo2 Vo1, Vo2 ∆Vo1 ∆Vo2 Vo1 Vo2 1 A/µs load step, 50% to 100% Iomax Vo1, Vo2 over/undershoot VI =36V, Io1 + Io2 reset followed by auto-recovery Vo2 only Over VI and IO ranges VI increasing VI decreasing Referenced to –VI (pin 5) pins 3 & 5 connected Per Telcordia SR-332 50% stress, TA =40°C, ground benign PTB48501A Typ Max Units — — — 0 0 0 3.2 1.16 — — — — — — — — — — — — — — — — — 3.3 1.2 ±0.5 ±0.8 ±1 ±3 — — 81 20 20 30 ±2.0 19.8 12.6 32.4 6 (1) 10.5 (1) 16.5 3.4 1.24 — — ±10 ±12 10 10 — 50 50 — — — 24 — A –20 500 — — — 550 34 32 +10 600 — — %Vo kHz +3.6 –0.2 — — — 0 (3) 0 (3) — — –1 2 2 — — +75 (2) +0.8 — — — 5,000 5,000 1.5 — — W W A A V %Vo mV mV mV % mVpp µs %Vo V V mA mA µF µF 106 Hrs Notes: (1) See Safe Operating Area curves or contact the factory for the appropriate derating. (2) The On/Off Enable (pin 3) has an internal pull-up and may be controlled with an open-collector (or open-drain) transistor. The input is diode protected and may be connected to +V I. The maximum open-circuit voltage is 7 V. If it is left open circuit the converter will operate when input power is applied. (3) An output capacitor is not required. For technical support and further information visit http://power.ti.com PTB48501 Typical Characteristics Dual-Output, 48-V Input Isolated DC/DC Converter for xDSL SLTS218B - SEPTEMBER 2003 - REVISED NOVEMBER 2004 PTB48501A Characteristic Data (See Note A) Safe Operating Area PTB48501A Efficiency vs Load Current (See Note B) (See Note C) VIN =48 VDC (See Note B) 100 90 Efficiency - % VIN 80 36 V 48 V 75 V 70 60 Ambient Temperature (°C) 80 90 Airflow 70 400LFM 200LFM 100LFM Nat conv 60 50 40 30 50 20 0 3 6 9 12 15 18 0 Io1 + Io2 (A) 8 16 24 32 Output Power (W) Power Dissipation vs Load Current (See Note B) 12 10 Pd - Watts 8 48 V 36 V 75 V 6 4 2 0 0 3 6 9 12 15 18 Io1 + Io2 (A) Cross Regulation, ∆ Vox vs Ioy @Iox =1 A & VIN =48 V Cross Regulation VO (mV) 6 4 2 Vo1 vs Io2 Vo2 vs Io1 0 -2 -4 -6 0 2 4 6 8 10 12 Io1 : Io2 (A) Note A: Characteristic data has been developed from actual products tested at 25°C. This data is considered typical data for the converter. Note B: Load current is increased proportionally from both outputs, up to the respective maximum value of each output. Note C: SOA curves represent the conditions at which internal components are at or below the manufacturer’s maximum operating temperatures. Derating limits apply to modules soldered directly to a 4 in. × 4 in. double-sided PCB with 1 oz. copper. For technical support and further information visit http://power.ti.com PTB48502 Dual-Output, 48-V Input Isolated DC/DC Converter for xDSL Specifications SLTS218B - SEPTEMBER 2003 - REVISED NOVEMBER 2004 (Unless otherwise stated, TA =25°C, VI =48 V, CI =0 µF, C O =0 µF, and IO =50% I O max) Characteristic Symbol Output Power Po1, Po2 Output Current Po total Io1, Io2 Both outputs Over Vin range Temperature Variation Io1 + Io2 Vo1 Vo2 ∆Regtemp Total (both outputs) Inlcudes set point, line, load, –40 ≤ TA ≤ +85 °C –40° ≤TA ≤ +85°C, Io =Iomin Line Regulation Load Regulation Cross Regulation ∆Regline ∆Regload ∆Regcross Efficiency Vo Ripple (pk-pk) η Vr Over VI range Over IO range IO min ≤ Io2 ≤ Iomax, Io1 =1 A IO min ≤ Io1 ≤ Iomax, Io2 =1 A Io1, Io2 =Iomax 20 MHz bandwidth Transient Response ttr ∆Vtr Iotrip Output Voltage Over Current Threshold Output Voltage Adjust Range Switching Frequency Under-Voltage Lockout On/Off Enable (pin 3) Input High Voltage Input Low Voltage Input Low Current Standby Input Current Internal Input Capacitance External Output Capacitance Reliability Vadj ƒs VI on VI off VIH VIL IIL II standby CI Co1 Co2 MTBF Conditions Min Vo1 (3.3 V) Vo2 (1.2 V) Vo1 (3.3 V) Vo2 (1.2 V) Vo1 Vo2 Vo1, Vo2 Vo1, Vo2 ∆Vo1 ∆Vo2 Vo1 Vo2 1 A/µs load step, 50% to 100% Iomax Vo1, Vo2 over/undershoot VI =36V, Io1 + Io2 reset followed by auto-recovery Vo2 only Over VI and Io ranges VI increasing VI decreasing Referenced to –VI (pin 5) pins 3 & 5 connected Per Telcordia SR-332 50% stress, TA =40°C, ground benign PTB48502A Typ Max Units — — — 0 0 0 3.2 1.16 — — — — — — — — — — — — — — — — — 3.3 1.2 ±0.5 ±0.8 ±1 ±3 — — 82 20 20 30 ±2.0 33 15.6 45 10 (1) 13 (1) 21 3.4 1.24 — — ±10 ±12 10 10 — 50 50 — — W — 24 — A –20 500 — — — 550 34 32 +10 600 — — %Vo kHz +3.6 –0.2 — — — 0 (3) 0 (3) — — –1 2 2 — — +75 (2) +0.8 — — — 5,000 5,000 1.5 — — W A A V %Vo mV mV mV % mVpp µs %Vo V V mA mA µF µF 106 Hrs Notes: (1) See Safe Operating Area curves or contact the factory for the appropriate derating. (2) The On/Off Enable (pin 3) has an internal pull-up and may be controlled with an open-collector (or open-drain) transistor. The input is diode protected and may be connected to +V I. The maximum open-circuit voltage is 7 V. If it is left open circuit the converter will operate when input power is applied. (3) An output capacitor is not required. For technical support and further information visit http://power.ti.com PTB48502 Typical Characteristics Dual-Output, 48-V Input Isolated DC/DC Converter for xDSL SLTS218B - SEPTEMBER 2003 - REVISED NOVEMBER 2004 PTB48502A Characteristic Data (See Note A) [Io1 =10 A, Io2 =10 A represents 100% load] PTB48502A Characteristic Data (See Note A) [Io1 =8 A, Io2 =13 A represents 100% load] Efficiency vs Load Current (See Note B) Efficiency vs Load Current (See Note B) 100 100 90 VI 80 36 V 48 V 75 V 70 Efficiency - % Efficiency - % 90 60 VI 80 36 V 48 V 75 V 70 60 50 50 0 20 40 60 80 100 0 20 40 Output Load – % 12 10 10 VI 8 75 V 48 V 36 V 6 4 2 100 VI 8 75 V 48 V 36 V 6 4 2 0 0 0 20 40 60 80 100 0 20 40 Output Load – % 60 80 100 Output Load – % Cross Regulation, ∆Vx vs. ∆Vy @Io x =1 A & VI =48 V Cross Regulation, ∆Vx vs. ∆Vy @Io x =1 A & VI =48 V 6 6 4 4 2 Vo1 vs Io2 Vo2 vs Io1 0 -2 -4 Cross Regulation VO – (mV) Cross Regulation VO – (mV) 80 Power Dissipation vs Load Current (See Note B) 12 Power Dissipation – W Power Dissipation – W Power Dissipation vs Load Current (See Note B) 2 Vo1 vs Io2 Vo2 vs Io1 0 -2 -4 -6 -6 0 2 4 6 8 0 10 2 4 6 8 10 12 Io1 : Io2 – (A) Io1 : Io2 – (A) Safe Operating Area, VIN =48 V (See Notes B, C) Safe Operating Area, V IN =48 V (See Notes B, C) 90 90 80 Airflow 70 400LFM 200LFM 100LFM Nat conv 60 50 40 30 Ambient Temperature – °C 80 Ambient Temperature – °C 60 Output Load – % Airflow 70 400LFM 200LFM 100LFM Nat conv 60 50 40 30 20 20 0 10 20 30 40 50 60 Output Load – % 70 80 90 100 0 10 20 30 40 50 60 70 80 90 100 Output Load – % Note A: Characteristic data has been developed from actual products tested at 25°C. This data is considered typical data for the converter. Note B: Load current is increased proportionally from both outputs, up to the indicated maximum value of each respective output. Note C: SOA curves represent the conditions at which internal components are at or below the manufacturer’s maximum operating temperatures. Derating limits apply to modules soldered directly to a 4 in. × 4 in. double-sided PCB with 1 oz. copper. For technical support and further information visit http://power.ti.com Application Notes PTB48500, PTB48501, & PTB48502 Adjusting the Lower Output Voltage of the PTB4850x Series of DC/DC Converters The PTB4850x series of DC/DC converters are designed to produce two logic-level supply voltages for use with the AC-7 ADSL chipset. The magnitude of lowest output voltage (Vo2 ) can be adjusted higher or lower by up to +10% or –20% of the nominal. The adjustment method uses a single external resistor. 1 The value of the resistor determines the amount of adjustment, and its placement determines whether the voltage is increased or decreased. The resistor values can be calculated using the appropriate formula (see below), or simply selected from the range of values given in Table 1-2. The placement of each resistor is as follows. Adjust Up: To increase the magnitude of both output voltages, place a resistor R1 between Vo2 Adj (pin 9) and the Vo2 (pin 6) voltage rail; see Figure 1-1(a). Figure 1-1a PTB4850x +VO Vo2 6 R1 Adjust Up Vo2 Adj COM 9 Calculation of Resistor Adjust Values The value of the adjust resistor is calculated using one of the following equations. Use the equation for R1 to adjust up, or (R2) to adjust down. = Rp · Va (Va – Vo ) – Rs kΩ (R2) [Adj Down] = Rn · Va (Vo – Va ) – Rs kΩ R1 [Adjust Up] Where: Vo Va Rp Rn Rs = = = = = Magitude of the original output voltage Magnitude of the adjusted voltage Adjust-up constant from Table 1-1 Adjust-down constant from Table 1-1 Internal series resistor from Table 1-1 Table 1-1 ADJUSTMENT RANGE AND FORMULA PARAMETERS Part No. PTB48500(1)A PTB48502A Vo(nom) Va(min) Va(max) Ω) Rp (kΩ Ω) Rn (kΩ Ω) Rs (kΩ 1.2 V 0.96 V 1.32 V 1.648 4.624 18.2 1.2 V 0.84 V 1.32 V 1.196 3.598 13.0 7 Notes: 1. A 0.05 W rated resistor may be used. The tolerance should be 1%, with a temperature stability of 100 ppm/°C or better. Place the resistor in either the R1 or (R 2) location, as close to the converter as possible. Adjust Down: To decrease the magnitude of both output voltages, add a resistor (R2), between Vo 2 Adj (pin 9) and the COM (pin 7) voltage rail; see Figure 1-1(b). Figure 1-1b PTB4850x +VO Vo2 Vo2 Adj 6 9 (R2) Adj Down COM 7 For technical support and further information visit http://power.ti.com 2. Never connect capacitors to the Vo 2 Adj pin. Capacitance added to this pin can affect the stability of the regulated output. Application Notes continued PTB48500, PTB48501, & PTB48502 Table 1-2 ADJUST RESISTOR VALUES Part No. % Adjust Va (V) PTB4850xA R1 / (R2) –21 0.848 N/A –20 0.960 (0.3) kΩ –19 0.972 (1.5) kΩ –18 0.984 (2.9) kΩ –17 0.996 (4.4) kΩ –16 1.008 (6.1) kΩ –15 1.020 (8.0) kΩ –14 1.032 (10.2) kΩ –13 1.044 (12.7) kΩ –12 1.056 (15.7) kΩ –11 1.068 (19.2) kΩ –10 1.080 (23.4) kΩ – 9 1.092 (28.6) kΩ – 8 1.104 (35) kΩ – 7 1.116 (43.2) kΩ – 6 1.128 (54.2) kΩ – 5 1.140 (69.7) kΩ – 4 1.152 (92.8) kΩ – 3 1.164 (131) kΩ – 2 1.176 (208) kΩ – 1 1.188 (440) kΩ 0 1.200 + 1 1.212 148 kΩ + 2 1.224 65.8 kΩ + 3 1.236 38.4 kΩ + 4 1.248 24.6 kΩ + 5 1.260 16.4 kΩ + 6 1.272 10.9 kΩ + 7 1.284 7 kΩ + 8 1.296 4.1 kΩ + 9 1.308 1.8 kΩ +10 1.320 0 kΩ R1 =Adjust up, (R 2) =Adjust down PTB48502A R1 / (R2) (0.5) kΩ (1.4) kΩ (2.3) kΩ (3.4) kΩ (4.6) kΩ (5.9) kΩ (7.4) kΩ (9.1) kΩ (11.1) kΩ (13.4) kΩ (16.1) kΩ (19.4) kΩ (23.4) kΩ (28.4) kΩ (34.8) kΩ (43.4) kΩ (55.4) kΩ (73.4) kΩ (103.0) kΩ (163.0) kΩ (343.0) kΩ 108.0 kΩ 48.0 kΩ 28.1 kΩ 18.1 kΩ 12.1 kΩ 8.1 kΩ 5.3 kΩ 3.2 kΩ 1.5 kΩ 0.2 kΩ For technical support and further information visit http://power.ti.com Application Notes PTB4850x & PTB4851x Configuring the PTB4850x & PTB4851x DC/DC Converters for DSL Applications Power-Up Sequencing The desired power-up sequence for the AC7 supply voltages requires that the two logic-level voltages from the PTB4850x converter rise to regulation prior to the two complementary voltages that power the transceiver ICs. This sequence cannot be guaranteed if the PTB4850x and PTB4851x are allowed to power up independently, especially if the 48-V input voltage rises relatively slowly. To ensure the desired power-up sequence, the “EN Out” pin of the PTB4850x is directly connected to the activelow “Enable” input of the PTB4851x (see Figure 2-1). This allows the PTB4850x to momentarily hold off the outputs from the PTB4851x until the logic-level voltages have risen first. Figure 2-2 shows the power-up waveforms of all four supply voltages from the schematic of Figure 2-1. When operated as a pair, the PTB4850x and PTB4851x converters are specifically designed to provide all the required supply voltages for powering xDSL chipsets. The PTB4850x produces two logic voltages. They include a 3.3-V source for logic and I/O, and a low-voltage for powering a digital signal processor core. The PTB4851x produces a balanced pair of complementary supply voltages that is required for the xDSL transceiver ICs. When used together in these types of applications, the PTB4850x and PTB4851x may be configured for power-up sequencing, and also synchronized to a common switch conversion frequency. Figure 2-1 shows the required cross-connects between the two converters to enable these two features. Figure 2-2; Power-Up Sequencing Waveforms Switching Frequency Synchronization Unsynchronized, the difference in switch frequency introduces a beat frequency into the input and output AC ripple components from the converters. The beat frequency can vary considerably with any slight variation in either converter’s switch frequency. This results in a variable and undefined frequency spectrum for the ripple waveforms, which would normally require separate filters at the input of each converter. When the switch frequency of the converters are synchronized, the ripple components are constrained to the fundamental and higher. This simplifies the design of the output filters, and allows a common filter to be specified for the treatment of input ripple. VCCIO (1 V/Div) VCORE (1 V/Div) +VTCVR (5 V/Div) –VTCVR (5 V/Div) HORIZ SCALE: 10 ms/Div Figure 2-1; Example of PTB4850x & PTB4851x Modules Configured for DSL Applications –48 V RTN Vo 2 Adj +V I + Input Filter –48 V – PTB4850xA Vo 1 VCCIO Vo2 VCORE Enable –VI COM EN Out Sync Out Sync In ±Vo Adj +V I +V o +VTCVR PTB4851xA COM Enable –VI –Vo –VTCVR For technical support and further information visit http://power.ti.com IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. 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