TPS62240, TPS62242, TPS62243 www.ti.com SLVS762B – JUNE 2007 – REVISED SEPTEMBER 2007 2.25 MHz 300 mA Step Down Converter in 2x2SON/TSOT23 Package FEATURES 1 • High Efficiency Step Down Converter • Output Current up to 300 mA • VIN Range From 2 V to 6 V for Li-Ion Batteries With Extended Voltage Range • 2.25 MHz Fixed Frequency Operation • Power Save Mode at Light Load Currents • Output Voltage Accuracy in PWM Mode ±1.5% • Adjustable Output Voltage from 0.6 V to VIN • Typical 15 µA Quiescent Current • 100% Duty Cycle for Lowest Dropout • Available in a TSOT23 and 2×2×0,8 mm SON • Allows < 1 mm Solution Height 23 APPLICATIONS TPS62243DRV VIN CIN 4.7µF With an input voltage range of 2 V to 6 V, the device supports applications powered by Li-Ion batteries with extended voltage range, two- and three-cell alkaline, 3.3-V and 5-V input voltage rails. The TPS62240 operates at 2.25 MHz fixed switching frequency and enters Power Save Mode operation at light load currents to maintain high efficiency over the entire load current range. The Power Save Mode is optimized for low output voltage ripple. For low noise applications, the device can be forced into fixed frequency PWM mode by pulling the MODE pin high. In the shutdown mode, the current consumption is reduced to less than 1 µA. TPS62240 allows the use of small inductors and capacitors to achieve a small solution size. Bluetooth™ Headset Cell Phones, Smart-phones WLAN PDAs, Pocket PCs Low Power DSP Supply Portable Media Players Digital Cameras VIN 2.0V to 6V The TPS62240 device is a high efficiency synchronous step down dc-dc converter optimized for battery powered portable applications. It provides up to 300 mA output current from a single Li-Ion cell and is ideal to power portable applications like mobile phones and other portable equipment.. The TPS62240 is available in a 5-pin TSOT23 and 6-pin 2mm×2mm SON package. L1 2.2µH SW 100 VOUT 1.8V Up to 300mA 90 80 EN GND FB MODE COUT 10µF Efficiency - % • • • • • • • DESCRIPTION VI = 2 V VI = 2 V VI = 2.7 VI = 4.5 VI = 3 V 70 VI = 3.6 60 50 VI = 4.5 40 30 VO = 1.8 V, MODE = GND, L = 2.2 mH, DCR 110 mΩ 20 10 0 0.01 0.1 1 10 100 1000 IO - Output Current - mA 1 2 3 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a trademark of Texas Instruments. Bluetooth is a trademark of Bluetooth SIG, Inc.. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2007, Texas Instruments Incorporated TPS62240, TPS62242, TPS62243 www.ti.com SLVS762B – JUNE 2007 – REVISED SEPTEMBER 2007 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION TA PART NUMBER –40°C to 85°C (1) (2) (3) (1) OUTPUT VOLTAGE (2) PACKAGE (3) PACKAGE DESIGNATOR ORDERING PACKAGE MARKING TPS62240 adjustable TSOT23-5 DDC TPS62240DDC BYO TPS62240 adjustable SON 2x2 -6 DRV TPS62240DRV BYJ TPS62242 1.2V fixed output voltage SON 2x2 -6 DRV TPS62242DRV CCY TPS62243 1.8V fixed output voltage SON 2x2 -6 DRV TPS62243DRV CBQ The DDC (TSOT-23-5) and DRV (SON2x2) package are available in tape on reel. Add R suffix to order quantities of 3000 parts per reel. Contact TI for other fixed output voltage options. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) VI VALUE UNIT –0.3 to 7 V –0.3 to VIN +0.3, ≤7 V –0.3 to 7 V Internally limited A Input voltage range (2) Voltage range at EN, MODE Voltage on SW Peak output current ESD rating (3) HBM Human body model 2 CDM Charge device model 1 Machine model kV 200 V TJ Maximum operating junction temperature -40 to 125 °C Tstg Storage temperature range -65 to 150 °C (1) (2) (3) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability. All voltage values are with respect to network ground terminal. The human body model is a 100-pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200-pF capacitor discharged directly into each pin. DISSIPATION RATINGS POWER RATING FOR TA ≤ 25°C DERATING FACTOR ABOVE TA = 25°C PACKAGE RθJA DDC 250°C/W 400 mW 4 mW/°C DRV 76°C/W 1300 mW 13 mW/°C RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range (unless otherwise noted) MIN VI MAX UNIT 2 6 Output voltage range for adjustable voltage 0.6 VIN V TA Operating ambient temperature –40 85 °C TJ Operating junction temperature –40 125 °C 2 Supply voltage, VIN NOM Submit Documentation Feedback V Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPS62240 TPS62242 TPS62243 TPS62240, TPS62242, TPS62243 www.ti.com SLVS762B – JUNE 2007 – REVISED SEPTEMBER 2007 ELECTRICAL CHARACTERISTICS Over full operating ambient temperature range, typical values are at TA = 25°C. Unless otherwise noted, specifications apply for condition VIN = EN = 3.6V. External components CIN = 4,7µF 0603, COUT = 10µF 0603, L = 2.2µH, refer to parameter measurement information. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SUPPLY VIN Input voltage range IOUT 2 Output current IQ Operating quiescent current ISD Shutdown current UVLO Undervoltage lockout threshold 6 2.3 V ≤ VIN ≤ 6 V 300 2 V ≤ VIN ≤ 2.3 V 150 IOUT = 0 mA. PFM mode enabled (MODE = GND) device not switching 15 IOUT = 0 mA. PFM mode enabled (MODE = GND) device switching, VOUT = 1.8 V, (1) 18.5 IOUT = 0 mA, switching with no load (MODE = VIN), PWM operation , VOUT = 1.8 V, VIN = 3 V 3.8 EN = GND 0.1 V mA µA Falling 1.85 Rising 1.95 mA 1 µA V ENABLE, MODE VIH High level input voltage, EN, MODE 2 V ≤ VIN ≤ 6 V 1 VIN VIL Low level input voltage, EN, MODE 2 V ≤ VIN ≤ 6 V 0 0.4 V IIN Input bias current, EN, MODE EN, MODE = GND or VIN 0.01 1 µA 240 480 180 380 0.7 0.84 V POWER SWITCH RDS(on) High side MOSFET on-resistance Low side MOSFET on-resistance VIN = VGS = 3.6 V, TA = 25°C mΩ ILIMF Forward current limit MOSFET high-side and low side VIN = VGS = 3.6 V TSD Thermal shutdown Increasing junction temperature 140 °C Thermal shutdown hysteresis Decreasing junction temperature 20 °C 0.56 A OSCILLATOR fSW 2 V ≤ VIN ≤ 6 V Oscillator frequency 2 2.25 2.5 MHz OUTPUT VOUT Adjustable output voltage range Vref Reference Voltage VFB 0.6 VIN 600 Feedback voltage MODE = VIN, PWM operation, 2 V ≤ VIN ≤ 6 V, in fixed output voltage versions VFB = VOUT, See (2) Feedback voltage PFM mode MODE = GND, device in PFM mode –1.5% 0% 1.5% 0% Load regulation -0.5 %/A µs tStart Up Start-up Time Time from active EN to reach 95% of VOUT nominal 500 tRamp VOUT ramp UP time Time to ramp from 5% to 95% of VOUT 250 Ilkg Leakage current into SW pin VIN = 3.6 V, VIN = VOUT = VSW, EN = GND, (3) 0.1 (1) (2) (3) V mV µs 1 µA See the parameter measurement information. for VIN = VO + 0.6 In fixed output voltage versions, the internal resistor divider network is disconnected from FB pin. Copyright © 2007, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TPS62240 TPS62242 TPS62243 3 TPS62240, TPS62242, TPS62243 www.ti.com SLVS762B – JUNE 2007 – REVISED SEPTEMBER 2007 PIN ASSIGNMENTS DRV PACKAGE (TOP VIEW) DDC PACKAGE (TOP VIEW) VIN GND EN SW 5 1 SW MODE FB 2 2 3 FB 4 3 1 we Po 6 AD P 5 r 4 GND VIN EN TERMINAL FUNCTIONS TERMINAL NO. (SON) NO. TSTO23-5 I/O VIN 5 1 PWR VIN power supply pin. GND 6 2 PWR GND supply pin EN 4 3 I SW 1 5 OUT FB 3 4 I Feedback Pin for the internal regulation loop. Connect the external resistor divider to this pin. In case of fixed output voltage option, connect this pin directly to the output capacitor. MODE 2 I This pin is only available at SON package option. MODE pin = high forces the device to operate in fixed frequency PWM mode. MODE pin = low enables the Power Save Mode with automatic transition from PFM mode to fixed frequency PWM mode. NAME DESCRIPTION This is the enable pin of the device. Pulling this pin to low forces the device into shutdown mode. Pulling this pin to high enables the device. This pin must be terminated. This is the switch pin and is connected to the internal MOSFET switches. Connect the inductor to this terminal. FUNCTIONAL BLOCK DIAGRAM VIN Current Limit Comparator VIN Undervoltage Lockout 1.8V Thermal Shutdown Limit High Side EN PFM Comparator Reference 0.6V VREF FB VREF Only in 2x2SON Mode MODE Softstart VOUT RAMP CONTROL Control Stage Error Amp . Gate Driver AntiShoot-Through SW1 VREF Integrator FB FB Zero-Pole AMP. PWM Comp. Limit Low Side RI 1 RI3 RI..N Sawtooth Generator Int. Resistor Network GND Current Limit Comparator 2.25 MHz Oscillator GND 4 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPS62240 TPS62242 TPS62243 TPS62240, TPS62242, TPS62243 www.ti.com SLVS762B – JUNE 2007 – REVISED SEPTEMBER 2007 PARAMETER MEASUREMENT INFORMATION TPS62240DVR V IN CIN L 2.2 mH SW R1 EN 4.7 mF VOUT C1 22 pF 10 mF FB GND COUT R2 MODE L: LPS3015 2.2 mH, 110 mW CIN GRM188R60J475K 4.7 mF Murata 0603 size COUT GRM188R60J106M 10 mF Murata 0603 size TYPICAL CHARACTERISTICS Table of Graphs FIGURE Efficiency Output voltage accuracy vs Output current, Power Save Mode Figure 1 vs Output current, Forced PWM Mode Figure 2 vs Output current Figure 3 vs Output current Figure 4 vs Output current, TA = 25°C, Mode = GND Figure 5 vs Output current, TA = –40°C, Mode = GND Figure 6 vs Output current, TA = 85°C, Mode = GND Figure 7 vs Output current, TA = 25°C, Mode = VI Figure 8 vs Output current, TA = 85°C, Mode = GND Figure 9 vs Output current, TA = –40°C, Mode = VI Figure 10 Startup timing Figure 11 PWM Mode with VO = 1.8V Figure 12 PFM Mode with VO = 1.8V Figure 13 PFM Mode Ripple Figure 14 1 mA to 50 mA with VO = 1.8V Figure 15 20 mA to 200 mA with VO = 1.8V Figure 16 50 mA to 200 mA with VO = 1.8V Figure 17 IO = 50 mA, 3.6V to 4.2V Figure 18 IO= 250 mA, 3.6V to 4.2V Figure 19 PFM to PWM Figure 20 PWM to PFM Figure 21 Shutdown Current into VIN vs Input Voltage, (TA = 85°C, TA = 25°C, TA = -40°C) Figure 22 Quiescent Current vs Input Voltage, (TA = 85°C, TA = 25°C, TA = -40°C) Figure 23 Static Drain-Source On-State Resistance vs Input Voltage, (TA = 85°C, TA = 25°C, TA = -40°C) Typical operation PFM load transient PFM line transient Mode transition Copyright © 2007, Texas Instruments Incorporated Figure 24 Figure 25 Submit Documentation Feedback Product Folder Link(s): TPS62240 TPS62242 TPS62243 5 TPS62240, TPS62242, TPS62243 www.ti.com SLVS762B – JUNE 2007 – REVISED SEPTEMBER 2007 EFFICIENCY (Power Save Mode) vs OUTPUT CURRENT EFFICIENCY (Forced PWM Mode) vs OUTPUT CURRENT 100 100 90 80 VI = 2 V VI = 2 V VI = 2 V VI = 2.7 V 90 VI = 4.5 V VI = 3 V 80 70 VI = 3 V 70 Efficiency - % Efficiency - % VI = 2.7 V VI = 3.6 V 60 50 VI = 4.5 V 40 VI = 4.5 V 60 VI = 3.6 V 50 40 30 30 VO = 1.8 V, MODE = GND, L = 2.2 mH, DCR 110 mΩ 20 10 0 0.01 0.1 1 100 10 20 VO = 1.8 V, MODE = VI, 10 L = 2.2 mH 0 1000 1 IO - Output Current - mA 10 100 IO - Output Current - mA Figure 1. Figure 2. EFFICIENCY vs OUTPUT CURRENT EFFICIENCY vs OUTPUT CURRENT 1000 100 100 90 VI = 2.3 V 90 VI = 2.7 V 80 80 70 70 VI = 2.3 V 60 VI = 2.3 V Efficiency − % Efficiency − % VI = 4.5 V VI = 4.5 V 50 VI = 3.6 V 40 30 L = 2 mH, MIPSA2520 CO = 10 mF 0603 10 0 1 10 100 IO − Output Current − mA VI = 2.7 V 50 40 30 VO = 1.2 V, MODE = VI, 20 VI = 3.6 V 60 1000 VO = 1.2 V, MODE = GND, L = 2 mH, MIPSA2520 CO = 10 mF 0603 20 10 0 0.01 0.1 1 Submit Documentation Feedback 100 1000 IO − Output Current − mA Figure 3. 6 10 Figure 4. Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPS62240 TPS62242 TPS62243 TPS62240, TPS62242, TPS62243 www.ti.com SLVS762B – JUNE 2007 – REVISED SEPTEMBER 2007 OUTPUT VOLTAGE ACCURACY vs OUTPUT CURRENT VO - Output Voltage DC - V 1.86 1.84 1.88 TA = 25°C, VO = 1.8 V, MODE = GND, L = 2.2 mH, CO = 10 mF 1.86 PFM 1.82 PWM 1.8 VI = 2.3 V VI = 2.7 V VI = 3 V VI = 3.6 V 1.78 1.76 VO - Output Voltage DC - V 1.88 OUTPUT VOLTAGE ACCURACY vs OUTPUT CURRENT 0.1 1 10 100 IO - Output Current - mA PWM 1.80 VI = 2.3 V 1.78 VI = 2.7 V VI = 3 V VI = 3.6 V 1.76 VI = 4.5 V 0.1 1 10 100 IO - Output Current - mA 1000 Figure 5. Figure 6. OUTPUT VOLTAGE ACCURACY vs OUTPUT CURRENT OUTPUT VOLTAGE ACCURACY vs OUTPUT CURRENT 1000 1.854 TA = 85°C, VO = 1.8 V, MODE = GND, L = 2.2 mH, CO = 10 mF 1.836 PFM 1.82 PWM 1.8 1.78 1.76 1.74 0.01 VI = 2.3 V VI = 2.7 V VI = 3 V VI = 3.6 V VI = 4.5 V 0.1 VO - Output Voltage DC - V VO - Output Voltage DC - V 1.82 1.74 0.01 1.88 1.84 PFM VI = 4.5 V 1.74 0.01 1.86 1.84 TA = -40°C, VO = 1.8 V, MODE = GND, L = 2.2 mH, CO = 10 mF L = 2.2 mH 1.818 1.8 VI = 2 V 1.782 1.764 1 10 100 IO - Output Current - mA 1000 TA = 25°C, VO = 1.8 V, MODE = VI, 1.746 0.01 VI = 2.7 V VI = 3 V VI = 3.6 V VI = 4.5 V 0.1 1 10 100 IO - Output Current - mA Figure 7. Copyright © 2007, Texas Instruments Incorporated 1000 Figure 8. Submit Documentation Feedback Product Folder Link(s): TPS62240 TPS62242 TPS62243 7 TPS62240, TPS62242, TPS62243 www.ti.com SLVS762B – JUNE 2007 – REVISED SEPTEMBER 2007 OUTPUT VOLTAGE ACCURACY vs OUTPUT CURRENT OUTPUT VOLTAGE ACCURACY vs OUTPUT CURRENT 1.854 1.854 1.836 VO - Output Voltage DC - V VO - Output Voltage DC - V 1.836 TA = 85°C, VO = 1.8 V, MODE = VI, L = 2.2 mH 1.818 1.8 VI = 2 V VI = 2.7 V 1.782 VI = 3 V VI = 3.6 V VI = 4.5 V 1.764 1.746 0.01 EN 2V/Div 0.1 100 10 1 IO - Output Current - mA TA = -40°C, VO = 1.8 V, MODE = VI, L = 2.2 mH 1.818 1.8 VI = 2 V VI = 2.7 V 1.782 VI = 3 V VI = 3.6 V VI = 4.5 V 1.764 1000 1.746 0.01 0.1 1 10 100 IO - Output Current - mA Figure 9. Figure 10. STARTUP TIMING TYPICAL OPERATION vs PWM MODE 1000 VIN 3.6V VOUT 1.8V, IOUT 150mA L 2.2mH, COUT 10mF 0603 VIN = 3.6V RLoad = 10R VOUT = 1.8V IIN into CIN MODE = GND VOUT 10mV/Div SW 2V/Div SW 2V/Div VOUT 2V/Div Icoil 200mA/Div IIN 100mA/Div Time Base - 100ms/Div Time Base - 10ms/Div Figure 11. 8 Submit Documentation Feedback Figure 12. Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPS62240 TPS62242 TPS62243 TPS62240, TPS62242, TPS62243 www.ti.com SLVS762B – JUNE 2007 – REVISED SEPTEMBER 2007 TYPICAL OPERATION vs PFM MODE PFM MODE RIPPLE VIN 3.6V; VOUT 1.8V, IOUT 10mA; L = 4.7mH, COUT = 10mF 0603, MODE = GND VOUT 20mV/Div VOUT 20mV/Div VIN 3.6V VOUT 1.8V, IOUT 10mA L 2.2mH, COUT 10mF 0603 SW 2V/Div SW 2V/Div Icoil 200mA/Div Icoil 200mA/Div Time Base - 2ms/Div Time Base - 10ms/Div Figure 13. Figure 14. PFM LOAD TRANSIENT PFM LOAD TRANSIENT VOUT 50mV/Div VOUT 50mV/Div IOUT 50mA/Div VIN 3.6V VOUT 1.8V IOUT 1mA to 50mA MODE = GND 50mA IOUT 200mA/Div 200mA VIN 3.6V VOUT 1.8V IOUT 20mA to 200mA MODE = GND 20mA 1mA Icoil 200mA/Div Icoil 200mA/Div Time Base - 100ms/Div Time base - 40ms/Div Figure 15. Copyright © 2007, Texas Instruments Incorporated Figure 16. Submit Documentation Feedback Product Folder Link(s): TPS62240 TPS62242 TPS62243 9 TPS62240, TPS62242, TPS62243 www.ti.com SLVS762B – JUNE 2007 – REVISED SEPTEMBER 2007 PFM LOAD TRANSIENT PFM LINE TRANSIENT VIN 3.6V to 4.2V 500mV/Div VOUT 50mV/Div IOUT 200mA/Div VIN 3.6V VOUT 1.8V IOUT 50mA to 200mA MODE = VIN 200mA 50mA VOUT = 1.8V 50mV/Div IOUT = 50mA MODE = GND Icoil 200mA/Div Time Base - 100ms/Div Time Base - 100ms/Div Figure 17. Figure 18. PFM LINE TRANSIENT MODE TRANSITION PFM to PWM VIN 3.6V to 4.2V 500mV/Div VIN = 3.6 VOUT = 1.8V IOUT = 10mA MODE 2V/Div SW 2V/Div PFM Mode VOUT = 1.8V 50mV/Div IOUT = 250mA MODE = GND Forced PWM Mode Icoil 200mA/Div Time Base - 100ms/Div Time Base - 1ms/Div Figure 19. 10 Submit Documentation Feedback Figure 20. Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPS62240 TPS62242 TPS62243 TPS62240, TPS62242, TPS62243 www.ti.com SLVS762B – JUNE 2007 – REVISED SEPTEMBER 2007 SHUTDOWN CURRENT INTO VIN vs INPUT VOLTAGE MODE TRANSITION PWM to PFM 0.8 MODE 2V/Div EN = GND ISD - Shutdown Current Into VIN − mA VIN = 3.6 VOUT = 1.8V IOUT = 10mA SW 2V/Div PFM Mode Forced PWM Mode Icoil 200mA/Div 0.7 0.6 o TA = 85 C 0.5 0.4 0.3 0.2 o o TA = 25 C TA = -40 C 0.1 0 2 2.5 5 5.5 QUIESCENT CURRENT vs INPUT VOLTAGE STATIC DRAIN-SOURCE ON-STATE RESISTANCE vs INPUT VOLTAGE o TA = 85 C 16 TA = 25oC 14 12 TA = -40oC 10 8 3 3.5 4 4.5 VIN − Input Voltage − V 5 5.5 6 RDS(on) - Static Drain-Source On-State Resistance − W IQ - Quiescent Current − mA 4.5 Figure 22. MODE = GND, EN = VIN, Device Not Switching 2.5 4 Figure 21. 20 2 3.5 0.8 High Side Switching 0.7 0.6 o TA = 85 C 0.5 o TA = 25 C 0.4 0.3 0.2 TA = -40oC 0.1 0 2 2.5 3 3.5 4 4.5 5 VIN − Input Voltage − V Figure 23. Copyright © 2007, Texas Instruments Incorporated 6 VIN − Input Voltage − V Time Base - 2.5ms/Div 18 3 Figure 24. Submit Documentation Feedback Product Folder Link(s): TPS62240 TPS62242 TPS62243 11 TPS62240, TPS62242, TPS62243 www.ti.com SLVS762B – JUNE 2007 – REVISED SEPTEMBER 2007 RDS(on) - Static Drain-Source On-State Resistance − W STATIC DRAIN-SOURCE ON-STATE RESISTANCE vs INPUT VOLTAGE 0.4 Low Side Switching 0.35 0.3 o TA = 85 C 0.25 o TA = 25 C 0.2 0.15 0.1 TA = -40oC 0.05 0 2 2.5 3 3.5 4 4.5 5 VIN − Input Voltage − V Figure 25. 12 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPS62240 TPS62242 TPS62243 TPS62240, TPS62242, TPS62243 www.ti.com SLVS762B – JUNE 2007 – REVISED SEPTEMBER 2007 DETAILED DESCRIPTION OPERATION The TPS62240 step down converter operates with typically 2.25MHz fixed frequency pulse width modulation (PWM) at moderate to heavy load currents. At light load currents, the converter can automatically enter Power Save Mode and operates then in PFM mode. During PWM operation, the converter uses a unique fast response voltage mode control scheme with input voltage feed-forward to achieve good line and load regulation, allowing the use of small ceramic input and output capacitors. At the beginning of each clock cycle initiated by the clock signal, the High Side MOSFET switch is turned on. The current then flows from the input capacitor via the High Side MOSFET switch through the inductor to the output capacitor and load. During this phase, the current ramps up until the PWM comparator trips and the control logic turns off the switch. The current limit comparator also turns off the switch if the current limit of the High Side MOSFET switch is exceeded. After a dead time preventing shoot through current, the Low Side MOSFET rectifier is turned on and the inductor current ramps down. The current then flows from the inductor to the output capacitor and to the load. It returns back to the inductor through the Low Side MOSFET rectifier. The next cycle is initiated by the clock signal again turning off the Low Side MOSFET rectifier and turning on the High Side MOSFET switch. POWER SAVE MODE The Power Save Mode is enabled with MODE Pin set to low level. If the load current decreases, the converter will enter Power Save Mode operation automatically. During Power Save Mode, the converter skips switching and operates with reduced frequency in PFM mode with a minimum quiescent current to maintain high efficiency. The transition from PWM mode to PFM mode occurs once the inductor current in the Low Side MOSFET switch becomes zero, which indicates discontinuous conduction mode. During the Power Save Mode, the output voltage is monitored with a PFM comparator. As the output voltage falls below the PFM comparator threshold of VOUT nominal, the device starts a PFM current pulse. The High Side MOSFET switch will turn on, and the inductor current ramps up. After the On-time expires, the switch is turned off and the Low Side MOSFET switch is turned on until the inductor current becomes zero. The converter effectively delivers a current to the output capacitor and the load. If the load is below the delivered current, the output voltage will rise. If the output voltage is equal to or greater than the PFM comparator threshold, the device stops switching and enters a sleep mode with typical 15-µA current consumption. If the output voltage is still below the PFM comparator threshold, a sequence of further PFM current pulses are generated until the PFM comparator threshold is reached. The converter starts switching again once the output voltage drops below the PFM comparator threshold. With a fast single-threshold comparator, the output voltage ripple during PFM mode operation can be kept to a minimum. The PFM Pulse is time controlled, allowing the user to modify the charge transferred to the output capacitor by the value of the inductor. The resulting PFM output voltage ripple and PFM frequency both depend on the size of the output capacitor and the inductor value. Increasing output capacitor values and inductor values will minimize the output ripple. The PFM frequency decreases with smaller inductor values and increases with larger values. If the output current cannot be supported in PFM mode, the device exits PFM mode and enters PWM mode. The Power Save Mode can be disabled through the MODE pin set to high. The converter will then operate in fixed frequency PWM mode. Copyright © 2007, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TPS62240 TPS62242 TPS62243 13 TPS62240, TPS62242, TPS62243 www.ti.com SLVS762B – JUNE 2007 – REVISED SEPTEMBER 2007 Output voltage VOUT nominal PWM + PFM moderate to heavy load PWM Mode Light load PFM Mode Figure 26. Power Save Mode 100% Duty Cycle Low Dropout Operation The device starts to enter 100% duty cycle mode once the input voltage comes close to the nominal output voltage. In order to maintain the output voltage, the High Side MOSFET switch is turned on 100% for one or more cycles. With further decreasing VIN the High Side MOSFET switch is turned on completely. In this case the converter offers a low input-to-output voltage difference. This is particularly useful in battery-powered applications to achieve longest operation time by taking full advantage of the entire battery voltage range. The minimum input voltage to maintain regulation depends on the load current and output voltage, and can be calculated as: VINmin = VOmax + IOmax × DSo(n)max + RL) With: IOmax = maximum output current plus inductor ripple current RDS(on)max = maximum P-channel switch RDS(on). RL = DC resistance of the inductor VOmax = nominal output voltage plus maximum output voltage tolerance UNDERVOLTAGE LOCKOUT The undervoltage lockout circuit prevents the device from malfunctioning at low input voltages and from excessive discharge of the battery and disables the output stage of the converter. The undervoltage lockout threshold is typically 1.85V with falling VIN. MODE SELECTION The MODE pin allows mode selection between forced PWM mode and Power Save Mode. Connecting this pin to GND enables the Power Save Mode with an automatic transition between PWM and PFM mode. Pulling the MODE pin high forces the converter to operate in fixed frequency PWM mode even at light load currents. This allows simple filtering of the switching frequency for noise sensitive applications. In this mode, the efficiency is lower compared to the Power Save Mode during light loads. The condition of the MODE pin can be changed during operation and allows efficient power management by adjusting the operation mode of the converter to the specific system requirements. ENABLE The device is enabled by setting the EN pin to high. During the start up time tStart Up, the internal circuits are settled and the soft start circuit is activated. The EN input can be used to control power sequencing in a system with various dc/dc converters. The EN pin can be connected to the output of another converter, to drive the EN pin high and getting a sequencing of supply rails. With EN pin = GND, the device enters shutdown mode in which all circuits are disabled. In fixed output voltage versions, the internal resistor divider network is then disconnected from FB pin. 14 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPS62240 TPS62242 TPS62243 TPS62240, TPS62242, TPS62243 www.ti.com SLVS762B – JUNE 2007 – REVISED SEPTEMBER 2007 SOFT START The TPS62240 has an internal soft start circuit that controls the ramp up of the output voltage. The output voltage ramps up from 5% to 95% of its nominal value within typical 250µs. This limits the inrush current in the converter during ramp up and prevents possible input voltage drops when a battery or high impedance power source is used. The soft start circuit is enabled within the start up time, tStart up. SHORT-CIRCUIT PROTECTION The High Side and Low Side MOSFET switches are short-circuit protected with maximum switch current equal to ILIMF. The current in the switches is monitored by current limit comparators. Once the current in the High Side MOSFET switch exceeds the threshold of it's current limit comparator, it turns off and the Low Side MOSFET switch is activated to ramp down the current in the inductor and High Side MOSFET switch. The High Side MOSFET switch can only turn on again, once the current in the Low Side MOSFET switch has decreased below the threshold of its current limit comparator. THERMAL SHUTDOWN As soon as the junction temperature, TJ, exceeds 140°C (typical) the device goes into thermal shutdown. In this mode, the High Side and Low Side MOSFETs are turned off. The device continues its operation when the junction temperature falls below the thermal shutdown hysteresis. Copyright © 2007, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TPS62240 TPS62242 TPS62243 15 TPS62240, TPS62242, TPS62243 www.ti.com SLVS762B – JUNE 2007 – REVISED SEPTEMBER 2007 APPLICATION INFORMATION VIN 2.0V to 6V TPS62240DRV VIN CIN 4.7µF L1 2.2µH SW R1 360 kΩ EN VOUT 1.2V C1 33pF COUT 10 µF FB GND R2 360 kΩ MODE Up to 300mA Figure 27. TPS62240DRV Adjustable 1.2 V VIN 2.0V to 6V TPS62240DRV VIN CIN 4.7µF L1 2.2µH SW R1 360 kΩ EN VOUT 1.8V C1 33pF Up to 300mA COUT 10 µF FB GND R2 180 kΩ MODE Figure 28. TPS62240DRV 1.8 V VIN 2.0V to 6V TPS62240DRV VIN CIN 4.7µF SW R1 360 kΩ EN GND MODE L1 4.7 µH VOUT 1.8V C1 33pF Up to 300mA COUT 10 µF FB R2 180 kΩ Figure 29. TPS62240DRV 1.8 V Low Ripple 16 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPS62240 TPS62242 TPS62243 TPS62240, TPS62242, TPS62243 www.ti.com SLVS762B – JUNE 2007 – REVISED SEPTEMBER 2007 VIN 2.0V to 6V TPS62243DRV VIN L1 2.2 µH VOUT 1.8V SW Up to 300mA CIN 4.7 µF EN GND FB COUT 10 µF MODE Figure 30. TPS62243 Fixed 1.8 V OUTPUT VOLTAGE SETTING The output voltage can be calculated to: V OUT + VREF ǒ R 1) 1 R2 Ǔ with an internal reference voltage VREF typical 0.6 V. To minimize the current through the feedback divider network, R2 should be 180 kΩ or 360 kΩ. The sum of R1 and R2 should not exceed ~1MΩ, to keep the network robust against noise. An external feed forward capacitor C1 is required for optimum load transient response. The value of C1 should be in the range between 22pF and 33pF. Route the FB line away from noise sources, such as the inductor or the SW line. OUTPUT FILTER DESIGN (INDUCTOR AND OUTPUT CAPACITOR) The TPS62240 is designed to operate with inductors in the range of 1.5µH to 4.7µH and with output capacitors in the range of 4.7µF to 22µF. The part is optimized for operation with a 2.2µH inductor and 10µF output capacitor. Larger or smaller inductor values can be used to optimize the performance of the device for specific operation conditions. For stable operation, the L and C values of the output filter may not fall below 1µH effective Inductance and 3.5µF effective capacitance. Selecting larger capacitors is less critical because the corner frequency of the L-C filter moves to lower frequencies with fewer stability problems. Inductor Selection The inductor value has a direct effect on the ripple current. The selected inductor must be rated for its dc resistance and saturation current. The inductor ripple current (ΔIL) decreases with higher inductance and increases with higher VI or VO. The inductor selection also has an impact on the output voltage ripple in the PFM mode. Higher inductor values will lead to lower output voltage ripple and higher PFM frequency, and lower inductor values will lead to a higher output voltage ripple but lower PFM frequency. Equation 1 calculates the maximum inductor current in PWM mode under static load conditions. The saturation current of the inductor should be rated higher than the maximum inductor current as calculated with Equation 2. This is recommended because during heavy load transients the inductor current will rise above the calculated value. Copyright © 2007, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TPS62240 TPS62242 TPS62243 17 TPS62240, TPS62242, TPS62243 www.ti.com SLVS762B – JUNE 2007 – REVISED SEPTEMBER 2007 1 * Vout Vin DI L + Vout ƒ L I Lmax + I outmax ) (1) DI L 2 (2) With: f = Switching Frequency (2.25 MHz typical) L = Inductor Value ΔIL = Peak to Peak inductor ripple current ILmax = Maximum Inductor current A more conservative approach is to select the inductor current rating just for the maximum switch current limit ILIMF of the converter. Accepting larger values of ripple current allows the use of low inductance values, but results in higher output voltage ripple, greater core losses, and lower output current capability. The total losses of the coil have a strong impact on the efficiency of the dc/dc conversion and consist of both the losses in the dc resistance (R(DC)) and the following frequency-dependent components: • The losses in the core material (magnetic hysteresis loss, especially at high switching frequencies) • Additional losses in the conductor from the skin effect (current displacement at high frequencies) • Magnetic field losses of the neighboring windings (proximity effect) • Radiation losses Table 1. List of Inductors DIMENSIONS [mm3] INDUCTANCE µH 2.5 × 2.0 × 1.0 2.5 × 2.0 × 1.2 INDUCTOR TYPE SUPPLIER 2.0 MIPS2520D2R2 FDK 2.0 MIPSA2520D2R2 FDK 2.5x2.0x1.0 2.2 KSLI-252010AG2R2 Hitachi Metals 2.5x2.0x1.2 2.2 LQM2HPN2R2MJ0L Murata 3 × 3 × 1.4 2.2 LPS3015 Coilcraft Output Capacitor Selection The advanced fast-response voltage mode control scheme of the TPS62240 allows the use of tiny ceramic capacitors. Ceramic capacitors with low ESR values have the lowest output voltage ripple and are recommended. The output capacitor requires either an X7R or X5R dielectric. Y5V and Z5U dielectric capacitors, aside from their wide variation in capacitance over temperature, become resistive at high frequencies. At nominal load current, the device operates in PWM mode and the RMS ripple current is calculated as: 1 * Vout 1 Vin I RMSCout + Vout ƒ L 2 Ǹ3 (3) At nominal load current, the device operates in PWM mode and the overall output voltage ripple is the sum of the voltage spike caused by the output capacitor ESR plus the voltage ripple caused by charging and discharging the output capacitor: DVout + Vout 1 * Vout ǒ8 Vin L ƒ 1 Cout ƒ Ǔ ) ESR (4) At light load currents, the converter operates in Power Save Mode and the output voltage ripple depends on the output capacitor and inductor value. Larger output capacitor and inductor values minimize the voltage ripple in PFM mode and tighten dc output accuracy in PFM mode. 18 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPS62240 TPS62242 TPS62243 TPS62240, TPS62242, TPS62243 www.ti.com SLVS762B – JUNE 2007 – REVISED SEPTEMBER 2007 Input Capacitor Selection The buck converter has a natural pulsating input current; therefore, a low ESR input capacitor is required for best input voltage filtering, and minimizing the interference with other circuits caused by high input voltage spikes. For most applications, a 4.7-µF to 10-µF ceramic capacitor is recommended. Because ceramic capacitors lose up to 80% of their initial capacitance at 5V, it is recommended that a 10-µF input capacitor be used for input voltages greater than 4.5V. The input capacitor can be increased without any limit for better input voltage filtering. Take care when using only small ceramic input capacitors. When a ceramic capacitor is used at the input, and the power is being supplied through long wires, such as from a wall adapter, a load step at the output, or VIN step on the input, can induce ringing at the VIN pin. The ringing can couple to the output and be mistaken as loop instability, or could even damage the part by exceeding the maximum ratings Table 2. List of Capacitors CAPACITANCE TYPE SIZE SUPPLIER 4.7µF GRM188R60J475K 0603: 1.6x0.8x0.8mm3 Murata 10µF GRM188R60J106M69D 0603: 1.6x0.8x0.8mm3 Murata LAYOUT CONSIDERATIONS As for all switching power supplies, the layout is an important step in the design. Proper function of the device demands careful attention to PCB layout. Care must be taken in board layout to get the specified performance. If the layout is not carefully done, the regulator could show poor line and/or load regulation, and additional stability issues as well as EMI problems. It is critical to provide a low inductance, impedance ground path. Therefore, use wide and short traces for the main current paths. The input capacitor should be placed as close as possible to the IC pins as well as the inductor and output capacitor. Connect the GND pin of the device to the PowerPAD™ land of the PCB and use this pad as a star point. Use a common Power GND node and a different node for the Signal GND to minimize the effects of ground noise. Connect these ground nodes together to the PowerPAD land (star point) underneath the IC. Keep the common path to the GND pin, which returns the small signal components, and the high current of the output capacitors as short as possible to avoid ground noise. The FB line should be connected right to the output capacitor and routed away from noisy components and traces (for example, the SW line). Copyright © 2007, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TPS62240 TPS62242 TPS62243 19 TPS62240, TPS62242, TPS62243 www.ti.com SLVS762B – JUNE 2007 – REVISED SEPTEMBER 2007 VOUT R2 GND C1 R1 COUT CIN VIN L G N D U Figure 31. Layout 20 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): TPS62240 TPS62242 TPS62243 PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) TPS62240DDCR ACTIVE SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 BYO TPS62240DDCRG4 ACTIVE SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 BYO TPS62240DDCT ACTIVE SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 BYO TPS62240DDCTG4 ACTIVE SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 BYO TPS62240DRVR ACTIVE SON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 BYJ TPS62240DRVRG4 ACTIVE SON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 BYJ TPS62240DRVT ACTIVE SON DRV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 BYJ TPS62240DRVTG4 ACTIVE SON DRV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 BYJ TPS62242DRVR ACTIVE SON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 CCY TPS62242DRVRG4 ACTIVE SON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 CCY TPS62242DRVT ACTIVE SON DRV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 CCY TPS62242DRVTG4 ACTIVE SON DRV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 CCY TPS62243DRVR ACTIVE SON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 CBQ TPS62243DRVRG4 ACTIVE SON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 CBQ TPS62243DRVT ACTIVE SON DRV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 CBQ TPS62243DRVTG4 ACTIVE SON DRV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 CBQ (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. 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OTHER QUALIFIED VERSIONS OF TPS62242 : • Automotive: TPS62242-Q1 NOTE: Qualified Version Definitions: • Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 7-Nov-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device TPS62240DDCR Package Package Pins Type Drawing SOT DDC 5 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS62240DDCT SOT DDC 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 TPS62240DRVR SON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS62240DRVT SON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS62242DRVR SON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS62242DRVT SON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS62243DRVR SON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 TPS62243DRVT SON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 7-Nov-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS62240DDCR SOT DDC 5 3000 203.0 203.0 35.0 TPS62240DDCT SOT DDC 5 250 203.0 203.0 35.0 TPS62240DRVR SON DRV 6 3000 203.0 203.0 35.0 TPS62240DRVT SON DRV 6 250 203.0 203.0 35.0 TPS62242DRVR SON DRV 6 3000 203.0 203.0 35.0 TPS62242DRVT SON DRV 6 250 203.0 203.0 35.0 TPS62243DRVR SON DRV 6 3000 203.0 203.0 35.0 TPS62243DRVT SON DRV 6 250 203.0 203.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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