NSC 74LVX373

74LVX373
LOW VOLTAGE CMOS OCTAL D-TYPE LATCH
(3-STATE NON INV.) WITH 5V TOLERANT INPUTS
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HIGH SPEED:
tPD=5.8ns (TYP.) at VCC = 3.3V
5V TOLERANT INPUTS
POWER-DOWN PROTECTION ON INPUTS
INPUT VOLTAGE LEVEL:
VIL = 0.8V, VIH = 2V at VCC =3V
LOW POWER DISSIPATION:
ICC = 4 µA (MAX.) at TA=25°C
LOW NOISE:
VOLP = 0.3V (TYP.) at VCC =3.3V
SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 4 mA (MIN) at VCC =3V
BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
OPERATING VOLTAGE RANGE:
VCC(OPR) = 2V to 3.6V (1.2V Data Retention)
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 373
IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74LVX373 is a low voltage CMOS OCTAL
D-TYPE LATCH with 3 STATE OUTPUT NON
INVERTING fabricated with sub-micron silicon
gate and double-layer metal wiring C2MOS
technology. It is ideal for low power, battery
operated and low noise 3.3V applications.
This 8 bit D-Type latch is controlled by a latch
enable input (LE) and an output enable input (OE).
While the LE input is held at a high level, the Q
outputs will follow the data input precisely.
SOP
TSSOP
Table 1: Order Codes
PACKAGE
T&R
SOP
TSSOP
74LVX373MTR
74LVX373TTR
When the LE is taken low, the Q outputs will be
latched precisely at the logic level of D input data.
While the (OE) input is low, the 8 outputs will be in
a normal logic state (high or low logic level) and
while high level the outputs will be in a high
impedance state.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage.
This device can be used to interface 5V to 3V. It
combines high speed performance with the true
CMOS low power consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
Figure 1: Pin Connection And IEC Logic Symbols
August 2004
Rev. 4
1/13
74LVX373
Figure 2: Input Equivalent Circuit
Table 2: Pin Description
PIN N°
SYMBOL
1
OE
3, 4, 7, 8, 13,
14, 17, 18
2, 5, 6, 9, 12,
15, 16,19
11
10
20
D0 to D7
3 State Output Enable
Input (Active LOW)
Data Inputs
Q0 to Q7
3-State Outputs
LE
GND
VCC
NAME AND FUNCTION
Latch Enable Input
Ground (0V)
Positive Supply Voltage
Table 3: Truth Table
INPUTS
OE
LE
D
Q
H
L
L
L
X
L
H
H
X
X
L
H
Z
NO CHANGE*
L
H
X : Don’t Care
Z : High Impedance
* : Q Outputs are Latched at the time when the LE INPUT is taken low logic level
Figure 3: Logic Diagram
This logic diagram has not be used to estimate propagation delays
2/13
OUTPUT
74LVX373
Table 4: Absolute Maximum Ratings
Symbol
VCC
Parameter
Supply Voltage
VI
DC Input Voltage
VO
DC Output Voltage
IIK
DC Input Diode Current
IOK
DC Output Diode Current
IO
DC Output Current
ICC or IGND DC VCC or Ground Current
Storage Temperature
Tstg
Value
Unit
-0.5 to +7.0
V
-0.5 to +7.0
V
-0.5 to VCC + 0.5
- 20
V
mA
± 20
mA
± 25
mA
± 50
mA
-65 to +150
°C
300
°C
Lead Temperature (10 sec)
TL
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
Table 5: Recommended Operating Conditions
Symbol
Value
Unit
Supply Voltage (note 1)
2 to 3.6
V
VI
Input Voltage
0 to 5.5
V
VO
Output Voltage
0 to VCC
V
Top
Operating Temperature
-55 to 125
°C
0 to 100
ns/V
VCC
dt/dv
Parameter
Input Rise and Fall Time (note 2) (VCC = 3V)
1) Truth Table guaranteed: 1.2V to 3.6V
2) VIN from 0.8V to 2.0V
Table 6: DC Specifications
Test Condition
Symbol
VIH
VIL
VOH
VOL
IOZ
II
ICC
Parameter
High Level Input
Voltage
Low Level Input
Voltage
High Level Output
Voltage
Low Level Output
Voltage
High Impedance
Output Leakage
Current
Input Leakage Current
Quiescent Supply
Current
Value
TA = 25°C
VCC
(V)
Min.
2.0
3.0
3.6
2.0
3.0
3.6
Typ.
Max.
1.5
2.0
2.4
-40 to 85°C
-55 to 125°C Unit
Min.
Min.
Max.
1.5
2.0
2.4
0.5
0.8
0.8
Max.
1.5
2.0
2.4
0.5
0.8
0.8
V
0.5
0.8
0.8
V
2.0
IO=-50 µA
1.9
2.0
1.9
1.9
3.0
IO=-50 µA
2.9
3.0
2.9
2.9
3.0
IO=-4 mA
2.58
2.0
IO=50 µA
0.0
3.0
IO=50 µA
0.0
0.1
0.1
0.1
3.0
IO=4 mA
0.36
0.44
0.55
3.6
VI = VIH or VIL
VO = VCC or GND
±0.25
± 2.5
±5
µA
3.6
VI = 5V or GND
± 0.1
±1
±1
µA
3.6
VI = VCC or GND
4
40
40
µA
2.48
0.1
V
2.4
0.1
0.1
V
3/13
74LVX373
Table 7: Dynamic Switching Characteristics
Test Condition
Symbol
VOLP
VOLV
VIHD
VILD
Parameter
Dynamic Low
Voltage Quiet
Output (note 1, 2)
Dynamic High
Voltage Input
(note 1, 3)
Dynamic Low
Voltage Input
(note 1, 3)
Value
TA = 25°C
VCC
(V)
Min.
3.3
-0.8
CL = 50 pF
3.3
Typ.
Max.
0.3
0.8
-40 to 85°C
-55 to 125°C
Min.
Min.
Max.
Unit
Max.
-0.3
V
2.0
3.3
0.8
1) Worst case package.
2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V, (n-1) outputs switching and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3.3V to threshold (VILD), 0V to threshold
(VIHD), f=1MHz.
Table 8: AC Electrical Characteristics (Input tr = tf = 3ns)
Test Condition
Symbol
tPLH
tPHL
tPLH
tPHL
tPZL
tPZH
Parameter
Propagation Delay
Time
LE to Q
Propagation Delay
Time
D to Q
Output Enable
Time
tPLZ
tPHZ
Output Disable
Time
tW
LE pulse Width,
HIGH
tS
Setup Time D to LE
HIGH or LOW
th
Hold Time D to LE
HIGH or LOW
tOSLH
tOSHL
Output to Output
Skew Time (note
1,2)
VCC
(V)
CL
(pF)
2.7
2.7
Value
TA = 25°C
-55 to 125°C
Typ.
Max.
Min.
Max.
Min.
Max.
15
50
7.5
10.0
14.5
18.0
1.0
1.0
17.5
21.0
1.0
1.0
18.5
22.0
3.3(*)
15
6.8
10.3
1.0
12.0
1.0
13.0
3.3(*)
2.7
2.7
50
9.3
13.8
1.0
15.5
1.0
16.5
15
50
7.7
10.2
15.0
18.5
1.0
1.0
18.5
22.0
1.0
1.0
19.5
23.0
3.3(*)
15
5.8
9.7
1.0
11.5
1.0
12.5
3.3(*)
2.7
2.7
50
8.5
13.2
1.0
15.0
1.0
16.0
15
50
7.7
10.2
15.0
18.5
1.0
1.0
18.5
22.0
1.0
1.0
19.5
23.0
3.3(*)
15
6.0
9.7
1.0
11.5
1.0
12.5
3.3(*)
2.7
50
8.5
13.2
1.0
15.0
1.0
16.0
50
9.8
18.0
1.0
21.0
1.0
22.0
3.3(*)
2.7
50
8.2
12.8
1.0
14.5
1.0
15.5
50
6.5
7.5
7.5
(*)
50
5.0
5.0
5.0
3.3
2.7
Min.
-40 to 85°C
50
6.0
6.0
6.0
(*)
50
4.0
4.0
4.0
50
1.0
1.0
1.0
(*)
3.3
2.7
50
1.0
1.0
1.0
50
0.5
1.0
1.5
1.5
3.3(*)
50
0.5
1.0
1.5
1.5
3.3
2.7
Unit
ns
ns
ns
ns
ns
ns
ns
ns
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction, either HIGH or LOW
2) Parameter guaranteed by design
(*) Voltage range is 3.3V ± 0.3V
4/13
74LVX373
Table 9: Capacitive Characteristics
Test Condition
Symbol
Parameter
CIN
Input Capacitance
COUT
Output
Capacitance
Power Dissipation
Capacitance
(note 1)
CPD
Value
TA = 25°C
VCC
(V)
Min.
Typ.
Max.
-40 to 85°C
-55 to 125°C
Min.
Min.
Max.
Unit
Max.
3.3
5
3.3
10
pF
40
pF
3.3
fIN = 10MHz
10
10
pF
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/8 (per circuit)
Figure 4: Test Circuit
TEST
SWITCH
tPLH, tPHL
Open
tPZL, tPLZ
VCC
tPZH, tPHZ
GND
CL =15/50pF or equivalent (includes jig and probe capacitance)
RL = R1 = 1KΩ or equivalent
RT = ZOUT of pulse generator (typically 50Ω)
5/13
74LVX373
Figure 5: Waveform - LE To Qn Propagation Delays, LE Minimum Pulse Width, Dn To LE Setup
And Hold Times (f=1MHz; 50% duty cycle)
Figure 6: Waveform - Output Enable And Disable Times (f=1MHz; 50% duty cycle)
6/13
74LVX373
Figure 7: Waveform - Propagation Delay Time (f=1MHz; 50% duty cycle)
7/13
74LVX373
SO-20 MECHANICAL DATA
DIM.
mm.
MIN.
TYP
inch
MAX.
MIN.
TYP.
MAX.
A
2.35
2.65
0.093
0.104
A1
0.1
0.30
0.004
0.012
B
0.33
0.51
0.013
0.020
C
0.23
0.32
0.009
0.013
D
12.60
13.00
0.496
0.512
E
7.4
7.6
0.291
0.299
e
1.27
0.050
H
10.00
10.65
0.394
0.419
h
0.25
0.75
0.010
0.030
L
0.4
1.27
0.016
0.050
k
0°
8°
0°
8°
ddd
0.100
0.004
0016022D
8/13
74LVX373
TSSOP20 MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
MAX.
A
MIN.
TYP.
MAX.
1.2
A1
0.05
A2
0.8
b
0.047
0.15
0.002
0.004
0.006
1.05
0.031
0.039
0.041
0.19
0.30
0.007
0.012
c
0.09
0.20
0.004
0.0079
D
6.4
6.5
6.6
0.252
0.256
0.260
E
6.2
6.4
6.6
0.244
0.252
0.260
E1
4.3
4.4
4.48
0.169
0.173
0.176
1
e
0.65 BSC
K
0˚
L
0.45
A
0.0256 BSC
0.60
8˚
0˚
0.75
0.018
8˚
0.024
0.030
A2
A1
b
K
e
L
E
c
D
E1
PIN 1 IDENTIFICATION
1
0087225C
9/13
74LVX373
Tape & Reel SO-20 MECHANICAL DATA
mm.
inch
DIM.
MIN.
A
MAX.
MIN.
330
13.2
TYP.
MAX.
12.992
C
12.8
D
20.2
0.795
N
60
2.362
T
10/13
TYP
0.504
30.4
0.519
1.197
Ao
10.8
11
0.425
0.433
Bo
13.2
13.4
0.520
0.528
Ko
3.1
3.3
0.122
0.130
Po
3.9
4.1
0.153
0.161
P
11.9
12.1
0.468
0.476
74LVX373
Tape & Reel TSSOP20 MECHANICAL DATA
mm.
inch
DIM.
MIN.
A
TYP
MAX.
MIN.
330
MAX.
12.992
C
12.8
D
20.2
0.795
N
60
2.362
T
13.2
TYP.
0.504
22.4
0.519
0.882
Ao
6.8
7
0.268
0.276
Bo
6.9
7.1
0.272
0.280
Ko
1.7
1.9
0.067
0.075
Po
3.9
4.1
0.153
0.161
P
11.9
12.1
0.468
0.476
11/13
74LVX373
Table 10: Revision History
Date
Revision
27-Aug-2004
4
12/13
Description of Changes
Ordering Codes Revision - pag. 1.
74LVX373
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13/13