DS3654 Printer Solenoid Driver General Description The DS3654 is a serial-to-parallel 10-bit shift register with a clock and data input, a data output from the tenth bit, and 10 open-collector clamped relay driver outputs suitable for driving printer solenoids. Timing for the circuit is shown in Figure 1 . Data input is sampled on the positive clock edge. Data output changes on the negative clock edge, and is always active. Enable transfers data from the shift register to the open-collector outputs. Internal circuitry inhibits output enable for power supply voltage less than 6V. Each output sinks 250 mA and is internally clamped to ground at 50V to dissipate energy stored in inductive loads. Connection Diagram Pin Descriptions Dual-In-Line Package TL/F/5817 – 1 Top View Order Number DS3654N See NS Package Number N16E Pin No. Function 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Output Enable Output 6 Output 7 Output 8 Output 9 Output 10 Data Output Ground Clock Input Data Input Output 1 Output 2 Output 3 Output 4 Output 5 VCC Logic Diagram TL/F/5817 – 2 C1995 National Semiconductor Corporation TL/F/5817 RRD-B30M105/Printed in U. S. A. DS3654 Printer Solenoid Driver August 1992 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Maximum Power Dissipation* at 25§ C Molded Package Lead Temperature (Soldering, 4 seconds) Supply Voltage, VCC *Derate molded package 13.5 mW/§ C above 25§ C. Input Voltage Output Supply, Vp-p Storage Temperature Range Output Current (Single Output) Ground Current Peak Power Dissipation t k 10 ms, Duty Cycle k 5% 9.5V Max b 0.5V Min. 9.5V Max 1687 mW 260§ C Operating Conditions 45V Max b 65§ C to a 150§ C Min 7.5 0 Supply Voltage (VCC) Temperature (TA) Output Supply (Vp-p) 0.4A 4.0A Max 9.5 a 70 40 Units V §C V 4.5W Max Electrical Characteristics (Notes 2, 3 and 4) Vp-p e 30V unless otherwise noted Parameter Conditions Logical ‘‘1’’ Input Voltage Min Typ Max Units 0.8 V 2.6 V Logical ‘‘0’’ Input Voltage Logical ‘‘1’’ Output Voltage Clamp ICLAMP e 0.1A, VEN e 0V 65 V Logical ‘‘1’’ Output Current VOH e 40V, VEN e 0V 1.0 mA Logical ‘‘0’’ Output Voltage IOL e 250 mA, VEN e 2.6V 1.6 V Logical ‘‘1’’ Input Current Clock Enable Data Clock Enable Data TA TA TA TA TA TA 0.5 0.5 0.75 mA mA mA mA mA mA Logical ‘‘0’’ Input Current Clock Enable Data TA e 70§ C, VCL e 1V TA e 70§ C, VEN e 1V TA e 70§ C, VD e 1V 125 125 220 mA mA mA Input Pull-Down Resistance Clock Enable Data TA e 25§ C, VCL k VCC TA e 25§ C, VEN k VCC TA e 25§ C, VD k VCC 8 8 4.5 kX kX kX TA t 25§ C, VEN e 0V, VDO e 0V, VCC e 9.5V TA t 25§ C, VEN e 2.6V, IOL e 250 mA Each Bit 27 40 mA 55 70 mA 0.01 0.5 V Supply Current (ICC) Outputs Disabled Outputs Enabled e e e e e e 70§ C, VCL e 2.6V 70§ C, VEN e 2.6V 70§ C, VD e 2.6V 0§ C, VCL e 2.6V 0§ C, VEN e 2.6V 0§ C, VD e 2.6V Data Output Low (VDOL) VD e 0V, IOL e 0V Data Output High (VDOH) VD e 2.6V, IOH e b0.75 mA Data Output Pull-Down Resistance VD e 0V, VD0 e 1V 45 0.2 0.2 0.3 2.6 50 0.33 0.33 0.57 0.33 0.33 0.57 3.4 V 14 kX Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The tables of ‘‘Electrical Characteristics’’ provide conditions for actual device operation. Note 2: Unless otherwise specified, min/max limits apply across the 0§ C to a 70§ C temperature range and the 7.5V to 9.5V power supply range. All typical values given are for VCC e 8.5V and TA e 25§ C. Note 3: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to ground unless otherwise specified. Note 4: Only one output at a time should be shorted. 2 Switching Characteristics 0§ C to a 70§ C, TA e 25§ C, nominal power supplies unless otherwise noted Parameter Conditions Min Clk, Data and Enable Inputs tFC tRC tCLK tCLK tHOLD tSET-UP tRE,tRD IN tFE, tFD IN (Figure 1) Output 1–10 tRO tFO tPDEH tPDEL Vp-p e 20V RL e 100X, CL k 100 pF RL e 100X, CL k 100 pF Data Output tPDH, tPDL tRD tFD Typ tBIT t 10 ms Max Units 2.0 2.0 ms ms ms ms ms ms ms ms 2 3.5 1.0 1.0 1.0 5.0 1.2 1.2 3.5 3.0 RL e 5 kX, CL s 10 pF 0.8 0.4 0.4 ms ms ms ms 2.5 ms ms ms Clock to Enable Delay tCE 2 tBIT ms Enable to Clock Delay tBIT ms Switching Time Waveforms TL/F/5817 – 3 FIGURE 1. Shift Timing 3 DS3654 Printer Solenoid Driver Definition of Terms Vp-p: Output power supply voltage. The return for open-collector relay driver outputs. tBIT: Period of the incoming clock. VCLK: The voltage at the clock input. tCLK: The portion of tBIT when VCLK t 2.6V tCLK: The portion of tBIT when VCLK s 0.8V tSET-UP: The time prior to the end of tCLK required to insure valid data at the shift register input for subsequent clock transitions. tHOLD: The time following the start of tCLK required to transfer data within the shift register. Physical Dimensions inches (millimeters) Molded Dual-In-Line Package (N) Order Number DS3654N NS Package Number N16E LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. 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