NSC LM22675MR-ADJ

LM22675
1A SIMPLE SWITCHER®, Step-Down Voltage Regulator
with Precision Enable
General Description
Features
The LM22675 series of regulators are monolithic integrated
circuits which provide all of the active functions for a stepdown (buck) switching regulator capable of driving up to 1A
loads with excellent line and load regulation characteristics.
High efficiency (>90%) is obtained through the use of a low
ON-resistance N-channel MOSFET. The series consists of a
fixed 5V output and an adjustable version.
The SIMPLE SWITCHER® concept provides for an easy to
use complete design using a minimum number of external
components and National’s WEBENCH® design tool.
National’s WEBENCH® tool includes features such as external component calculation, electrical simulation, thermal simulation, and Build-It boards for easy design-in. The switching
clock frequency is provided by an internal fixed frequency oscillator which operates at 500 kHz. The LM22675 series also
has built in thermal shutdown, current limiting and an enable
control input that can power down the regulator to a low 25
µA quiescent current standby condition.
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Wide input voltage range: 4.5V to 42V
Internally compensated voltage mode control
Stable with low ESR ceramic capacitors
200 mΩ N-channel MOSFET
Output voltage options:
-ADJ (outputs as low as 1.285V)
-5.0 (output fixed to 5V)
±1.5% feedback reference accuracy
Switching frequency of 500 kHz
-40°C to 125°C operating junction temperature range
Precision enable pin
Integrated boot diode
Integrated soft-start
Fully WEBENCH® enabled
Step-down and inverting buck-boost applications
Package
■ PSOP-8 (Exposed Pad)
Applications
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Industrial Control
Telecom and Datacom Systems
Embedded Systems
Automotive Telematics and Body Electronics
Conversions from Standard 24V, 12V and 5V Input Rails
Simplified Application Schematic
30077001
© 2009 National Semiconductor Corporation
300770
www.national.com
LM22675 1A SIMPLE SWITCHER®, Step-Down Voltage Regulator with Precision Enable
December 18, 2009
LM22675
Connection Diagram
30077040
8-Lead Plastic PSOP-8 Package
NS Package Number MRA08B
Ordering Information
Output Voltage
Order Number
Package Type
NSC Package Drawing
Supplied As
ADJ
LM22675MR-ADJ
95 Units in Rails
ADJ
LM22675MRE-ADJ
250 Units in Tape and Reel
ADJ
LM22675MRX-ADJ
PSOP-8 Exposed Pad
MRA08B
2500 Units in Tape and Reel
5.0
LM22675MR-5.0
5.0
LM22675MRE-5.0
250 Units in Tape and Reel
95 Units in Rails
5.0
LM22675MRX-5.0
2500 Units in Tape and Reel
Pin Descriptions
Pins
Name
Description
Application Information
1
BOOT
Bootstrap input
Provides the gate voltage for the high side NFET.
2, 3
NC
Not Connected
Pins are not electrically connected inside the chip. Pins do function as
thermal conductor.
4
FB
Feedback pin
Inverting input to the internal voltage error amplifier.
5
EN
Precision enable pin
When pulled low regulator turns off.
6
GND
System ground
Provide good capacitive decoupling between VIN and this pin
7
VIN
Source input voltage
Input to the regulator. Operates from 4.5V to 42V.
8
SW
Switch pin
Attaches to the switch node
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2
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
VIN to GND
EN Pin Voltage
SW to GND (Note 2)
BOOT Pin Voltage
FB Pin Voltage
Power Dissipation
43V
-0.5V to 6V
-5V to VIN
VSW + 7V
-0.5V to 7V
Internally Limited
150°C
260°C
±2 kV
-65°C to +150°C
Operating Ratings
(Note 1)
Supply Voltage (VIN)
Junction Temperature Range
4.5V to 42V
-40°C to +125°C
Electrical Characteristics
Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the
junction temperature (TJ) range of -40°C to +125°C. Minimum and Maximum limits are guaranteed through test, design, or statistical
correlation. Typical values represent the most likely parametric norm at TA = TJ = 25°C, and are provided for reference purposes
only. Unless otherwise specified: VIN = 12V.
Symbol
Parameter
Conditions
Min
(Note 5)
Typ
(Note 4)
Max
(Note 5)
Units
Feedback Voltage
VIN = 8V to 42V
4.925/4.9
5.0
5.075/5.1
V
Feedback Voltage
VIN = 4.7V to 42V
1.266/1.259
1.285
1.304/1.311
V
3.4
6
mA
LM22675-5.0
VFB
LM22675-ADJ
VFB
All Output Voltage Versions
IQ
ISTDBY
Quiescent Current
VFB = 5V
Standby Quiescent Current
EN Pin = 0V
ICL
Current Limit
IL
Output Leakage Current
25
40
µA
1.5
1.7/1.8
A
VIN = 42V, EN Pin = 0V, VSW = 0V
0.2
2
µA
VSW = -1V
0.1
3
µA
1.3/1.2
0.2
0.24/0.32
Ω
Oscillator Frequency
400
500
600
kHz
TOFFMIN
Minimum Off-time
100
200
300
ns
TONMIN
Minimum On-time
RDS(ON)
fO
Switch On-Resistance
100
IBIAS
Feedback Bias Current
VFB = 1.3V (ADJ Version Only)
VEN
Enable Threshold Voltage
Falling
VENHYST
Enable Voltage Threshold
Hysteresis
IEN
Enable Input Current
TSD
Thermal Shutdown
Threshold
θJA
Thermal Resistance
230
1.3
EN Input = 0V
MR package, Junction to ambient
temperature resistance (Note 6)
3
ns
1.6
nA
1.9
V
0.6
V
6
µA
150
°C
60
°C/W
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LM22675
Junction Temperature
Soldering Information
Infrared (5 sec.)
ESD Rating (Note 3)
Human Body Model
Storage Temperature Range
Absolute Maximum Ratings (Note 1)
LM22675
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability
and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in
the recommended Operating Ratings is not implied. The recommended Operating Ratings indicate conditions at which the device is functional and should not be
operated beyond such conditions.
Note 2: The absolute maximum specification of the ‘SW to GND’ applies to DC voltage. An extended negative voltage limit of -10V applies to a pulse of up to 50
ns.
Note 3: ESD was applied using the human body model, a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin.
Note 4: Typical values represent most likely parametric norms at the conditions specified and are not guaranteed.
Note 5: Min and Max limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlation using Statistical
Quality Control (SQC) methods. Limits are used to calculate National’s Average Outgoing Quality Level (AOQL).
Note 6: The value of θJA for the PSOP-8 exposed pad (MR) package of 60°C/W is valid if package is mounted to 1 square inch of copper. The θJA value can
range from 42 to 115°C/W depending on the amount of PCB copper dedicated to heat transfer.
Typical Performance Characteristics
Unless otherwise specified the following conditions apply: Vin =
12V, TJ = 25°C.
Efficiency vs IOUT and VIN
VOUT = 3.3V
Normalized Switching Frequency vs Temperature
30077004
30077027
Current Limit vs Temperature
Normalized RDS(ON) vs Temperature
30077008
30077003
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4
Normalized Enable Threshold Voltage vs Temperature
30077005
30077010
Standby Quiescent Current vs Input Voltage
Normalized Feedback Voltage vs Temperature
30077007
30077006
Normalized Feedback Voltage vs Input Voltage
30077009
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LM22675
Feedback Bias Current vs Temperature
LM22675
Typical Application Circuit and Block Diagram
30077014
FIGURE 1. 3.3V VOUT, 1A
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6
The LM22675 switching regulator features all of the functions
necessary to implement an efficient high voltage buck regulator using a minimum of external components. This easy to
use regulator integrates a 42V N-Channel switch with an output current capability of 1A. The regulator control method is
based on voltage mode control with input voltage feed forward. The loop compensation is integrated into the LM22675
so that no external compensation components need to be selected or utilized. Voltage mode control offers short minimum
on-times allowing short duty-cycles necessary in high input
voltage applications. The operating frequency is fixed at
500kHz to allow for small external components while avoiding
excessive switching losses. The output voltage can be set as
low as 1.285V with the -ADJ device. Fault protection features
include current limiting, thermal shutdown and remote shutdown capability. The device is available in the PSOP-8 package featuring an exposed pad to aid thermal dissipation.
The functional block diagram with typical application of the
LM22675 are shown in Figure 1.
The internal compensation of the -ADJ option of the LM22675
is optimized for output voltages up to 5V. If an output voltage
of 5V or higher is needed, the -5.0 fixed output voltage option
with an additional external resistive feedback voltage divider
may also be used.
Minimum Duty-Cycle
Besides a minimum off-time, there is also a minimum on-time
which will take effect when the output voltage is adjusted very
low and the input voltage is very high. Should the operation
require an on-time shorter than minimum, individual switching
pulses will be skipped.
Pulse skipping is a normal mode of operation which appears
as a decrease in switching frequency. It has no effect on operation or regulation except for an increase in output ripple
voltage. The pulse skipping function is required to maintain
proper regulation and overcurrent protection under the full
range of operating conditions.
The specified typical minimum on time of 100 ns is based on
the blanking time during current limit operation. During normal
operation, the minimum on-time will also include the effect of
propagation delay. Assume approximately 150 ns as a typical
operating minimum on time.
Precision Enable
where D is the duty-cycle.
The precision enable pin (EN) can be used to shut down the
power supply. Connecting this pin to ground or to a voltage
less than typical 1.6V will completely turn off the regulator.
The current drain from the input supply when off is typically
25 µA with 12V input voltage. The power consumed during
this off state is mostly defined by an internal 2 MΩ resistor to
VIN. The enable pin has an internal pull-up current source of
approximately 6 µA. When driving the enable pin, the high
voltage level for the on condition should not exceed the 6V
absolute maximum limit. When enable control is not required,
the EN pin should be left floating. The precision feature enables simple sequencing of multiple power supplies with a
resistor divider from another power supply.
The EN pin can also be used as an external UVLO to disable
the part when input voltage falls below a lower boundary of
operation. This is often used to prevent battery discharge or
early turn-on. Using EN as en external UVLO is also recommended to prevent abnormal device operation in applications
where the input voltage falls below the minimum operating
voltage of 4.5V, during power down for example.
Current Limit
When the power switch turns on, the slight capacitance loading of the Schottky diode, D1, causes a leading-edge current
spike with an extended ringing period. This spike can cause
the current limit comparator to trip prematurely. A leading
edge blanking time (TBLK) of 100 ns (typical) is used to avoid
sampling the spike.
When the switch current reaches the current limit threshold
the switch is immediately turned off. If TON is larger than the
minimum (100 ns typical) the switcher will hold the output
current flat at the set current limit value. But if TON is at or
decreases to the minimum TON (100 ns typical) the switching
frequency decreases to 1/5 the typical frequency. This effectively causes the output current to fold back to a lower and
safe value. When the current limit condition is removed the
switching frequency is restored to nominal. This 5X frequency
fold back will result in a lower duty cycle pulse of the power
switch to minimize the overall fault condition power dissipation.
Maximum Duty-Cycle / Dropout
Voltage
The typical maximum duty-cycle is 90% at 500 kHz switching
frequency. This corresponds to a typical minimum off-time of
200 ns. This forced off-time is important to provide enough
time for the Cboot capacitor to charge during each cycle.
The lowest input voltage required to maintain operation is:
Where VD is the forward voltage drop across the re-circulating
Schottky diode and VQ is the voltage drop across the internal
power N-FET of the LM22675. The RDS(ON) of the FET is
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LM22675
specified in the electrical characteristics section of this
datasheet to calculate VQ according to the FET current. F is
the switching frequency.
Detailed Operating Description
LM22675
switch. During the off-time of the switch, the SW voltage is
approximately -0.5V and the external bootstrap capacitor is
charged from the internal supply through the internal bootstrap diode. When operating with a high PWM duty-cycle, the
buck switch will be forced off each cycle to ensure that the
bootstrap capacitor is recharged. See the maximum duty-cycle section for more details.
Thermal Protection
Internal Thermal Shutdown circuitry protects the LM22675 in
the event the maximum junction temperature is exceeded.
When activated, typically at 150°C, the regulator is forced into
a low power reset state. There is a typical hysteresis of 15
degrees.
Internal Compensation
The LM22675 has internal compensation designed for a stable loop with a wide range of external power stage components.
Insuring stability of a design with a specific power stage (inductor and output capacitor) can be tricky. The LM22675
stability can be verified over varying loads and input and output voltages using WEBENCH® Designer online circuit simulation tool at www.national.com. A quick start spreadsheet
can also be downloaded from the online product folder.
The internal compensation of the -ADJ option of the LM22675
is optimized for output voltages below 5V. If an output voltage
of 5V or higher is needed, the -5.0 option with an additional
external resistor divider may also be used.
The typical location of the internal compensation poles and
zeros as well as the DC gain is given in Table 1. The LM22675
has internal type III compensation allowing for the use of most
output capacitors including ceramics.
This information can be used to calculate the transfer function
from the FB pin to the internal compensation node (input to
the PWM comparator in the block diagram).
30077050
FIGURE 2. Output Current in Foldback vs.
Nominal Duty Cycle
The percentage of output current limit fold back is affected by
duty cycle, inductance, and switching frequency.
See Figure 2 for details.
The current limit will only protect the inductor from a runaway
condition if the LM22675 is operating in its safe operating
area. A runaway condition of the inductor is potentially catastrophic to the application. For every design, the safe operating
area needs to be calculated. Factors in determining the safe
operating area are the switching frequency, input voltage,
output voltage, minimum on-time and feedback voltage during an over current condition.
As a first pass check, if the following equation holds true, a
given design is considered in a safe operating area and the
current limit will protect the circuit:
VIN x TBLK x F < VOUT x 0.724
If the equation above does not hold true, the following secondary equation will need to hold true to be in safe operating
area:
TABLE 1.
If both equations do not hold true, a particular design will not
have an effective current limit function which might damage
the circuit during startup, over current conditions, or steady
state over current and short circuit condition. Oftentimes a
reduction of the maximum input voltage will bring a design into
the safe operating area.
Corners
Frequency
Pole 1
150 kHz
Pole 2
250 kHz
Pole 3
100 Hz
Zero 1
1.5 kHz
Zero 2
15 kHz
DC gain
37.5 dB
For the power stage transfer function the standard voltage
mode formulas for the double pole and the ESR zero apply:
Soft-Start
The soft-start feature allows the regulator to gradually reach
the initial steady state operating point, thus reducing start-up
stresses and surges. The soft-start is fixed to 500 µs (typical)
start-up time and cannot be modified.
Boot Pin
The peak ramp level of the oscillator signal feeding into the
PWM comparator is VIN/10 which equals a gain of 20dB of
this modulator stage of the IC. The -5.0 fixed output voltage
option has twice the gain of the compensation transfer function compared to the -ADJ option which is 43.5dB instead of
37.5dB.
The LM22675 integrates an N-Channel FET switch and associated floating high voltage level shift / gate driver. This gate
driver circuit works in conjunction with an internal diode and
an external bootstrap capacitor. A 0.01 µF ceramic capacitor
connected with short traces between the BOOT pin and the
SW pin is recommended to effectively drive the internal FET
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Application Information
EXTERNAL COMPONENTS
The following design procedures can be used to design a nonsynchronous buck converter with the LM22675.
Output Capacitor
The output capacitor can limit the output ripple voltage and
provide a source of charge for transient loading conditions.
Multiple capacitors can be placed in parallel. Very low ESR
capacitors such as ceramic capacitors reduce the output ripple voltage and noise spikes, while higher value capacitors in
parallel provide large bulk capacitance for transient loading
and unloading. Therefore, a combination of parallel capacitors, a single low ESR SP or Poscap capacitor, or a high value
of ceramic capacitor provides the best overall performance.
Output capacitor selection depends on application conditions
as well as ripple and transient requirements. Typically a value
of at least 100 µF is recommended. An approximation for the
output voltage ripple is:
Inductor
The inductor value is determined based on the load current,
ripple current, and the minimum and maximum input voltage.
To keep the application in continuous current conduction
mode (CCM), the maximum ripple current, IRIPPLE , should be
less than twice the minimum load current.
The general rule of keeping the inductor current peak-to-peak
ripple around 30% of the nominal output current is a good
compromise between excessive output voltage ripple and excessive component size and cost. Using this value of ripple
current, the value of inductor, L, is calculated using the following formula:
In applications with Vout less than 3.3V, where input voltage
may fall below the operating minimum of 4.5V, it is critical that
low ESR output capacitors are selected. This will limit potential output voltage overshoots as the input voltage falls below
device normal operation range.
If the switching frequency is set higher than 500 kHz, the capacitance value may not be reduced accordingly due to stability requirements. The internal compensation is optimized
for circuits with a 500 kHz switching frequency. See the internal compensation section for more details.
where F is the switching frequency which is 500 kHz (typical).
This procedure provides a guide to select the value of the
inductor L. The nearest standard value will then be used in
the circuit.
Increasing the inductance will generally slow down the transient response but reduce the output voltage ripple amplitude.
Reducing the inductance will generally improve the transient
response but increase the output voltage ripple.
The inductor must be rated for the peak current, IPK+, to prevent saturation. During normal loading conditions, the peak
current occurs at maximum load current plus maximum ripple.
Under an overload condition as well as during load transients,
the peak current is limited to 1.5A typical (1.8A maximum).
This requires that the inductor be selected such that it can run
at the maximum current limit and not only the steady state
current.
Depending on inductor manufacturer, the saturation rating is
defined as the current necessary for the inductance to reduce
by 30% at 20°C. In typical designs the inductor will run at
higher temperatures. If the inductor is not rated for enough
current, it might saturate and due to the propagation delay of
the current limit circuitry, the power supply may get damaged.
Cboot Capacitor
The bootstrap capacitor between the BOOT pin and the SW
pin supplies the gate current to turn on the N-channel MOSFET. The recommended value of this capacitor is 10 nF and
should be a good quality, low ESR ceramic capacitor.
It is possible to put a small resistor in series with the Cboot
capacitor to slow down the turn-on transition time of the internal N-channel MOSFET. Resistors in the range of 10Ω to
50Ω can slow down the transition time. This can reduce EMI
of a switched mode power supply circuit. Using such a series
resistor is not recommended for every design since it will increase the switching losses of the application and makes
thermal considerations more challenging.
Input Capacitor
Good quality input capacitors are necessary to limit the ripple
voltage at the VIN pin while supplying most of the switch current during on-time. When the switch turns on, the current into
the VIN pin steps to the peak value, then drops to zero at turnoff. The average current into VIN during switch on-time is the
load current. The input capacitance should be selected for
RMS current, IRMS, and minimum ripple voltage. A good approximation for the required ripple current rating necessary is
IRMS > IOUT / 2.
Quality ceramic capacitors with a low ESR should be selected
for the input filter. To allow for capacitor tolerances and voltage effects, multiple capacitors may be used in parallel. If step
Resistor Divider
For the -5.0 option no resistor divider is required for 5V output
voltage. The output voltage should be directly connected to
the FB pin. Output voltages above 5V can use the -5.0 option
with a resistor divider as an alternative to the -ADJ option.
This may offer improved loop bandwidth in some applications.
See the Internal Compensation section for more details.
For the -ADJ option no resistor divider is required for 1.285V
output voltage. The output voltage should be directly connected to the FB pin. Other output voltages can use the -ADJ
option with a resistor divider.
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LM22675
input voltage transients are expected near the maximum rating of the LM22675, a careful evaluation of ringing and possible voltage spikes at the VIN pin should be completed. An
additional damping network or input voltage clamp may be
required in these cases.
Usually putting a higher ESR electrolytic input capacitor in
parallel to the low ESR bypass capacitor will help to reduce
excessive voltages during a line transient and will also move
the resonance frequency of the input filter away from the regulator bandwidth.
Generally, calculation as well as simulation can only aid in
selecting good power stage components. A good design practice is to test for stability with load transient tests or loop
measurement tests. Application note AN-1889 shows how to
easily perform a loop transfer function measurement with only
an oscilloscope and a function generator.
LM22675
The resistor values can be determined by the following equations:
-ADJ option:
put voltage option. For the 5V fixed output voltage option, the
total internal divider resistance is typically 9.93 kΩ.
At loads less than 5 mA, the boot capacitor will not hold
enough charge to power the internal high side driver. The
output voltage may droop until the boot capacitor is
recharged. Selecting a total feedback resistance to be below
3 kΩ will provide some minimal load and can keep the output
voltage from collapsing in such low load conditions.
-5.0 option:
Catch Diode
A Schottky type re-circulating diode is required for all
LM22675 applications. Ultra-fast diodes which are not Schottky diodes are not recommended and may result in damage
to the IC due to reverse recovery current transients. The near
ideal reverse recovery characteristics and low forward voltage drop of Schottky diodes are particularly important diode
characteristics for high input voltage and low output voltage
applications common to the LM22675. The reverse recovery
characteristic determines how long the current surge lasts
each cycle when the N-channel MOSFET is turned on. The
reverse recovery characteristics of Schottky diodes minimizes the peak instantaneous power in the switch occurring
during turn-on for each cycle. The resulting switching losses
are significantly reduced when using a Schottky diode. The
reverse breakdown rating should be selected for the maximum VIN, plus some safety margin. A rule of thumb is to select
a diode with the reverse voltage rating of 1.3 times the maximum input voltage.
The forward voltage drop has a significant impact on the conversion efficiency, especially for applications with a low output
voltage. ‘Rated’ current for diodes varies widely from various
manufacturers. The worst case is to assume a short circuit
load condition. In this case the diode will carry the output current almost continuously. For the LM22675 this current can
be as high as 1.5A (typical). Assuming a worst case 1V drop
across the diode, the maximum diode power dissipation can
be as high as 1.5W.
Where VFB = 1.285V typical for the -ADJ option and 5V for the
-5.0 option
30077023
FIGURE 3. Resistive Feedback Divider
A maximum value of 10 kΩ is recommended for the sum of
R1 and R2 to keep high output voltage accuracy for the –ADJ
option. A maximum of 2 kΩ is recommended for the -5.0 out-
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Thermal Considerations
Board layout is critical for switching power supplies. First, the
ground plane area must be sufficient for thermal dissipation
purposes. Second, appropriate guidelines must be followed
to reduce the effects of switching noise. Switch mode converters are very fast switching devices. In such devices, the
rapid increase of input current combined with the parasitic
trace inductance generates unwanted L di/dt noise spikes.
The magnitude of this noise tends to increase as the output
current increases. This parasitic spike noise may turn into
electromagnetic interference (EMI) and can also cause problems in device performance. Therefore, care must be taken
in layout to minimize the effect of this switching noise.
The most important layout rule is to keep the AC current loops
as small as possible.Figure 4 shows the current flow of a buck
converter. The top schematic shows a dotted line which represents the current flow during the FET switch on-state. The
middle schematic shows the current flow during the FET
switch off-state.
The bottom schematic shows the currents referred to as AC
currents. These AC currents are the most critical since current
is changing in very short time periods. The dotted lines of the
bottom schematic are the traces to keep as short as possible.
This will also yield a small loop area reducing the loop inductance. To avoid functional problems due to layout, review the
PCB layout example. Best results are achieved if the placement of the LM22675, the bypass capacitor, the Schottky
diode and the inductor are placed as shown in the example.
It is also recommended to use 2oz copper boards or thicker
to help thermal dissipation and to reduce the parasitic inductances of board traces.
The two highest power dissipating components are the recirculating diode and the LM22675 regulator IC. The easiest
method to determine the power dissipation within the
LM22675 is to measure the total conversion losses (Pin –
Pout) then subtract the power losses in the Schottky diode
and output inductor. An approximation for the Schottky diode
loss is:
P = (1 - D) x IOUT x VD
An approximation for the output inductor power is:
P = IOUT2 x R x 1.1,
where R is the DC resistance of the inductor and the 1.1 factor
is an approximation for the AC losses. The regulator has an
exposed thermal pad to aid power dissipation. Adding several
vias under the device to the ground plane will greatly reduce
the regulator junction temperature. Selecting a diode with an
exposed pad will aid the power dissipation of the diode. The
most significant variables that affect the power dissipated by
the LM22675 are the output current, input voltage and operating frequency. The power dissipated while operating near
the maximum output current and maximum input voltage can
be appreciable. The junction-to-ambient thermal resistance of
the LM22675 will vary with the application. The most significant variables are the area of copper in the PC board, the
number of vias under the IC exposed pad and the amount of
forced air cooling provided. The integrity of the solder connection from the IC exposed pad to the PC board is critical.
Excessive voids will greatly diminish the thermal dissipation
capacity. The junction-to-ambient thermal resistance of the
LM22675 PSOP-8 package is specified in the electrical characteristics table under the applicable conditions.
30077024
FIGURE 4. Current Flow in a Buck Application
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LM22675
Circuit Board Layout
LM22675
PCB Layout Example
30077041
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12
LM22675
Schematic for Buck/Boost
(Inverting) Application
See AN-1888 for more information on the inverting (buckboost) application generating a negative output voltage from
a positive input voltage.
30077026
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LM22675
Physical Dimensions inches (millimeters) unless otherwise noted
8-Lead Plastic PSOP-8 Package
NS Package Number MRA08B
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14
LM22675
Notes
15
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LM22675 1A SIMPLE SWITCHER®, Step-Down Voltage Regulator with Precision Enable
Notes
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