TP5089 DTMF (TOUCH-TONE) Generator General Description Features The TP5089 is a low threshold voltage, field-implanted, metal gate CMOS integrated circuit. It interfaces directly to a standard telephone keypad and generates all dual tone multi-frequency pairs required in tone-dialing systems. The tone synthesizers are locked to an on-chip reference oscillator using an inexpensive 3.579545 MHz crystal for high tone accuracy. The crystal and an output load resistor are the only external components required for tone generation. A MUTE OUT logic signal, which changes state when any key is depressed, is also provided. Y Y Y Y Y Y Y Y Y 3.5V – 10V operation when generating tones 2V operation of keyscan and MUTE logic Static sensing of key closures or logic inputs On-chip 3.579545 MHz crystal-controlled oscillator Output amplitudes proportional to supply voltage High group pre-emphasis Low harmonic distortion Open emitter-follower low-impedance output SINGLE TONE INHIBIT pin Block Diagram TL/H/5057 – 1 FIGURE 1 C1995 National Semiconductor Corporation TL/H/5057 RRD-B30M115/Printed in U. S. A. TP5089 DTMF(TOUCH-TONE) Generator December 1991 Absolute Maximum Ratings Operating Temperature If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage (VDD b VSS) Maximum Voltage at Any Pin b 30§ C to a 60§ C Storage Temperature b 55§ C to a 150§ C Maximum Power Dissipation 15V VDD a 0.3V to VSS b 0.3V 500 mW Electrical Characteristics Unless otherwise noted, limits printed in BOLD characters are guaranteed for VDD e 3.5V to 10V, TA e 0§ C to a 60§ C by correlation with 100% electrical testing at TA e 25§ C. All other limits are assured by correlation with other production tests and/or product design and characterization. Parameter Conditions Minimum Supply Voltage for Keysense and MUTE Logic Functions Minimum Operating Voltage for generating tones Operating Current Idle Generating Tones Min 3.5 V 2 1.1 25 120 25 2.5 50 VDD e 3.5V Vo e 0.5V mA mA kX kX 0.2 VDD Input High Level Units V Input Low Level MUTE OUT Sink Current (COLUMN and ROW Active) Max 2 Mute open RL e % VDD e 3.5V Input Resistors COLUMN and ROW (Pull-Up) SINGLE TONE INHIBIT (Pull-Down) TONE DISABLE (Pull-Up) Typ V 0.8 VDD V 0.4 mA MUTE Out Leakage Current Vo e VDD Output Amplitude Low Group RL e 240 X VDD e 3.5V 190 250 340 mVrms RL e 240X VDD e 10V 510 700 880 mVrms RL e 240X VDD e 3.5V 270 340 470 mVrms RL e 240X VDD e 10V 735 955 1265 mVrms Output Amplitude High Group Mean Output DC Offset 1 VDD e 3.5V VDD e 10V 1.3 4.6 High Group Pre-Emphasis Dual Tone/Total Harmonic Distortion Ratio mA 2.2 VDD e 4V, RL e 240X 1 MHz Bandwidth Start-Up Time (to 90% Amplitude) Note 1: RL is the external load resistor connected from TONE OUT to VSS. Note 2: Crystal specification: Parallel resonant 3.579545 MHz, RS s 150 X, L e 100 mH, CO e 5 pF, CI e 0.02 pF. 2 V V 2.7 3.2 dB b 23 b 22 dB 3 5 mS Symbol MUTE Output Connection Diagram Dual-In-Line Package SINGLE TONE INHIBIT Input TL/H/5057 – 2 Top View Order Number TP5089N See NS Package N16A Pin Descriptions Symbol VDD VSS OSC IN, OSC OUT Row and Column Inputs TONE DISABLE Input Description This is the positive voltage supply to the device, referenced to VSS. The collector of the TONE OUT transistor is connected to this pin. This is the negative voltage supply. All voltages are referenced to this pin. All tone generation timing is derived from the on-chip oscillator circuit. A low cost 3.579545 MHz A-cut crystal (NTSC TV color-burst) is needed between pins 7 and 8. Load capacitors and a feedback resistor are included on-chip for good start-up and stability. The oscillator stops when column inputs are sensed with no valid input having been detected. The oscillator is also stopped when the TONE DISABLE input is pulled to logic low. When no key is pushed, pull-up resistors are active on row and column inputs. A key closure is recognized when a single row and a single column are connected to VSS, which starts the oscillator and initiates tone generation. Negative-true logic signals simulating key closures can also be used. TONE OUT Description The MUTE output is an opendrain N-channel device that sinks current to VSS with any key input and is open when no key input is sensed. The MUTE output will switch regardless of the state of the SINGLE TONE INHIBIT input. The SINGLE TONE INHIBIT input is used to inhibit the generation of other than valid tone pairs due to multiple rowcolumn closures. It has a pulldown resistor to VSS, and when left open or tied to VSS any input condition that would normally result in a single tone will now result in no tone, with all other functions operating normally. When tied to VDD, single or dual tones may be generated, see Table II. This output is the open emitter of an NPN transistor, the collector of which is connected to VDD. When an external load resistor is connected from TONE OUT to VSS, the output voltage on this pin is the sum of the high and low group sinewaves superimposed on a DC offset. When not generating tones, this output transistor is turned OFF to minimize the device idle current. Adjustment of the emitter load resistor results in variation of the mean DC current during tone generation, the sinewave signal current through the output transistor, and the output distortion. Increasing values of load resistance decrease both the signal current and distortion. Functional Description With no key inputs to the device the oscillator is inhibited, the output transistor is pulled OFF and device current consumption is reduced to a minimum. Key closures are sensed statically. Any key closure activates the MUTE output, starts the oscillator and sets the high group and low group programmable counters to the appropriate divide ratio. These counters sequence two ratioed-capacitor D/A converters through a series of 28 equal duration steps per sine-wave cycle. The two tones are summed by a mixer amplifier, with pre-emphasis applied to the high group tone. The output is an NPN emitter-follower requiring the addition of an external load resistor to VSS. This resistor facilitates adjustment of the signal current flowing from VDD through the output transistor. The amplitude of the output tones is directly proportional to the device supply voltage. The TONE DISABLE input has an internal pull-up resistor. When this input is open or at logic high, the normal tone output mode will occur. When TONE DISABLE input is at logic low, the device will be in the inactive mode, TONE OUT will be at an open circuit state. 3 Functional Description (Continued) TABLE I. Output Frequency Accuracy Tone Group Valid Input Standard DTMF (Hz) Tone Output Frequency % Deviation from Standard Low Group fL R1 R2 R3 R4 697 770 852 941 694.8 770.1 852.4 940.0 b 0.32 a 0.02 a 0.03 b 0.11 High Group fH C1 C2 C3 C4 1209 1336 1477 1633 1206.0 1331.7 1486.5 1639.0 b 0.24 b 0.32 a 0.64 a 0.37 TABLE II. Functional Truth Table SINGLE TONE INHIBIT TONE DISABLE ROW X X X X 1 1 1 0 0 0 O X 0 1 1 1 1 1 1 1 O/C O/C One One 2 or More One 2 or More 2 or More One 2 or More COLUMN O/C O/C One One One 2 or More 2 or More One 2 or More 2 or More TONE OUT Low High 0V 0V VOS fL Ð fL VOS VOS VOS VOS 0V 0V VOS fH fH Ð VOS VOS VOS VOS MUTE O/C O/C O O O O O O O O Note 1: X is don’t care state. Note 2: VOS is the output offset voltage. TL/H/5057 – 3 *Adjust RE for desired tone amplitude. FIGURE 2. Typical Application 4 5 TP5089 DTMF(TOUCH-TONE) Generator Physical Dimensions inches (millimeters) Lit. Ý 113986 Molded Dual-In-Line Package (N) Order Number TP5089N NS Package N16A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation 1111 West Bardin Road Arlington, TX 76017 Tel: 1(800) 272-9959 Fax: 1(800) 737-7018 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 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