NSC LM2407

Monolithic Triple 7.5 nS CRT Driver
General Description
The LM2407 is an integrated high voltage CRT driver circuit
designed for use in color monitor applications. The IC contains three high input impedance, wide band amplifiers
which directly drive the RGB cathodes of a CRT. Each channel has its gain internally set to −14 and can drive CRT capacitive loads as well as resistive loads present in other applications, limited only by the package’s power dissipation.
The IC is packaged in an industry standard 11-lead TO-220
molded plastic power package. See thermal considerations
on page 6.
Low power dissipation
Well matched with LM1279 video preamp
0V to 5V input range
Stable with 0 pF–20 pF capacitive loads and inductive
peaking networks
n Convenient TO-220 staggered lead package style
n Standard LM240X Family Pinout which is designed for
easy PCB layout
n 1024 x 768 displays up to 85 Hz refresh
n Pixel clock frequencies up to 100 MHz
n Monitors using video blanking
Schematic and Connection Diagrams
Note: Tab is at GND
Top View
Order Number LM2407T
FIGURE 1. Simplified Schematic Diagram
(One Channel)
© 1999 National Semiconductor Corporation
LM2407 Monolithic Triple 7.5 nS CRT Driver
August 1999
Absolute Maximum Ratings (Notes 1, 3)
Machine Model
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage, (VCC)
Bias Voltage, (VBB)
Input Voltage, (VIN)
Storage Temperature Range, (TSTG)
Lead Temperature
(Soldering, < 10 sec.)
ESD Tolerance, Human Body Model
Operating Range(Note 2)
+60V to +85V
+8V to +15V
+0V to +5V
+15V to +75V
Case Temperature
−20˚C to +100˚C
Do not operate the part without a heat sink.
−0.5V to VBIAS +0.5V
−65˚C to +150˚C
2 kV
Electrical Characteristics
(See Figure 2 for Test Circuit)
Unless otherwise noted: VCC = +80V, VBB = +12V, VIN = +2.7 VDC, CL = 8 pF, Output = 40 VPP at 1 MHz, TC = 50˚C.
Supply Current
Per Channel, No Output Load
Bias Current
All Three Channels
DC Output Voltage
No AC Input Signal, VIN = 1.2V
DC Voltage Gain
No AC Input Signal
Gain Matching
(Note 4), No AC Input Signal
Linearity Error
(Notes 4, 5), No AC Input Signal
Rise Time
10% to 90%
Fall Time
90% to 10%
Rising Edge
Falling Edge
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
Note 2: Operating ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and
test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may
change when the device is not operated under the listed test conditions.
Note 3: All voltages are measured with respect to GND, unless otherwise specified.
Note 4: Calculated value from Voltage Gain test on each channel.
Note 5: Linearity Error is the variation in dc gain from VIN = 1.0V to VIN = 4.5V.
Note 6: Input from signal generator: tr, tf < 1 nS.
AC Test Circuit
Note: 8 pF load includes parasitic capacitance.
FIGURE 2. Test Circuit (One Channel)
Figure 2 shows a typical test circuit for evaluation of the LM2407. This circuit is designed to allow testing of the LM2407 in a 50Ω
environment without the use of an expensive FET probe. The 4950Ω resistor at the output forms a 100:1 voltage divider when
connected to a 50Ω load.
AC Test Circuit
FIGURE 6. Power Dissipation vs Frequency
FIGURE 7. Speed vs Offset
FIGURE 4. Speed vs Temp.
FIGURE 5. LM2407 Pulse Response
FIGURE 8. Speed vs Load Capacitance
part. The application section in this document provides information for the LM2407. Please refer to the LM2405 and
LM2406 data sheets for specific application information on
each of those devices.
Theory of Operation
The LM2407 is a high voltage monolithic three channel CRT
driver suitable for high resolution display applications. The
LM2407 operates using 80V and 12V power supplies. The
part is housed in the industry standard 11-lead TO-220
molded plastic power package.
The circuit diagram of the LM2407 is shown in Figure 1. A
PNP emitter follower, Q5, provides input buffering. Q1 and
Q2 form a fixed gain cascode amplifier with resistors R1 and
R2 setting the gain at -14. Emitter followers Q3 and Q4 isolate the high output impedance of the cascode stage from
the capacitance of the CRT cathode which decreases the
sensitivity of the device to load capacitance. Q6 provides biasing to the output emitter follower stage to reduce crossover distortion at low signal levels.
Since the LM2407 is a high bandwidth amplifier, proper
power supply bypassing is critical for optimum performance.
Improper power supply bypassing can result in large overshoot, ringing and oscillation. A 0.01 µF capacitor should be
connected from the supply pin, VCC, to ground, as close to
the supply and ground pins as is practical. Additionally, a 10
µF to 100 µF electrolytic capacitor should be connected from
the supply pin to ground. The electrolytic capacitor should
also be placed reasonably close to the LM2407’s supply and
ground pins. A 0.1 µF capacitor should be connected from
the bias pin, VBB, to ground, as close as is practical to the
Figure 2 shows a typical test circuit for evaluation of the
LM2407. This circuit is designed to allow testing of the
LM2407 in a 50Ω environment without the use of an expensive FET probe. In this test circuit, two low inductance resistors in series totaling 4.95 kΩ form a 100:1 wideband, low
capacitance probe when connected to a 50Ω coaxial cable
and a 50Ω load (such as a 50Ω oscilloscope input). The input signal from the generator is ac coupled to the base of
During normal CRT operation, internal arcing may occasionally occur. Spark gaps, in the range of 200V, connected from
the CRT cathodes to CRT ground will limit the maximum voltage, but to a value that is much higher than allowable on the
LM2407. This fast, high voltage, high energy pulse can damage the LM2407 output stage. The application circuit shown
in Figure 9 is designed to help clamp the voltage at the output of the LM2407 to a safe level. The clamp diodes should
have a fast transient response, high peak current rating, low
series impedance and low shunt capacitance. FDH400 or
equivalent diodes are recommended. D1 and D2 should
have short, low impedance connections to VCC and ground
respectively. The cathode of D1 should be located very close
to a separately decoupled bypass capacitor (C3 in Figure 9).
The ground connection of the diode and the decoupling capacitor should be very close to the LM2407 ground. This will
significantly reduce the high frequency voltage transients
that the LM2407 would be subjected to during an arcover
condition. Resistor R2 limits the arcover current that is seen
by the diodes while R1 limits the current into the LM2407 as
well as the voltage stress at the outputs of the device. R2
should be a 1/2W solid carbon type resistor. R1 can be a
1/4W metal or carbon film type resistor. Inductor L1 is critical
to reduce the initial high frequency voltage levels that the
LM2407 would be subjected to. Having large value resistors
for R1 and R2 would be desirable, but this has the effect of
increasing rise and fall times. The inductor will not only help
protect the device but it will also help optimize rise and fall
times as well as minimize EMI. For proper arc protection, it is
important to not omit any of the arc protection components
shown in Figure 9.
Application Hints
National Semiconductor (NSC) is committed to provide application information that assists our customers in obtaining
the best performance possible from our products. The following information is provided in order to support this commitment. The reader should be aware that the optimization of
performance was done using a specific printed circuit board
designed at NSC. Variations in performance can be realized
due to physical changes in the printed circuit board and the
application. Therefore, the designer should know that component value changes may be required in order to optimize
performance in a given application. The values shown in this
document can be used as a starting point for evaluation purposes. When working with high bandwidth circuits, good layout practices are also critical to achieving maximum performance.
The LM2407 performance is targeted for the XGA resolution
market (1024 x 768, 85 Hz refresh). It is not designed to be
a direct replacement for the LM2405 or LM2406. The application circuits required to optimize performance and to protect against damage from CRT arcover are different for each
FIGURE 9. One Channel of the LM2407 with the Recommended Arc Protection Circuit
Application Hints
This example assumes a capacitive load of 8 pF and no resistive load.
Referring to Figure 9, there are three components (R1, R2
and L1) that can be adjusted to optimize the transient response of the application circuit. Increasing the values of R1
and R2 will slow the circuit down while decreasing overshoot. Increasing the value of L1 will speed up the circuit as
well as increase overshoot. It is very important to use inductors with very high self-resonant frequencies, preferably
above 300 MHz. Ferrite core inductors from J.W. Miller Magnetics (part # 78FR56M) were used for optimizing the performance of the device in the NSC application board. The values shown in Figure 9 can be used as a good starting point
for the evaluation of the LM2407. The NSC demo board also
has a position open to add a resistor in parallel with L1. This
resistor can be used to help control overshoot. Using variable resistors for R1 and the parallel resistor is a great way
to help dial in the values needed for optimum performance in
a given application. Once the optimum values are determined the variable resistors can be replaced with fixed values.
A typical application of the LM2407 is shown in Figure 10.
Used in conjunction with an LM1279, a complete video channel from monitor input to CRT cathode can be achieved. Performance is ideal for 1024 x 768 resolution displays with
pixel clock frequencies up to 100 MHz. Figure 10 is the schematic for the NSC demonstration board that can be used to
evaluate the LM1279/2407 combination in a monitor.
PC Board Layout Considerations
For optimum performance, an adequate ground plane, isolation between channels, good supply bypassing and minimizing unwanted feedback are necessary. Also, the length of the
signal traces from the preamplifier to the LM2407 and from
the LM2407 to the CRT cathode should be as short as possible. The following references are recommended:
Ott, Henry W., “Noise Reduction Techniques in Electronic
Systems” 2nd Edition, John Wiley & Sons, New York, 1988.
“Guide to CRT Video Design”, National Semiconductor Application Note 861.
Effect of Load Capacitance
Figure 8 shows the effect of increased load capacitance on
the speed of the device. This demonstrates the importance
of knowing the load capacitance in the application. The previous section discussed how to optimize the transient response in the application with the use of a series inductor.
Figure 7 shows the variation in rise and fall times when the
output offset of the device is varied from 40 VDC to 50 VDC.
The rise time shows a maximum variation relative to the center data point (45 VDC) is about 20%. The fall time shows a
variation of about 5% relative to the center data point.
“Video Amplifier Design for Computer Monitors”, National
Semiconductor Application Note 1013.
Pease, Robert A., “Troubleshooting Analog Circuits”,
Butterworth-Heinemann, 1991.
Because of its high small signal bandwidth, the part may oscillate in a monitor if feedback occurs around the video channel through the chassis wiring. To prevent this, leads to the
video amplifier input circuit should be shielded, and input circuit wiring should be spaced as far as possible from output
circuit wiring.
NSC Demonstration Board
Figure 4 shows the performance of the LM2407 in the test
circuit shown in Figure 2 as a function of case temperature.
The figure shows that the rise time of the LM2407 decreases
by approximately 5% as the case temperature increases
from 50˚C to 100˚C. This corresponds to a speed degradation of 1% for every 10˚C rise in case temperature. There is
a negligible change in fall time versus temperature in the test
Figure 6 shows the total power dissipation of the LM2407 vs.
Frequency when all three channels of the device are driving
an 8 pF load with a 40Vp-p signal. The graph assumes a 72%
active time (device operating at the specified frequency)
which is typical in a monitor application. The other 28% of
the time the device is assumed to be sitting at the black level
(65V in this case). This graph gives the designer the information needed to determine the heat sink requirement for his
application. The designer should note that if the load capacitance is increased the AC component of the total power dissipation will also increase.
The LM2407 case temperature must be maintained below
100˚C. If the maximum expected ambient temperature is
50˚C and the maximum power dissipation is 6.2W, then a
maximum heat sink thermal resistance can be calculated:
Figure 11 shows routing and component placement on the
NSC LM1279/2407 demonstration board. The schematic of
the board is shown in Figure 10. This board provides a good
example of a layout that can be used as a guide for future
layouts. Note the location of the following components:
• C55 — VCC bypass capacitor, located very close to pin 6
and ground pins
• C43, C44 — VBB bypass capacitors, located close to pin
10 and ground
• C53–C55 — VCC bypass capacitors, near LM2407 and
VCC clamp diodes. Very important for arc protection
The routing of the LM2407 outputs to the CRT is very critical
to achieving optimum performance. Figure 12 shows the
routing and component placement from pin 1 of the LM2407
to the blue cathode. Note that the components are placed so
that they almost line up from the output pin of the LM2407 to
the blue cathode pin of the CRT connector. This is done to
minimize the length of the video path between these two
components. Note also that D14, D15, R29 and D13 are
placed to minimize the size of the video nodes that they are
attached to. This minimizes parasitic capacitance in the
video path and also enhances the effectiveness of the protection diodes. The anode of protection diode D14 is connected directly to a section of the the ground plane that has
a short and direct path to the LM2407 ground pins. The cathode of D15 is connected to VCC very close to decoupling capacitor C55 (see Figure 12) which is connected to the same
Effect of Offset
Application Hints
stress on the LM2407 during an arc over event. Lastly, notice
that S1 is placed very close to the blue cathode and is tied
directly to CRT ground.
FIGURE 10. LM1279/240X Demonstration Board Schematic
section of the ground plane as D15. The diode placement
and routing is very important for minimizing the voltage
Application Hints
FIGURE 11. LM1279/240X Demo Board Layout
Application Hints
FIGURE 12. Trace Routing and Component Placement for Blue Channel Output
LM2407 Monolithic Triple 7.5 nS CRT Driver
Physical Dimensions
inches (millimeters) unless otherwise noted
NS Package Number TA11B
Order Number LM2407T
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