IS31AP2010B [email protected] MONO FILTER-LESS, CLASS-D AUDIO POWER AMPLIFIER GENERAL DESCRIPTION The IS31AP2010B is a high efficiency, [email protected] mono filter-less class-D audio power amplifier. A low noise, filter-less PWM architecture eliminates the output filter, reduces external component count, system cost, and simplifying design. Operating in a single 5.0V supply, IS31AP2010B is capable of driving 4Ω speaker load at a continuous average output of 3W@10% THD+N. The IS31AP2010B has high efficiency with speaker load compared to a typical class- AB amplifier. In cellular handsets, the earpiece, speaker phone, and melody ringer speaker can each be driven by the IS31AP2010B. The gain of IS31AP2010B is externally configurable which allows independent gain control from multiple sources by summing signals from each function. IS31AP2010B is available in UTQFN-9 packages. It operates from 2.7V to 5.5V over the temperature range of -40°C to +85°C. AUGUST 2011 FEATURES 5.0V supply at THD+N = 10% ―3W into 4Ω (Typ.) ―1.68W into 8Ω (Typ.) Efficiency at 5.0V ―85% at 400mW with a 4Ω speaker ―88% at 400mW with a 8Ω speaker Less than 1μA shutdown current Optimized PWM output stage eliminates LC output filter Fully differential design reduces RF rectification and eliminates bypass capacitor Improved CMRR eliminates two input coupling capacitors Integrated click-and-pop suppression circuitry UTQFN-9 package RoHS compliant and 100% lead(Pb)-free APPLICATIONS Wireless or cellular handsets and PDAs Portable DVD player Notebook PC Portable radio Educational toys Portable gaming TYPICAL APPLICATION CIRCUIT Figure 1 Typical Application Circuit Copyright © 2011 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized; b.) the user assume all such risks; and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 06/24/2011 1 IS31AP2010B PIN CONFIGURATION Package Pin Configuration (Top View) IN+ GND OUT- A1 A2 A3 VDD VDD GND B1 B2 B3 IN- SDB OUT+ C1 C2 C3 UTQFN-9 PIN DESCRIPTION No. Pin I/O Description A1 IN+ I Positive audio input. A2, B3 GND - Connect to ground. A3 OUT- O Negative audio output. B1, B2 VDD - Power supply. C1 IN- I Negative audio input. C2 SDB I Enter in shutdown mode when active low. C3 OUT+ O Positive audio output. ORDERING INFORMATION Industrial Range: -40°C to +85°C Order Part No. Package QTY/Reel IS31AP2010B-UTLS2-TR UTQFN-9, Lead-free 3000 Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 06/24/2011 2 IS31AP2010B ABSOLUTE MAXIMUM RATINGS (NOTE 1) Supply voltage, VDD Voltage at any input pin Junction temperature, TJMAX Storage temperature rang, Tstg Lead temperature 1.6mm(1/16 inch) from case for 10s Thermal resistance θJA(UTQFN) ESD (HBM) -0.3V ~ +5.5V -0.3V ~ VDD +0.3V -40°C ~ +150°C -65°C ~ +150°C - 260°C 70°C/W 6kV ELECTRICAL CHARACTERISTICS VDD = 2.7V ~ 5.5V, TA = 25°C, unless otherwise noted. (Note 2) Symbol Parameter VDD | VOS | Supply voltage Output offset voltage (measured differentially) IDD Quiescent current ISD Shutdown current fsw Switching frequency RIN Condition Input resistor Gain Min. Typ. 2.7 VSDB = 0V, AV = 2V/V 10 VDD = 5.5V, no load 2.6 VDD = 2.7V, no load 1.2 VSDB = 0.4V Max. Unit 5.5 V mV mA 1 250 Gain 20V/V kHz 15 RIN = 150kΩ μA kΩ 2 V/V VIH High-level input voltage 1.4 VDD V VIL Low-level input voltage 0 0.4 V Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 06/24/2011 3 IS31AP2010B ELECTRICAL CHARACTERISTICS TA = 25°C, Gain = 2V/V, CIN = 2μF, unless otherwise noted. (Note 3) Symbol Parameter Condition THD+N = 10% f = 1kHz, RL = 8Ω THD+N = 10% f = 1kHz, RL = 4Ω PO Output power THD+N = 1% f = 1kHz, RL = 8Ω THD+N = 1% f = 1kHz, RL = 4Ω Min. Typ. VDD = 5.0V 1.68 VDD = 4.2V 1.2 VDD = 3.6V 0.88 VDD = 5.0V 3.0 VDD = 4.2V 2.0 VDD = 3.6V 1.5 VDD = 5.0V 1.4 VDD = 4.2V 1.0 VDD = 3.6V 0.7 VDD = 5.0V 2.4 VDD = 4.2V 1.68 VDD = 3.6V 1.2 VDD = 4.2V, PO = 0.6W, RL = 8Ω, f = 1kHz 0.18 VDD = 4.2V, PO = 1.1W, RL = 4Ω, f = 1kHz 0.22 Max. Unit W W W W THD+N Total harmonic distortion plus noise VNO Output voltage noise VDD = 4.2V, f = 20Hz to 20kHz Inputs AC-grounded 80 μVrms TWU Wake-up time from shutdown VDD = 3.6V 32 ms SNR Signal-to-noise ratio PO = 1.0W, RL = 8Ω, VDD = 4.2V 91 dB Power supply rejection f = 217Hz，RL = 8Ω PSRR ratio Input grounded VDD = 5.0V -75 VDD = 4.2V -70 VDD = 3.6V -66 % dB Note: 1. Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. All parts are production tested at TA = 25°C. Other temperature limits are guaranteed by design. 3. Guaranteed by design. Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 06/24/2011 4 IS31AP2010B TYPICAL PERFORMANCE CHARACTERISTIC 20 20 RL = 8Ω f = 1kHz 10 10 VDD = 5.0V 5 5 VDD = 5.0V THD+N(%) THD+N(%) RL = 4Ω f = 1kHz 2 VDD = 4.2V 1 2 VDD = 4.2V 1 VDD = 3.6V 0.5 0.5 VDD = 3.6V 0.2 0.2 0.1 10m 50m 20m 100m 500m 1 2 0.1 10m 3 Figure 3 THD+N vs. Output Power 5 RL = 8Ω THD+N(%) THD+N(%) 1 0.5 0.2 VDD = 3.6V Po = 0.45W VDD = 5.0V Po = 0.9W 2 3 4 THD+N vs. Output Power RL = 4Ω 1 0.5 0.2 0.01 20 200 500 1k 2k 5k 50 100 20k 200 500 1k 2k 20k 5k Frequency(Hz) Frequency(Hz) Figure 4 VDD = 3.6V Po = 0.8W 0.02 0.02 100 VDD = 5.0V Po = 1.5W 0.1 VDD = 4.2V Po = 0.6W 50 VDD = 4.2V Po = 1.1W 0.05 0.05 0.01 20 1 2 2 0.1 500m 10 10 5 100m 50m Output Power(W) Output Power(W) Figure 2 20m Figure 5 THD+N vs. Frequency THD+N vs. Frequency +0 +0 RL = 8Ω Input Grouded -20 RL = 4Ω Input Grouded -20 VDD = 5.0V -40 PSRR(dB) PSRR(dB) -40 VDD = 5.0V VDD = 3.6V -60 VDD = 3.6V -60 -80 VDD = 4.2V -100 -80 -100 20 VDD = 4.2V -120 20 50 100 200 500 1k 2k 5k Frequency(Hz) Figure 6 50 100 20k 200 500 1k 2k 20k 5k Frequency(Hz) Figure 7 PSRR vs. Frequency PSRR vs. Frequency Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 06/24/2011 5 IS31AP2010B 200 100 80 100 RL=8Ω Efficiency(%) Output Voltage(uV) VDD = 3.6V~5.0V RL = 4Ω, 8Ω 70 50 30 20 RL=4Ω 60 40 20 VDD = 5.0V 10 20 50 100 200 500 1k 2k 5k Frequency(Hz) Figure 8 Noise Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 06/24/2011 20k 0 0 0.3 0.6 0.9 1.2 1.5 Output Power(W) Figure 9 Efficiency 6 IS31AP2010B APPLICATION INFORMATION VBattery Cs 1 F Fully Differential Amplifier The IS31AP2010B is a fully differential amplifier with differential inputs and outputs. The fully differential amplifier consists of a differential amplifier and a common mode amplifier. The differential amplifier ensures that the amplifier outputs a differential voltage on the output that is equal to the differential input times the gain. The common-mode feedback ensures that the common-mode voltage at the output is biased around VDD/2 regardless of the common-mode voltage at the input. The fully differential IS31AP2010B can still be used with a single-ended input; however, the IS31AP2010B should be used with differential inputs when in a noisy environment, like a wireless handset, to ensure maximum noise rejection. CIN 0.1 F RIN 150k Single-ended Input CIN 0.1 F B1 B2 GSM handsets save power by turning on and shutting off the RF transmitter at a rate of 217Hz. The transmitted signal is picked-up on input and output traces. The fully differential amplifier cancels the signal much better than the typical audio amplifier. Component Selection Figure 10 shows the IS31AP2010B with differential inputs and input capacitors, and Figure 11 shows the IS31AP2010B with single-ended inputs. Differential inputs should be used whenever possible because the single-ended inputs are much more susceptible to noise. Internal Oscillator C1 IN- A1 IN+ C2 SDB OUT+ C3 PWM H-Bridge OUT- A3 RIN 150k Shutdown Control Bias Circuitry GND 100k Figure 11 A2, B3 300k Single-Ended Input Input Resistors (RIN) The input resistors (RIN) set the gain of the amplifier according to Equation (1). Advantages of Fully Differential Amplifiers The fully differential amplifier does not require a bypass capacitor. This is because any shift in the mid-supply affects both positive and negative channels equally and cancels at the differential output. VDD Gain 2 RF V R IN V (1) Resistor matching is very important in fully differential amplifiers. The balance of the output on the reference voltage depends on matched ratios of the resistors. CMRR, PSRR, and cancellation of the second harmonic distortion diminish if resistor mismatch occurs. Therefore, it is recommended to use 1% tolerance resistors or better to keep the performance optimized. Matching is more important than overall tolerance. Resistor arrays with 1% matching can be used with a tolerance greater than 1%. Place the input resistors very close to the IS31AP2010B to limit noise injection on the high-impedance nodes. For optimal performance the gain should be set to 2V/V or lower. Lower gain allows the IS31AP2010B to operate at its best, and keeps a high voltage at the input making the inputs less susceptible to noise. Decoupling Capacitor (CS) Figure 10 Differential Input Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 06/24/2011 The IS31AP2010B is a high performance class-D audio amplifier that requires adequate power supply decoupling to ensure the efficiency is high and total harmonic distortion (THD) is low. For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic capacitor, typically 1μF, placed as close as possible to the device VDD lead works best. Placing this decoupling capacitor close to the IS31AP2010B is very important for the efficiency of the class-D amplifier, because any resistance or inductance in the trace between the device and the capacitor can cause a loss in efficiency. For filtering lower frequency noise signals, a 10μF or greater capacitor placed near the audio power amplifier would also help, but it is not required in most applications because of the high PSRR of this device 7 IS31AP2010B Input Capacitors (CIN) The input capacitors and input resistors form a high pass filter with the corner frequency, fC, determined in Equation (2). 1 f c 2R C IN IN (2) 1 2RIN f c CIN2 0.1 F RIN2 150k CIN2 0.1 F RIN2 150k CIN1 0.1 F RIN1 150k Differential Input 2 The value of the input capacitor is important to consider as it directly affects the bass (low frequency) performance of the circuit. Speakers in wireless phones cannot usually respond well to low frequencies, so the corner frequency can be set to block low frequencies in this application. Equation (3) is reconfigured to solve for the input coupling capacitance. C IN If summing a ring tone and a phone signal, set the ring-tone gain to Gain2 = 2V/V, and the phone gain to Gain1 = 0.1V/V. The resistor values would be RIN1 = 3MΩ, RIN2 = 150kΩ (3) Differential Input 1 CIN1 0.1 F For a flat low frequency response, use large input coupling capacitors (1μF). However, in a GSM phone the ground signal is fluctuating at 217Hz, but the signal from the codec does not have the same 217Hz fluctuation. The difference between the two signals is amplified, sent to the speaker, and heard as a 217Hz hum. Summing Input Signals Most wireless phones or PDAs need to sum signals at the audio power amplifier or just have two signal sources that need separate gain. The IS31AP2010B makes it easy to sum signals or use separate signal sources with different gains. Many phones now use the same speaker for the earpiece and ringer, where the wireless phone would require a much lower gain for the phone earpiece than for the ringer. PDAs and phones that have stereo headphones require summing of the right and left channels to output the stereo signal to the mono speaker. Summing Two Differential Input Signals Two extra resistors are needed for summing differential signals (a total of 5 components). The gain for each input source can be set independently (see Equations (4) and (5) and Figure 12). Gain1 VO 2 R F V R IN 1 V VI 1 (4) Gain 2 VO 2 R F V R IN 2 V VI 2 (5) C1 IN- A1 IN+ PWM B1 OUT+ C3 OUT- A3 H-Bridge VBattery Cs 1 F B2 RIN1 150k C2 Shutdown Control SDB Bias Circuitry GND A2, B3 300k Figure 12 If the corner frequency is within the audio band, the capacitors should have a tolerance of ±10% or better, because any mismatch in capacitance causes an impedance mismatch at the corner frequency and below. VDD Internal Oscillator Summing Two Differential Inputs Summing a Differential Input Signal and a Single-Ended Input Signal Figure 13 shows how to sum a differential input signal and a single-ended input signal. Ground noise may couple in through IN- with this method. It is better to use differential inputs. The corner frequency of the single-ended input is set by CIN2, shown in Equation (8). To assure that each input is balanced, the single-ended input must be driven by a low-impedance source even if the input is not in use. VO 2 R F V R IN 1 V VI 1 V 2 RF V Gain 2 O R IN 2 V VI 2 Gain1 C IN 2 1 2RIN 2 f c 2 (6) (7) (8) If summing a ring tone and a phone signal, the phone signal should use a differential input signal while the ring tone might be limited to a single-ended signal. Phone gain is set at Gain1 = 0.1V/V, and the ring-tone gain is set to Gain2 = 2V/V, the resistor values would be RIN1 = 3MΩ, RIN2 = 150kΩ The high pass corner frequency of the single-ended input is set by CIN2. If the desired corner frequency is less than 20Hz. C IN 2 1 2 150 k 20 Hz C IN 2 53 pF (9) (10) If summing left and right inputs with a gain of 1V/V, use RIN1 = RIN2 = 300kΩ. Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 06/24/2011 8 IS31AP2010B Figure 13 Signals Summing Differential Input and Single-Ended Input Figure 14 Summing Two Single-Ended Input Signals The gain and corner frequencies (fC1 and fC2) for each input source can be set independently (see Equations (11) through (14) and Figure 14). Resistor, RP, and capacitor, CP, are needed on the IN- terminal to match the impedance on the IN+ terminal. The single-ended inputs must be driven by low impedance sources even if one of the inputs is not outputting an ac signal. Gain1 VO 2 R F V R IN 1 V VI 1 VO 2 R F V R IN 2 V VI 2 1 C IN 1 2RIN 1 f c1 (11) 1 2RIN 2 f c 2 C p C IN 1 C IN 2 RP R IN 1 R IN 2 R IN 1 R IN 2 EMI Evaluation Result 80 dBuV/m 70 60 50 RE_B 40 30 Gain 2 C IN 2 Summing Two Single-Ended Inputs (12) 20 10 (13) 0 (14) 30 Figure 15 100 1000 MHz EMI Evaluation Result (15) (16) Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 06/24/2011 9 IS31AP2010B CLASSIFICATION REFLOW PROFILES Profile Feature Pb-Free Assembly Preheat & Soak Temperature min (Tsmin) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts) 150°C 200°C 60-120 seconds Average ramp-up rate (Tsmax to Tp) 3°C/second max. Liquidous temperature (TL) Time at liquidous (tL) 217°C 60-150 seconds Peak package body temperature (Tp)* Max 260°C Time (tp)** within 5°C of the specified classification temperature (Tc) Max 30 seconds Average ramp-down rate (Tp to Tsmax) 6°C/second max. Time 25°C to peak temperature 8 minutes max. Figure 16 Classification Profile Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 06/24/2011 10 IS31AP2010B TAPE AND REEL INFORMATION Note: All dimensions in millimeters unless otherwise stated. Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 06/24/2011 11 IS31AP2010B PACKAGING INFORMATION UTQFN-9 Note: All dimensions in millimeters unless otherwise stated. Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 06/24/2011 12