KERSEMI SIHFBC40

IRFBC40, SiHFBC40
Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
• Dynamic dV/dt Rating
600
RDS(on) (Ω)
VGS = 10 V
• Repetitive Avalanche Rated
1.2
RoHS*
Qg (Max.) (nC)
60
• Fast Switching
Qgs (nC)
8.3
• Ease of Paralleling
30
• Simple Drive Requirements
Qgd (nC)
Configuration
Single
DESCRIPTION
TO-220
Third generation Power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The TO-220 package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 50 W. The low thermal resistance
and low package cost of the TO-220 contribute to its wide
acceptance throughout the industry.
G
S
D
COMPLIANT
• Lead (Pb)-free Available
D
G
Available
S
N-Channel MOSFET
ORDERING INFORMATION
Package
TO-220
IRFBC40PbF
SiHFBC40-E3
IRFBC40
SiHFBC40
Lead (Pb)-free
SnPb
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
LIMIT
Drain-Source Voltage
VDS
600
Gate-Source Voltage
VGS
± 20
Continuous Drain Current
VGS at 10 V
TC = 25 °C
TC = 100 °C
Pulsed Drain Currenta
ID
IDM
Linear Derating Factor
Energyb
UNIT
V
6.2
3.9
A
25
1.0
W/°C
mJ
EAS
570
Repetitive Avalanche Currenta
IAR
6.2
A
Repetitive Avalanche Energya
EAR
13
mJ
PD
125
W
dV/dt
3.0
V/ns
TJ, Tstg
- 55 to + 150
Single Pulse Avalanche
Maximum Power Dissipation
Peak Diode Recovery
TC = 25 °C
dV/dtc
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
Mounting Torque
for 10 s
6-32 or M3 screw
300d
°C
10
lbf · in
1.1
N·m
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. VDD = 50 V, starting TJ = 25 °C, L = 27 mH, RG = 25 Ω, IAS = 6.2 A (see fig. 12).
c. ISD ≤ 6.2 A, dI/dt ≤ 80 A/µs, VDD ≤ VDS, TJ ≤ 150 °C.
d. 1.6 mm from case.
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IRFBC40, SiHFBC40
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
Maximum Junction-to-Ambient
RthJA
-
62
Case-to-Sink, Flat, Greased Surface
RthCS
0.50
-
Maximum Junction-to-Case (Drain)
RthJC
-
1.0
UNIT
°C/W
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
Gate-Source Threshold Voltage
VDS
VGS = 0 V, ID = 250 µA
600
-
-
V
ΔVDS/TJ
Reference to 25 °C, ID = 1 mA
-
0.7
-
V/°C
VGS(th)
VDS = VGS, ID = 250 µA
2.0
-
4.0
V
Gate-Source Leakage
IGSS
VGS = ± 20 V
-
-
± 100
nA
Zero Gate Voltage Drain Current
IDSS
VDS = 600 V, VGS = 0 V
-
-
100
VDS = 480 V, VGS = 0 V, TJ = 125 °C
-
-
500
µA
-
-
1.2
Ω
gfs
VDS = 100 V, ID = 3.7 Ab
4.7
-
-
S
Input Capacitance
Ciss
VGS = 0 V,
-
1300
-
Output Capacitance
Coss
VDS = 25 V,
-
160
-
Reverse Transfer Capacitance
Crss
f = 1.0 MHz, see fig. 5
-
30
-
Total Gate Charge
Qg
-
-
60
-
-
8.3
Drain-Source On-State Resistance
Forward Transconductance
RDS(on)
ID = 3.7Ab
VGS = 10 V
Dynamic
Gate-Source Charge
Qgs
VGS = 10 V
ID = 6.2 A, VDS = 360 V,
see fig. 6 and 13b
Gate-Drain Charge
Qgd
-
-
30
Turn-On Delay Time
td(on)
-
13
-
Rise Time
Turn-Off Delay Time
Fall Time
pF
nC
tr
VDD = 300 V, ID = 6.2 A,
-
18
-
td(off)
RG = 9.1 Ω, RD = 47 Ω, see fig. 10b
-
55
-
-
20
-
-
4.5
-
-
7.5
-
-
-
6.2
-
-
25
-
-
1.5
-
450
940
ns
-
3.8
7.9
µC
tf
Internal Drain Inductance
LD
Internal Source Inductance
LS
Between lead,
6 mm (0.25") from
package and center of
die contact
D
ns
nH
G
S
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward Currenta
Body Diode Voltage
IS
ISM
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Forward Turn-On Time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
A
G
S
TJ = 25 °C, IS = 6.2 A, VGS = 0 Vb
TJ = 25 °C, IF = 6.2 A, dI/dt = 100 A/µsb
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %.
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D
V
IRFBC40, SiHFBC40
Fig. 1 - Typical Output Characteristics, TC = 25 °C
Fig. 2 - Typical Output Characteristics, TC = 150 °C
Fig. 3 - Typical Transfer Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
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IRFBC40, SiHFBC40
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
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Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 8 - Maximum Safe Operating Area
IRFBC40, SiHFBC40
RD
VDS
VGS
D.U.T.
RG
+
- VDD
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
Fig. 10a - Switching Time Test Circuit
VDS
90 %
10 %
VGS
td(on)
Fig. 9 - Maximum Drain Current vs. Case Temperature
td(off) tf
tr
Fig. 10b - Switching Time Waveforms
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
L
Vary tp to obtain
required IAS
VDS
VDS
tp
VDD
D.U.T
RG
+
-
IAS
V DD
A
VDS
10 V
tp
0.01 Ω
IAS
Fig. 12a - Unclamped Inductive Test Circuit
Fig. 12b - Unclamped Inductive Waveforms
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IRFBC40, SiHFBC40
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
QG
10 V
12 V
0.2 µF
0.3 µF
QGS
QGD
+
D.U.T.
VG
-
VDS
VGS
3 mA
Charge
IG
ID
Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
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Fig. 13b - Gate Charge Test Circuit
IRFBC40, SiHFBC40
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
RG
•
•
•
•
dV/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by duty factor "D"
D.U.T. - device under test
Driver gate drive
P.W.
+
Period
D=
+
-
VDD
P.W.
Period
VGS = 10 V*
D.U.T. ISD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
VDD
Body diode forward drop
Inductor current
Ripple ≤ 5 %
ISD
* VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
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