NX9511B 9A SYNCHRONOUS BUCK SWITCHING REGULATORWITH 1MHz OPERATION FREQUENCY PRELIMINARY DATA SHEET Pb Free Product FEATURES DESCRIPTION The NX9511B is synchronous buck switching converter in multi chip module designed for step down DC to DC converter applications. They are optimized to convert bus voltages from 2V to 25V to as low as 0.8V output voltage. The output current can be up to 9A. The NX9511B offer an Enable pin that can be used to program the converter's start up. NX9511B operates at fixed internal frequency of 1MHz and employ loss-less current limiting protection by sensing the Rdson of synchronous MOSFET followed by latch out feature. Feedback under voltage triggers Hiccup. Other features are: Internal digital soft start; Vcc undervoltage lock out and shutdown capability via the enable pin or comp pin. NX9511B is available in 5x5 MCM package. n n n n n n n Switching Controller and MOSFETs in one package Bus voltage operation from 2V to 25V Fixed 1MHz Internal Digital Soft Start Function Output current up to 9A Enable pin to program BUS UVLO Programmable current limit triggers latch out by sensing Rdson of Synchronous MOSFET n No negative spike at Vout during startup and shutdown n Pb-free and RoHS compliant APPLICATIONS n n n n Low Profile On board DC to DC Application Graphic Card on board converters Memory Vddq Supply ADSL Modem TYPICAL APPLICATION Vin1 +12V Vin2 +5V D1 VCC 1uF 2*22uF EN COMP 820p 15p 20k NX9511B BAT54A FB LG AGND BST S1 D2 SW 0.1uF 1uH Vout +1.2V,9A 6x (22uF,X5R) 5k OCP HG HDRV S2 200 40k 390p 16k Figure 1 - Typical application of 9511B ORDERING INFORMATION Device NX9511BCMTR Rev.1.5 01/16/08 Temperature 0 to 70oC Package 5X5 MCM-32L Frequency 1MHz Pb-Free Yes 1 NX9511B ABSOLUTE MAXIMUM RATINGS VCC to GND & BST to SW voltage .................... -0.3V to 6.5V D1 to GND ........................................................ 25V BST to GND Voltage ........................................ -0.3V to 35V D2,S1 to GND .................................................. -2V to 35V All other pins .................................................... -0.3V to VCC+0.3V or 6.5V Storage Temperature Range ............................... -65oC to 150oC Operating Junction Temperature Range ............... -40oC to 125oC ESD Susceptibility ........................................... 2kV Power Dissipation ............................................. TBD Output Current ...................................................TBD CAUTION: Stresses above those listed in "ABSOLUTE MAXIMUM RATINGS", may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. PACKAGE INFORMATION SW HDRV BST AGND HG D1 D1 D1 32-LEAD PLASTIC MCM 5 x 5 32 31 30 29 28 27 26 25 24 OCP S1 1 S1 2 S1 3 D1 4 21 AGND D2 5 20 EN D1 (PAD2) D2 6 22 FB 19 D2 D2 (PAD3) D2 7 D2 23 COMP AGND (PAD1) 18 VCC 17 NC 8 Rev.1.5 01/16/08 LG NC S2 S2 S2 S2 S2 S2 9 10 11 12 13 14 15 16 2 NX9511B ELECTRICAL SPECIFICATIONS Unless otherwise specified, these specifications apply over Vcc = 5V, VIN = 12V and TA= 0 to 70oC. Typical values refer to TA = 25oC. Low duty cycle pulse testing is used which keeps junction and case temperatures equal to the ambient temperature. PARAMETER Reference Voltage Ref Voltage Ref Voltage line regulation Supply Voltage(Vcc) VCC Voltage Range VCC Supply Current (Static) Supply Voltage(VBST) VBST Supply Current (Static) VCC, VBST Supply Current (Dynamic) Under Voltage Lockout VCC-Threshold VCC-Hysteresis Oscillator Frequency Ramp-Amplitude Voltage Max Duty Cycle Min Duty Cycle Error Amplifiers Transconductance Input Bias Current EN & SS Soft Start time Enable HI Threshold Enable Hysterises Ouput Stage High Side MOSFET RDSON Low Side MOSFET RDSON Output Current OCP Adjust OCP current FB Under Voltage Protection FB Under Voltage Threshold Rev.1.5 01/16/08 SYM Test Condition Min TYP MAX 0.8 0.2 VREF VCC ICC (Static) Outputs not switching 4.5 5 3 Units V % 5.5 V mA IBST (Static) Outputs not switching 0.2 mA I(Dynamic) 15 mA VCC_UVLO VCC Rising 4 V 0.2 V FS 1 MHz VRAMP 1.5 V VCC_Hyst VCC Falling 75 0 Ib Tss % % 2000 10 umho nA 2 1.25 150 mS V mV 17 17 9 ohm ohm A 40 uA 0.48 V 3 NX9511B PIN DESCRIPTIONS PIN # 1-3 PIN SYMBOL PIN DESCRIPTION S1 Bus input which is connected to high side MOSFET's drain. 5-8,19 D2 Drain of low side MOSFET. 9-14 S2 Source of low side MOSFET and need to be connected to power ground. 15,17 NC 16 LG 18 VCC 20 EN External enable signal input for the controller. 22 FB This pin is the error amplifier inverting input. It is connected via resistor divider to the output of the switching regulator to set the output DC voltage. When FB pin voltage is lower than 0.6V, hiccup circuit starts to recycle the soft start circuit after 2048 switching cycles. 23 COMP This pin is the output of error amplifier and is used to compensate the voltage control feedback loop. This pin can also be used to perform a shutdown if pulled lower than 0.3V. 24 OCP This pin is connected to the drain of the external low side MOSFET via resistor and is the input of the over current protection(OCP) comparator. An internal current source 40uA is flown to the external resistor which sets the OCP voltage across the Rdson of the low side MOSFET. Current limit point is this voltage divided by the Rds-on. Once this threshold is reached the Hdrv and Ldrv pins are latched out. Ground pin. 25 SW SW is the controller pin out which needs to be connected to S1and D2 and provides return path for the high side driver. 26 HDRV High side gate driver output which needs to be connected high side MOSFET gate HG. 27 BST This pin supplies voltage to high side FET driver. A high freq 0.1uF ceramic capacitor is placed as close as possible to and connected to these pins and respected SW pins. 21,28 AGND 29 HG High side MOSFET gate which needs to be connected to high side gate driver output HDRV. 30-32,4 D1 Drain of High side MOSFET. Rev.1.5 01/16/08 Low side gate driver output for monitoring. Power supply voltage. A high freq 1uF ceramic capacitor is placed as close as possible to and connected to this pin and ground pin. The maximum rating of this pin is 5V. Analog ground. 4 NX9511B BLOCK DIAGRAM BST VCC HDRV HG D1 FB Hiccup Logic 0.6V Bias Generator 1.25V OC 0.8V UVLO POR START EN 1.25 /1.15 S1 OC PWM OSC Digital start Up SW Control Logic START 0.8V D2 VCC ramp S R Q OC FB S2 0.6V CLAMP COMP START 40uA 1.3V CLAMP Latch Out LG OCP OCP comparator AGND Figure 2 - Simplified block diagram of the NX9511B Rev.1.5 01/16/08 5 NX9511B Vin1 +12V D1 EN C5 15p C4 820p COMP R5 20k FB LG AGND VCC NX9511B Cin 2*22uF Vin2 +5V C1 1uF D1 BAT54A BST S1 D2 SW C2 0.1uF L1 1uH Cout 6x (22uF,X5R) R1 5k OCP HG HDRV S2 R2 200 Vout +1.2V,9A R3 40k C3 390p R4 16k Figure 3- Demo board schematic Rev.1.5 01/16/08 6 NX9511B Bill of Materials Item 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Rev.1.5 01/16/08 Quantity 1 1 1 8 1 1 1 1 1 1 1 1 1 1 Reference C1 C2 C5 Cin,Cout C4 C3 D1 L2 R5 R3 R2 R4 U1 U2 Value 1u 0.1u 15p 22u 820p 390p BAT54A DO3316P-102HC 20k 40k 200 16k NX9511B/MLPQ32 L78L05AB/sot89 Manufacture Coilcraft NEXSEM INC. 7 NX9511B Demoboard waveforms Figure 5 - Output voltage transient response (VIN=12V, VOUT=1.2V, IOUT=4A) Figure 4 - Output ripple (VIN=12V,VOUT=1.2V) Figure 6 - Over current protection Figure 7 - Startup 85.00% EFFICIENCY 80.00% 75.00% 70.00% 65.00% 60.00% 0 2 4 6 8 10 OUTPUT CURRENT(A) Figure 8 - Output Efficiency @VOUT=1.2V,VIN=12V Rev.1.5 01/16/08 8 NX9511B Efficiency v.s. Output Voltage Vin=12V Iout=4A 95.00% Efficiency(%) 90.00% 85.00% 80.00% 75.00% 70.00% 1 2 3 4 5 Vout(V) Figure 9 - Output Efficiency Ef f icienc y v .s. Output Voltage V in=12V Iout=6A 95.00% Efficiency(%) 90.00% 85.00% 80.00% 75.00% 70.00% 1 2 3 4 5 Vout(V ) Figure 10 - Output Efficiency Rev.1.5 01/16/08 9 NX9511B Efficiency v.s. Output Voltage Vin=12V Iout=8A 95.00% Efficiency(%) 90.00% 85.00% 80.00% 75.00% 70.00% 1 2 3 4 5 4 5 Vout(V) Figure 11 - Output Efficiency Ef f iciency v.s. Output Voltage V in=12V Iout=9A 95.00% Efficiency(%) 90.00% 85.00% 80.00% 75.00% 70.00% 65.00% 1 2 3 Vout(V ) Figure 12 - Output Efficiency Rev.1.5 01/16/08 10 NX9511B Typical application Vin 30 D1 VCC 30 1uF 35k 2*22uF EN COMP 560p 15p 25k FB LG AGND NX9511B TL431 +5V to 7.5V BAT54A 25k BST 0.1uF 0.33uH S1 D2 SW Vout +1.2V,7A 6x (22uF,X5R) 3k OCP HG HDRV S2 200 40k 330p 16k Figure 13 - Typical application of 9511B 88.00% 86.00% 84.00% 82.00% 80.00% 78.00% 76.00% 74.00% 72.00% 0 2 4 6 8 OUTPUT CURRENT(A) Figure 14 - Output voltage transient response (VIN=5V, VOUT=1.2V, IOUT=1.5A) Rev.1.5 01/16/08 Figure 15 - Output Efficiency @VOUT=1.2V,VIN=5V 11 NX9511B APPLICATION INFORMATION Symbol Used In Application Information: VIN - Input voltage VOUT - Output voltage IOUT - Output current = DVRIPPLE - Output voltage ripple FS ∆IRIPPLE = VIN -VOUT VOUT 1 × × LOUT VIN FS ...(2) 12V-1.8V 1.8V 1 × × = 2.25A 0.68uH 12V 1000kHz Output Capacitor Selection - Working frequency Output capacitor is basically decided by the DIRIPPLE - Inductor current ripple amount of the output voltage ripple allowed during steady state(DC) load condition as well as specification for the load transient. The optimum design may require a couple Design Example The following is typical application for NX9511B: of iterations to satisfy both condition. The amount of voltage ripple during the DC load VIN = 12V condition is determined by equation(3). VOUT=1.8V FS=1000kHz ∆VRIPPLE = ESR × ∆IRIPPLE + IOUT=9A DVRIPPLE <=20mV ∆IRIPPLE 8 × FS × COUT ...(3) Where ESR is the output capacitors' equivalent DVDROOP<=100mV @ 9A step series resistance,COUT is the value of output capacitors. Typically ceramic capacitors are selected as out- Output Inductor Selection put capacitors in NX9811B applications. DC ripple spec The selection of inductor value is based on inductor ripple current, power rating, working frequency and efficiency. Larger inductor value normally means smaller is easy to be met, usually mutiple ceramic capacitors are required at the output to meet transient requirement. In this example, two 47uF,X5R are used. ripple current. However if the inductance is chosen too large, it brings slow response and lower efficiency. Usu- Compensator Design ally the ripple current ranges from 20% to 40% of the Due to the double pole generated by LC filter of the output current. This is a design freedom which can be power stage, the power system has 180o phase shift , decided by design engineer according to various appli- and therefore, is unstable by itself. In order to achieve cation requirements. The inductor value can be calcu- accurate output voltage and fast transient lated by using the following equations: response,compensator is employed to provide highest L OUT = VIN -VOUT VOUT 1 × × ∆IRIPPLE VIN FS IRIPPLE =k × IOUTPUT possible bandwidth and enough phase margin.Ideally,the ...(1) where k is between 0.2 to 0.4. Select k=0.3, then 12V-1.8V 1.8V 1 × × 0.4 × 9A 12V 1000kHz L OUT =0.42uH L OUT = Choose inductor from COILCRAFT DO3316H681MLD with L=0.68uH is a good choice. Current Ripple is recalculated as Rev.1.5 01/16/08 Bode plot of the closed loop system has crossover frequency between1/10 and 1/5 of the switching frequency, phase margin greater than 50o and the gain crossing 0dB with -20dB/decade. Power stage output capacitors usually decide the compensator type. If electrolytic capacitors are chosen as output capacitors, type II compensator can be used to compensate the system, because the zero caused by output capacitor ESR is lower than crossover frequency. Otherwise type III compensator should be chosen. 12 NX9511B A. Type III compensator design For low ESR output capacitors, typically such as Sanyo oscap and poscap, the frequency of ESR zero Zf C1 Vout Zin caused by output capacitors is higher than the crossover frequency. In this case, it is necessary to compen- R3 sate the system with type III compensator. The follow- R2 ing figures and equations show how to realize the type III C3 compensator by transconductance amplifier. C2 R4 Fb gm FZ1 = 1 2 × π × R 4 × C2 ...(4) FZ2 = 1 2 × π × (R 2 + R 3 ) × C 3 ...(5) FP1 = 1 2 × π × R 3 × C3 ...(6) FP2 = 1 C × C2 2 × π × R4 × 1 C1 + C 2 Ve R1 Vref Figure 16 - Type III compensator using transconductance amplifier ...(7) where FZ1,FZ2,FP1 and FP2 are poles and zeros in the compensator. Their locations are shown in figure 4. The transfer function of type III compensator for Gain(db) power stage FLC 40dB/decade transconductance amplifier is given by: Ve 1 − gm × Z f = VOUT 1 + gm × Zin + Z in / R1 For the voltage amplifier, the transfer function of loop gain 20dB/decade FESR compensator is Ve −Z f = VOUT Zin FO compensator To achieve the same effect as voltage amplifier, the compensator of transconductance amplifier must satisfy this condition: R 4>>2/gm. And it would be desirable if R 1||R2||R3>>1/gm can be met at the same time. FZ1 FZ2 FP2 FP1 F S Figure 17 - Bode plot of Type III compensator Rev.1.5 01/16/08 13 NX9511B Design example for type III compensator are in order. The crossover frequency has to be selected as FLC<FO<FESR, and FO<=1/10~1/5Fs. 1.Calculate the location of LC double pole F LC 1 2 × π × 0.5 × 2 0 k H z × 30k Ω = 533pF = and ESR zero FESR. FLC = = 1 Choose C2=520pF. 2 × π × L OUT × COUT 1 2 × π × 0.68uH × 94uF = 20kHz FESR = 1 2 × π × 0.5m Ω × 94uF = 3.4MHz 2. Set R2 equal to 20kΩ. R 2 × VREF 60k Ω × 0.8V = = 48k Ω VOUT -VREF 1.8V-0.8V Choose R1=48kΩ. 3. Set zero FZ2 = 0.75FLC and Fp1 =FESR . 4. Calculate R4 and C3 with the crossover frequency at 1/10~ 1/5 of the switching frequency. Set FO=100kHz. C3 = 6. Calculate C 1 by equation (14) with pole F p2 at half the switching frequency. 1 1 1 ×( ) 2 × π × R2 Fz2 Fp1 1 1 1 ×( ) 2 × π × 60kΩ 15kHz 3.4MHz =180pF = V 2 × π × FO × L R4 = OSC × × Cout Vin C3 1.5V 2 × π × 100kHz × 0.68uH = × × 94uF 12V 180pF =28kΩ Choose C3=180pF, R 4=30kΩ. 1 2 × π × R 4 × FP2 C1 = 1 2 × π × 30k Ω × 500kHz = 10pF = 1 2 × π × ESR × C OUT = R1= 1 2 × π × FZ1 × R 4 C2 = Choose C1=12pF 7. Calculate R 3 by equation (13). R3 = 1 2 × π × FP1 × C3 1 2 × π × 3.4MHz × 180pF = 261Ω = Choose R3=300Ω. Output Voltage Calculation Output voltage is set by reference voltage and external voltage divider. The reference voltage is fixed at 0.8V. The divider consists of two ratioed resistors so that the output voltage applied at the Fb pin is 0.8V when the output voltage is at the desired value. The following equation and picture show the relationship between VOUT , VREF and voltage divider.. R 1= R 2 × VR E F V O U T -V R E F ...(8) where R2 is part of the compensator, and the value of R1 value can be set by voltage divider. See compensator design for R1 and R2 selection. 5. Calculate C2 with zero Fz1 at 50% of the LC double pole by equation (11). Rev.1.5 01/16/08 14 NX9511B The NX9511B can be turned off by pulling down the Vout Enable pin by extra signal MOSFET as shown in the above Figure. When Enable pin is below 1.25V, the digi- R2 tal soft start is reset to zero. In addition, all the high side Fb and low side driver is off and no negative spike will be generated during the turn off. R1 Vref Over Current Protection Over current protection is achieved by sensing cur- Voltage divider rent through the low side MOSFET. An internal current Figure 18 - Voltage divider source of 40uA flows through an external resistor connected from OCP pin to SW node sets the over current protection threshold. When synchronous FET is on, the Soft Start and Enable voltage at node SW is given as NX9511B has digital soft start for switching controller and has one enable pin for this start up. When the Power Ready (POR) signal is high and the voltage at VSW =-IL × RDSON The voltage at pin OCP is given as enable pin is above 1.25V the internal digital counter IOCP × ROCP +VSW starts to operate and the voltage at positive input of Error When the voltage is below zero, the over current amplifier starts to increase, the feedback network will occurs. force the output voltage follows the reference and starts vbus the output slowly. After 2048 cycles, the soft start is I OCP 40uA complete and the output voltage is regulated to the de- OCP sired voltage decided by the feedback resistor divider. SW R OCP OCP comparator + Vbus Figure 20 - Over current protection POR R1 OFF ON R2 10k EN 1.25V/ 1.15V Digital start up The over current limit can be set by the following equation ISET = Figure 19 - Enable and Shut down the NX9511B with Enable pin. The start up of NX9511B can be programmed through resistor divider at Enable pin. For example, if the input bus voltage is12V and we want NX9511B starts IOCP × ROCP K × RDSON The internal MOSFET RDSON=17mΩ, the worst case thermal consideration K=1.3 and the current limit is set at 10A, then R OCP = ISET × K × R DSON 10A × 1.3 × 17m Ω = = 5.5k Ω IOCP 40uA Choose ROCP=5.5kΩ when Vbus is above 9V. We can select using the following equation. R1 = Rev.1.5 01/16/08 (9V − 1.25V) × R2 1.25V 15 NX9511B MLPQ 32 PIN 5 x 5 PACKAGE OUTLINE DIMENSIONS NOTE: ALL DIMENSIONS ARE DISPLAYED IN MILLIMETERS. Rev.1.5 01/16/08 16