LSI/CSI UL ® LS8397 LSI Computer Systems, Inc. 1235 Walt Whitman Road, Melville, NY 11747 (631) 271-0400 FAX (631) 271-0405 A3800 STEPPER MOTOR CONTROLLER The LS8397 Stepper Motor Controller generates four phase drive signal outputs for controlling two phase Bipolar and four phase Unipolar motors. The outputs are used to drive two H-bridges for the two motor windings in the Bipolar motor or the four driver transistors for the two center- tapped windings in the Unipolar motor. The motor can be driven in full step mode either in normal drive (two-phase-on) or wave drive (one-phase-on) and half step mode. The LS8397 provides two inhibit outputs which are used to control the driver stages of each of the motor phases. The circuit uses STEP, FRD/REV and HALF/FULL inputs in a translator to generate controls for the output stages. A dual PWM chopper circuit using an on-chip oscillator, latches and voltage comparators are used to regulate the current in the motor windings. For each pair of phase driver outputs (PHA, PHB, and PHC, PHD) each pulse of the common internal oscillator sets the latch and enables the output. If the current in the motor winding causes the voltage across a sense resistor to exceed the reference voltage, VREFs, at the comparator inputs, the latch is reset disabling the output until the next oscillator pulse. Input for a separate reference voltage VREFh is also provided for reducing holding torque when the motor is not turning. When holding torque mode is enabled with a resistor-capacitor pair connected to the RC Pin, the sense comparator input reference switches between VREFs and VREFh depending on whether the motor is turning or not. The separate sense reference voltages allow for conserving power when the motor is not turning. Holding torque mode can be disabled by connecting the RC Pin to VSS. In the half-step stepping sequence, the phase drives alternate between one-phase-on and two-phase-on in successive steps at full power thus generating substantial ripple on the output torque. An input, CT_EN is provided for selecting an operational mode in which the torque ripple is corrected. In this mode the sense input reference voltage is switched to 100% and 70.7% of the applied voltages at the VREFs and VREFh inputs in successive one-phase-on and two-phase-on conditions, respectively. The CONTROL input determines whether the chopper acts on the 8397-042109-1 SYNC 1 V SS 2 HOME 3 22 4 21 FWD/REV 20 OSC 19 VREFs PHA LS8397 DESCRIPTION: PIN ASSIGNMENT TOP VIEW LSI FEATURES: • Controls Bipolar and Unipolar Motors • L297 operation with added functions: • Selectable torque ripple compensated phase drive • Selectable automated switching between stepping and holding torques • Supply current < 400uA • Half and full step modes • Normal/wave drive • Direction control • Reset input • Step control input • Enable input • PWM chopper circuit for current control • Two over current sensor comparators with external references input • All inputs and outputs TTL/CMOS compatible (TTL for 5V operation) • 4.75V to 7V Operation (VDD – VSS). • LS8397 (DIP), LS8397-S (SOIC), LS8397-TS (TSSOP) – See Figure 1 – April 2009 24 RESET 23 HALF/FULL STEP INH1 5 PHB 6 PHC 7 18 SENSE1 INH2 8 17 SENSE2 PHD 9 16 VDD ENABLE 10 15 CONTROL RC 11 14 VREFh NC 12 13 CT_EN FIGURE 1 phase driver outputs or the inhibit outputs. When the phase lines are chopped, the non-active phase line of each pair (PHA, PHB or PHC, PHD) is activated rather than deactivating the active line to reduce dissipation in the load sensing resistor Rs. Refer to Figure 5B for Bipolar motors. If PHA is high and PHB is low, current flows through Q1, motor winding, Q4 and sense resistor Rs. When chopping occurs, PHB is brought high and circulating current flows through Q1 and D3 and not through Rs resulting in less power dissipation in Rs. Current decay is slow using this method. When the Control input is brought low, chopping occurs by bringing INH1 low. In this case circulating current flows through D2, motor winding and D3 and through the power supply to ground causing the current to decay rapidly. For Unipolar motors, only inhibit chopping is used. Refer to Figure 6. When INH1 is brought low the current flowing in either half of the center tapped motor winding recirculates through the diode across it. INPUT/OUTPUT DESCRIPTION: OSC Input An RC input with the resistor connected to VDD and the capacitor connected to ground determines the oscillator chopper rate. When connected as an oscillator, the oscillator output appears as a negative-going pulse at the Sync pin. If the oscillating pin is tied to ground, the Sync pin becomes an input. Osc frequency, fosc = 1/0.69RC SYNC As an output the sync can be used to drive sync pins of other LS8397s. This eliminates the need for RC components for any other LS8397 controllers used in the system. As an input the sync can be driven by the LS8397 that has the RC oscillator components or by any other system external clock. PHA/PHB/PHC/PHD Phase drive output signals for power stages. In a Bipolar motor PHA and PHB are used for one H-bridge while PHC and PHD are used for the other. INH1/INH2 Outputs These outputs are active low inhibit controls for motor drive outputs. INH1 controls driver stage using PHA and PHB signals while INH2 control driver stage using PHC and PHD signals. When the Control input is low, these outputs are chopped using the internal oscillator for current regulating. CONTROL Input When high, the phase outputs, PHA, PHB, PHC and PHD are chopped. When low, INH1 and INH2 are chopped. Normally, inhibit outputs are chopped. Phase chopping might be used with a Bipolar motor that does not store much energy to prevent fast current decay and a low useful torque. ENABLE Input When Enable input is low, INH1, INH2, PHA, PHB, PHC and PHD are brought low. HOME Output An open drain output that indicates when the LS8397 is in its initial state with PHA, PHB, PHC, PHD = logic states 0101 respectively. Refer to Figure 4. In the active state the open drain device is off. When holding-torque mode is enabled, the motor torque is switched to stepping torque at a step command followed by holding torque after a programmable delay. The stepping torque is controlled by the reference voltage VREFs input and the holding torque is controlled by the voltage at the VREFh input. The delay is controlled by a resistor-capacitor pair connected to the RC pin. When the holding-torque mode is disabled, the motor torque remains in the stepping torque mode all the time controlled by the VREFs voltage. RC Input/Output A resistor-capacitor pair connected to this pin starts a time-out delay at every step command. At the start of the delay, the reference voltage at the VREFs pin is switched in for the SENSE comparators to produce higher stepping torque. At the end of the time-out, the reference voltage at the VREFh pin is switched in for the SENSE comparators to produce the lower holding torque, reducing power dissipation while the motor is stationary. The delay is given by Tds = 1.4RC If tied low, holding torque mode is disabled and stepping torque is produced in both dynamic and static states by using the VREFs reference voltage. VREFs Input Input for the SENSE comparator reference voltage for producing stepping torque. VREFh Input Input for the SENSE comparator reference voltage for producing holding torque. FRD/REV Input A logic 1 on this input causes the motor to advance through the stepping sequence of Fig. 4. A logic 0 on this input cause the motor to reverse the sequence. CT_EN Input Input for selecting/deselecting compensated torque-ripple mode. The step sequence in the half-step mode alternates between one-phase-on and two-phase-on states resulting in torque ripple during the stepping sequence. In the compensated-torque mode, the ripple is eliminated by equalizing the torques for the alternate states. This is done by alternately switching the SENSE reference voltages between 100% and 70.7% in alternate cycles. RESET Input An active low on this input cause the motor to be restored to the home position (0101). The CT_EN input is relevant only in the half-step mode, since the alternating one-step-on and two-step-on sequence does not exist in the full-step mode. HALF/FULL Input When high, half-step operation is selected. When low, full-step operation is selected. The one-phase-on full step is selected by selecting full when the stepping sequence is at an even state. The two-phase-on full step operation is selected when the stepping sequence is at an odd state. Refer to Figure 4. This input has an internal pull-up. STEP Input An active low pulse on this input causes the motor to advance one step. The step occurs on the rising edge of the step signal. SENSE1/ SENSE2 Inputs Inputs for load current sense voltages from power stages using PHA and PHB drive signals or PHC and PHD drive signals, respectively. 8397-011409-2 ABSOLUTE MAXIMUM RATINGS Symbol VS Vi TSTG, TJ Parameter Value Supply Voltage Input Signals Storage and Junction Temperatures Unit 10 7 -40 to +150 V V °C ELECTRICAL CHARACTERISTICS: (Refer to Block Diagram, Figure 2, and Timing Diagram, Figure 3) TA = +25°C, VDD = +5V unless otherwise specified. Parameter (Pin 15) Supply Voltage Quiescent Supply Current Symbol VDD IDD Minimum Typical Maximum Unit Condition 4.75 - 300 7 400 V uA Outputs floating 2 - 0.75 - V V - - - 50 nA VI = VIL or VIH IIL IIH - - 50 50 nA nA VI = 0 VI = VDD VENL VENH IEN IEN 2 - - 1.3 50 50 V V nA nA VEN = VENL VEN = VENH (Pins 4, 6, 7, 9) Phase Output Voltage Low VOL Phase Output Voltage High VOH 4.0 - 0.5 - V V IO = -10mA IO = 5mA (Pins 5, 8) Inhibit Output Voltage Low VInhL Inhibit Output Voltage High VInhH 4.0 - 0.5 - V V IO = -10mA IO = 5mA Leakage Current (Pin 3) Saturation Voltage (Pin 3) - - 1 0.4 uA V VCE = 7V I = 5mA 100 5 - 10 mV uA VREF = 1V - (Pins 13, 14, 21, 22, 23 and 24) Input Voltage Low VIL Input Voltage High VIH (Pins 14, 21, 22, 23, 29) Input Current IIH, IIL Input Current (Pin 13) (Pin 10) Enable Input Voltage Low Enable Input Voltage High Enable Input Current Enable Input Current ILeak VSat (Pins 13, 14, 15) Comparators Offset Voltage VOff Comparator Bias Current IO (Pins 18, 19) Input Reference Voltages Input Currents VREFs, VREFh IREFs, IREFh 0 - - 3 8 V uA VREFs, VREFh = 3V (Pin 11) RC Input Low RC Input High External resistor at RC VRCL VRCH R 0 3.5 10 - 2.5 No Limit V V kΩ - Step Pulse Width tstp 0.5 - - us - Set up time tS 1 - - us - Hold time tH 4 - - us - Reset time tR 1 - - us - Reset to Step delay tRStp 1 - - us - Sawtooth Low VSOL - 2.1 - V - Sawtooth High VSOH - 3.65 - V - (Pin 20) Oscillator: 8397-040709-3 Parameter Symbol Minimum Typical Maximum Unit Condition Oscillator Frequency fOSC - 30 - kHz R = 22kΩ, C = 3.3nF SYNC (Pin1) Sync Output Voltage Low Sync Output Voltage High VSyncL VSyncH 3.0 - 0.8 - V V IO = -5mA IO = 5mA Sync Input Pulse Width TSPW - 3.3 - V R = 22kΩ, C = 3.3nF Sync Input Switching Point TSSP - 2.0 - us Pin 16 < 1.0V Sync Input Pulse Width IIS - -425 - uA Pin 16 < 1.0V, VIN = VDD VDD VSS CT_EN 16 2 13 PHA INH1 4 +V PHB PHC 6 7 5 INH2 PHD 8 9 V DD 23 HALF/FULL RESET 24 FWD/REV 21 RC 11 TRANSLATOR Q S FF1 R S 22 x0.707 3 + OSC MUX 18 19 14 VREFs VREFh 17 SENSE1 SENSE2 FIGURE 2. LS8397 BLOCK DIAGRAM STEP t STP FWD/REV HALF/FULL tS tH RESET tR t RSTP FIGURE 3. Input Timing Diagram 8397-040709-4 15 CONTROL 1 SYNC S Q FF2 R + - x0.707 HOME ENABLE OUTPUT LOGIC Q R STEP 10 20 OSC 1001 4 3 1 STEP 1000 5 2 3 4 5 6 7 8 1 2 3 4 5 1010 A B 2 0001 6 0010 C 0101 1 7 8 HOME 0110 D INH1 0100 INH2 FIGURE 4A. HALF-STEP MODE STEP 1001 1 3 5 7 1 3 5 7 1 3 5 7 1010 3 4 5 A B 2 6 C 0101 HOME 1 8 D 7 0110 INH1 0 INH2 0 FIGURE 4B. NORMAL DRIVE MODE (TWO-PHASE-ON) STEP 1000 3 0001 4 2 5 6 2 4 6 8 2 4 6 8 2 4 6 8 A 0010 B C D 1 8 7 0100 INH1 INH2 FIGURE 4C. WAVE DRIVE MODE (ONE-PHASE-ON) FIGURE 4. MOTOR DRIVING SEQUENCES The LS8397 generates phase sequences for half-step mode, normal drive mode and wave drive mode. Advancing occurs on the positive edge of the STEP input signal. HOME is defined as PHA, PHB, PHC, PHD being 0101, respectively. The State Diagrams showing the phase output polarities for all states are shown above for clockwise rotation. For counter clockwise rotation, the sequences are reversed. RESET restores the phases to 0101 and State 1. 8397-111308-5 +5V VM 9 4 V DD VS 16 23 15 24 22 MCU 21 10 13 VDD HALF/FULL INH1 CONTROL INH2 RESET PHA STEP PHB FRD/REV ENABLE PHC PHD CT_EN +5V 5 6 8 11 4 5 6 7 7 10 9 12 INH1 OUT1 INH2 PHA OUT2 PHB OUT3 20 OSC OUT4 PHD 11 SENSE1 SENSE2 STEPPER MOTOR WINDINGS 14 14 V RS V RH RC C 2 19 18 SENSEB R VREFh 13 L298 SENSEA 3.3nF VREFs 3 PHC LS8397 22k 2 1 17 VSS RS VSS 15 8 RS Note: The SENSE resistors on L298 should be chosen so that IMAX = VRS/RS, where IMAX is the maximum motor winding current. See Note FIGURE 5A. Typical Application Schematic for a Two-Phase Bipolar Motor Using a Single Motor Driver IC VM PHA INH1 Q1 D1 D3 Q2 D2 D4 Q3 Q4 SENSE1 RS FIGURE 5B. One half of L298 Drive Stage 8397-111308-6 PHB +5V VM 16 23 15 24 22 MCU 21 10 13 V DD PHA HALF/FULL PHB CONTROL INH1 4 6 1 2 5 4 RESET 74HC08 6 5 STEP FRD/REV Q1 3 SENSE1 Q2 18 ENABLE CT_EN +5V VREFs 19 RS = V RS V RS I max LS8397 22k 20 OSC 3.3nF VREFh R 11 RC C PHC PHD INH2 14 7 9 8 V RH VM 9 10 12 13 8 Q3 74HC08 11 Q4 2 SENSE2 17 V SS NOTE: Q1, Q2, Q3, Q4 are MOSFET Power Transistors suitable for 5V Gate Drive Typical P/Ns = IRLZ44N and IRF3708 FIGURE 6. TYPICAL APPLICATION SCHEMATIC FOR A FOUR-PHASE UNIPOLAR MOTOR USING DISCRETE MOSFET TRANSISTORS 8397-040609-7 RS = V RS I max +V 22k 20 1 1 1 SYNC SYNC SYNC LS8397 LS8397 LS8397 OSC 20 OSC 3300pF FIGURE 7. Synchronizing Multiple LS8397s The information included herein is believed to be accurate and reliable. However, LSI Computer Systems, Inc. assumes no responsibilities for inaccuracies, nor for any infringements of patent rights of others which may result from its use. 8397-041309-8 20 OSC