MIC2790/1/3 Supervisor with High-Accuracy, Ultra-Fast Propagation Delay, and Capacitor-Programmable Reset Delay General Description Features The MIC2790/1/3 is ideal for monitoring highly-accurate core voltages that require rapid response in the event of a fault condition. The voltage supervisor IC features a manual reset input, enable input (MIC2793 only), a capacitor-programmable reset timeout delay and both an active-low and active-high reset output. • 1.5V to 5.5V operating supply voltage range • Ultra-fast propagation delay (1µs typically) • 0.4V reference voltage (SNS pin) − ±1.0% threshold accuracy from −40°C to +125°C − Monitored voltage range from 0.4V to 5.5V • Programmable reset timeout delay (from 1ms to 10s) • Manual reset input with an internal pull-up resistor • Active-high enable input pin (MIC2793 only) • The MIC2790/1/3 features multiple output options: − Open-drain active-low (/RESET) − Push-pull active-low (/RESET) − Push-pull active-high (RESET) • −40°C to 125°C junction temperature range • 6-pin TSOT-23 (MIC2790) • 6-pin 2mm × 2mm Thin DFN (MIC2790) • 6-pin 1.6mm × 1.6mm Thin DFN (MIC2791) • 8-pin 2mm × 2mm Thin DFN (MIC2793) The MIC2790/1/3 monitors system voltages that are in the range of 0.4V to 5.5V, with a typical sense accuracy of 0.5% at +25°C and ±1.0% across −40°C to +125°C. The IC asserts a reset output when the sense voltage drops below the threshold or when the manual reset is pulled to a logic low. The active-low reset stays low for the duration of the reset timeout delay once the sense voltage returns to normal and the manual reset transitions to a logic high state. The reset timeout delay period is programmable from 1ms to 10s with an external capacitor. The MIC2790/1/3 operates from a low supply voltage of 1.5V to 5.5V, and is rated to operate over the temperature range of −40˚C to +125˚C. The MIC2790 is available in a 6-pin TSOT-23 package or a 6-pin 2mm × 2mm × 0.55mm DFN package. The MIC2791 is available in a tiny 6-pin 1.6mm × 1.6mm × 0.55mm DFN package. The MIC2793 is available in a 8-pin 2mm × 2mm × 0.55mm DFN package. Datasheets and support documentation are available on Micrel’s web site at: www.micrel.com. Applications • • • • • • Telecom Computer/servers Medical equipment Portable Set-top boxes Critical microprocessor monitoring Typical Application Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com August 23, 2013 Revision 1.0 Micrel, Inc. MIC2790/1/3 Ordering Information Marking Code Threshold Voltage (1) (SNS) /RESET Output (ActiveLow) RESET Output (ActiveHigh) Enable Pin Feature Junction Temperature Range MIC2790N-04VD6 9ND 0.4V Open-Drain − − –40°C to +125°C 6-pin TSOT-23 MIC2790L-04VD6 9LD 0.4V Push-Pull − − –40°C to +125°C 6-pin TSOT-23 Part Number Package (2, 3) MIC2790H-04VD6 9HA 0.4V − Push-Pull − –40°C to +125°C 6-pin TSOT-23 MIC2790N-04VMT 9NA 0.4V Open-Drain − − –40°C to +125°C 6-pin 2mm × 2mm TDFN MIC2791N-04VMT 1N 0.4V Open-Drain − − –40°C to +125°C 6-pin 1.6mm ×1.6mm TDFN MIC2791L-04VMT 1L 0.4V Push-Pull − − –40°C to +125°C 6-pin 1.6mm × 1.6mm TDFN MIC2791H-04VMT XH 0.4V − Push-Pull − –40°C to +125°C 6-pin 1.6mm ×1.6mm TDFN MIC2793LH-04VMT 3LH 0.4V Push-Pull Push-Pull Yes –40°C to +125°C 8-pin 2mm × 2mm TDFN MIC2793NH-04VMT 3NH 0.4V Open-Drain Push-Pull Yes –40°C to +125°C 8-pin 2mm × 2mm TDFN Notes: 1. Other voltage options are available. Contact Micrel for details. 2. Thin DFN pin 1 identifier = “ ”. 3. Thin DFN is a GREEN RoHS compliant package. Lead finish is NiPdAu. Mold compound is Halogen free. Pin Configuration RESET (/RESET) 1 6 VDD VDD 1 6 RESET (/RESET) GND 2 5 SNS SNS 2 5 GND /MR 3 4 CTH CTH 3 4 /MR 6-Pin TSOT (D6) (Top View) 6-Pin 1.6mm x 1.6mm TDFN (MT) (Top View) VDD 1 6 RESET (/RESET) SNS 2 5 GND CTH 3 EP 4 /MR 6-Pin 2mm x 2mm TDFN (MT) (Top View) August 23, 2013 EP EN 1 8 RESET VDD 2 7 /RESET SNS 3 6 GND CTH 4 5 /MR EP 8-Pin 2mm x 2mm TDFN (MT) (Top View) 2 Revision 1.0 Micrel, Inc. MIC2790/1/3 Pin Description Pin Number TSOT-23 (6L) 1 Pin Number 1.6 × 1.6 (6L) 6 Pin Number 2×2 (6L) 6 Pin Number 2×2 (8L) 7 Pin Name Pin Function /RESET /RESET is an active-low output pin and is available in an opendrain or push-pull configuration. In the open-drain configuration, a pull-up resistor to VDD is required and /RESET pin is asserted low when /MR is set to a logic low or the SNS voltage decreases below the threshold voltage. /RESET will remain low for the reset timeout delay after SNS > (VTH + VHYST) and /MR is set to a logic high. The push-pull configuration does not require a pull-up resistor and behaves exactly the same as the open-drain configuration. Reset is an active-high push-pull output and is asserted high when /MR is set to a logic low or the SNS voltage decreases below the threshold voltage. RESET will remain high for the reset timeout delay after SNS > (VTH + VHYST) and /MR is set to a logic high. 1 6 6 8 RESET 2 5 5 6 GND Supply Ground. 3 4 4 5 /MR Manual reset is an active-low input logic level pin and is internally pulled to VDD through a 90kΩ pull-up resistor. Pulling the /MR input to a logic low asserts RESET and /RESET pins. /RESET will remain low and RESET will remain high for the reset timeout delay after /MR is pulled to logic high. 4 3 3 4 CTH Programmable timeout delay. Connect a capacitor to ground to set a user defined reset delay time. 5 2 2 3 SNS Voltage monitor input. Connect sense pin to the voltage to be monitored through a resistor divider. When this voltage decreases below the threshold voltage, VTH, /RESET is asserted low and RESET is asserted high. 6 1 1 2 VDD Supply voltage pin. Bypass with a 1µF capacitor from this pin to GND. − − − 1 EN − EP EP EP ePad August 23, 2013 Enable input function is only available in the MIC2793 version. This pin enables the /MR input function and RESET and /RESET outputs. When EN is in a logic low state, the reset outputs are deasserted. The EN pin has an internal 90kΩ pull-up resistor to VDD. Exposed Pad. Connect to ground plane. 3 Revision 1.0 Micrel, Inc. MIC2790/1/3 Absolute Maximum Ratings(4) Operating Ratings(5) Supply Voltage (VDD) .................................... −0.3V to +6.0V SNS ................................................................ −0.3V to 4.5V /MR, EN, CTH .................................................... −0.3V to VDD RESET, /RESET .............................................. −0.3V to VDD Lead Temperature (soldering, 10s) ............................ 260°C Storage Temperature (TS) ......................... −55°C to +150°C (6) ESD Ratings ............................................... ESD Sensitive Supply Voltage (VDD) .................................... +1.5V to +5.5V SNS ..................................................................... 0V to 4.0V /MR, EN, CTH ......................................................... 0V to VDD RESET, /RESET ................................................... 0V to VDD Junction Temperature (TJ) ........................ −40°C to +125°C Junction Thermal Resistance 6-pin, TSOT-23 (θJA) ..................................... 177.2°C/W 6-pin, 1.6mm × 1.6mm TDFN (θJA) ................. 92.4°C/W 6-pin, 2mm × 2mm TDFN (θJA) .......................... 90°C/W 8-pin, 2mm × 2mm TDFN (θJA) .......................... 90°C/W Electrical Characteristics(7) VDD = 3.3V; R/RESET = 100kΩ; CTH = 1nF; TA = 25°C, bold values indicate −40°C ≤ TA ≤ +125°C, unless noted. Symbol Parameter Condition Min. Typ. Max. Units 5.5 V Supply Specifications VDD IDD Supply Voltage Supply Current /RESET Output Valid 1.5 VDD = EN = /MR = 3.3V RESET and /RESET not asserted 40 VDD = EN = /MR = 5V RESET and /RESET not asserted 50 70 µA 80 Sense Specifications VTH Sense Threshold Voltage 0.4 −1.0 Sense Threshold Accuracy VHYST Hysteresis ISNS Sense Input Bias Current −2.5 Sense rising ± 1.5 −15 V +1.0 % +2.5 % +15 nA 2.2 µs 0.3 V RESET & /RESET Output Specifications tp,SNS SNS to RESET and /RESET (8) Propagation Delay SNS = VTH × 1.05 to VTH × 0.95 VOL /RESET Logic Low Output Voltage IOL = 1mA (open-drain only) VOH RESET Logic High Output Voltage IOH ≤ 1mA (push-pull only) IOH /RESET Leakage Current /RESET not asserted (open-drain only) td RESET and /RESET Timeout Delay CTH = 100pF 0.45 CTH = 180nF 0.5 1 >0.9 × VDD V 1 µA 1.05 1.8 ms 1.2 1.9 s Notes: 4. Exceeding the absolute maximum ratings may damage the device. 5. The device is not guaranteed to function outside its operating ratings. 6. Devices are ESD sensitive. Handling precautions are recommended. Human body model, 1.5kΩ in series with 100pF. 7. Specification for packaged product only. 8. SNS to RESET and or /RESET propagation delay is the delay time for SNS voltage to transition from VTH × 1.05 to VTH × 0.95 to RESET and or /RESET. August 23, 2013 4 Revision 1.0 Micrel, Inc. MIC2790/1/3 Electrical Characteristics(7) (Continued) VDD = 3.3V; R/RESET = 100kΩ; CTH = 1nF; TA = 25°C, bold values indicate −40°C ≤ TA ≤ +125°C, unless noted. Symbol Parameter Condition Min. Typ. Max. Units /MR Input Specifications R/MR /MR Internal Pull-Up Resistance 90 kΩ tp,/MR /MR to RESET and /RESET Propagation Delay 100 ns VIL /MR Logic Low Input Voltage VIH /MR Logic High Input Voltage 0.5 1.2 V V EN Input Specifications (MIC2793 only) REN EN Internal Pull-Up Resistance tp,EN EN to RESET and /RESET Propagation Delay VENL EN Logic Low Input Voltage VENH EN Logic High Input Voltage August 23, 2013 /MR = logic low 90 kΩ 100 ns 0.5 1.2 5 V V Revision 1.0 Micrel, Inc. MIC2790/1/3 Typical Characteristics Supply Current vs. Supply Voltage Reset Timeout Delay vs. Supply Voltage 70 125°C 60 85°C 50 40 30 25°C -40°C 20 RESET RESET NOT notASSERTED asserted 1.6 1.2 1 0.8 0.6 CTH = 100pF 3 4 5 1 6 2 Reset Timeout Delay vs. CTH RESET TIMEOUT DELAY (ms) 10000 1000 100 10 1 VDD = 3.3V 0.1 0.01 0.1 1 10 100 0.6 4 5 6 1 2 3 4 5 SUPPLY VOLTAGE (V) Reset Timeout Delay vs. Temperature Reset Timeout Delay vs. Temperature 1.8 1.6 1.7 1.5 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 VDD = 3.3V CTH = 100pF 0.6 -20 0 20 40 60 80 100 1.5 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 120 -40 -20 0 20 40 60 80 100 TEMPERATURE (°C) TEMPERATURE (°C) Normalized SNS Threshold vs. Supply Voltage Normalized SNS Threshold vs. Temperature CTH Charging Current vs. Supply Voltage 0.6% 0.4% SNS RISING 0.2% 0.0% -0.2% SNS FALLING -0.6% -0.8% -1.0% 2 3 4 SUPPLY VOLTAGE (V) August 23, 2013 5 6 6 VDD = 3.3V CTH = 180nF 1.6 CTH (nF) 0.8% 1 0.8 1.7 -40 1000 10000 1.0% -0.4% 3 0.5 NORMALIZED SNS THRESHOLD (%) RESET TIMEOUT DELAY (ms) 100000 1 SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) RESET TIMEOUT DELAY (s) 2 1.2 0.4 120 400 1.0% CTH CHARGING CURRENT (nA) 1 1.4 CTH = 180nF 0.4 10 NORMALIZED SNS THRESHOLD (%) RESET TIMEOUT DELAY (s) 1.4 RESET TIMEOUT DELAY (ms) SUPPLY CURRENT (µA) 80 Reset Timeout Delay vs. Supply Voltage 0.8% 0.6% 0.4% SNS FALLING 0.2% 0.0% -0.2% SNS RISING -0.4% -0.6% -0.8% VDD = 3.3V -1.0% -40 -20 0 20 40 60 80 TEMPERATURE (°C) 6 100 120 350 300 250 200 150 100 1 2 3 4 5 6 SUPPLY VOLTAGE (V) Revision 1.0 Micrel, Inc. MIC2790/1/3 Typical Characteristics (Continued) SNS to Reset Propagation Delay vs. Overdrive Voltage SNS TO RESET PROP DELAY (µs) 8 7 6 5 4 3 2 VDD = 3.3V 1 0 0 50 100 150 200 OVERDRIVE VOLTAGE (mV) August 23, 2013 7 Revision 1.0 Micrel, Inc. MIC2790/1/3 Timing Diagrams Figure 1. Timeout and Propagation Delay from Sense to RESET and /RESET Figure 2. Timeout and Propagation Delay from /MR to RESET and /RESET August 23, 2013 8 Revision 1.0 Micrel, Inc. MIC2790/1/3 Timing Diagrams (Continued) Figure 3. Hold and Propagation Delay from EN to RESET and /RESET August 23, 2013 9 Revision 1.0 Micrel, Inc. MIC2790/1/3 Functional Diagram Figure 4. Simplified MIC2793 Functional Block Diagram August 23, 2013 10 Revision 1.0 Micrel, Inc. MIC2790/1/3 Functional Description Design and Product Advantages The MIC2790/1/3 is a highly-accurate supervisor circuit with an ultra-fast propagation delay of 2.2µs (maximum) over the temperature range of −40˚C to +125˚C. Additional features in the MIC2790/1/3 include a manual reset input pin, a capacitor-programmable reset timeout delay and both an active-low and active-high reset output. The capacitor-programmable reset delay help protect against accidental system glitch during a reset timeout. To set RTOP and RBOTTOM, use Equation 1 and set an arbitrary RTOP value greater than 100kΩ and solve for RBOTTOM or vice versa. RTOP VMONITOR = 0.4V × 1 + RBOTTOM VDD The input supply (VDD) provides power to the comparators and logic timers. VDD operating range is 1.5V to 5.5V. A ceramic input capacitor of 1µF with a minimum voltage rating of 6.3V is recommended between VDD and GND. Refer to PCB Layout Recommendations for details. Eq. 1 GND The ground (GND) pin is the return path for VDD, logic gates, and output pins. Refer to PCB Layout Recommendations for details. /MR Manual reset (/MR) is an active-low input pin that is internally pulled to VDD with a 90kΩ resistor. When /MR is asserted to a logic-low level, /RESET will transition to a logic low state while RESET will transition to a logic high state. See the Timing Diagrams section for more information. EN The enable (EN) pin feature is only available in the MIC2793 option and has an internal pull-up of 90kΩ resistor to VDD. A logic high signal on EN pin enables the reset logic outputs, while a logic low signal disables the reset outputs. See Figure 3 in the Timing Diagrams section for more information. /RESET /RESET is an active-low output and is available in two output configurations: open-drain or push-pull. The opendrain configuration requires an external pull-up resistor, while the push-pull does not. CTH CTH is a programmable timeout delay pin. Connect a capacitor to ground to set a reset timeout delay ranging from 1ms to 10s. Refer to the Reset Timeout Delay vs. CTH plot in the Typical Characteristics section for examples. /RESET is asserted low when /MR is set to a logic-low or the SNS voltage decreases below the threshold voltage. /RESET will remain low for the programmed reset timeout delay after SNS > (VTH + VHYST) and /MR is set to a logichigh, and then /RESET will transition high to indicate normal regulation. See the Timing Diagrams section for more information. SNS The sense (SNS) input pin monitors the user’s voltage through a resistor divider network as shown in Figure 5. RESET RESET is an active-high push-pull output and is asserted high when /MR is set to a logic low or the SNS voltage decreases below the threshold voltage. RESET will remain high for the programmed reset timeout delay after SNS > (VTH + VHYST) and /MR is set to a logic high, and then RESET will transition low to indicate normal regulation. See the Timing Diagrams section for more information. VMONITOR RTOP SNS = 0.4V RBOTTOM Figure 5. Resistor Divider on SNS pin August 23, 2013 11 Revision 1.0 Micrel, Inc. MIC2790/1/3 Typical Application Schematic Bill of Materials Item Part Number 06036D225KAT2A C1 GRM188R60J225KE19D C1608X5R0J225KT 01016D102KAT2A C2 Manufacturer Description Qty. (9) AVX Murata (10) 2.2µF, 6.3V, X5R, 0603 1 1nF, 6.3V, X5R, 0603 1 50kΩ, 1%, 1/10W, 0603 1 (11) TDK AVX GRM155R60J102KA01D Murata C0402X5R0J102K020BC TDK Vishay/Dale (12) R1 CRCW060350K0FKEA R2 CRCW060328K7FKEA Vishay/Dale 28.7kΩ, 1%, 1/10W, 0603 1 R3 CRCW060313K7FKEA Vishay/Dale 13.7kΩ, 1%, 1/10W, 0603 1 R5, R6 CRCW06031003FKEA Vishay/Dale 100kΩ, 1%, 1/10W, 0603 2 U1 MIC2793NH-04VMT Supervisor with High-Accuracy, Ultra-Fast Propagation Delay, and Capacitor-Programmable Reset Delay 1 (13) Micrel, Inc. Notes: 9. AVX: www.avx.com. 10. Murata: www.murata.com. 11. TDK: www.tdk.com. 12. Vishay: www.vishay.com. 13. Micrel, Inc.: www.micrel.com. August 23, 2013 12 Revision 1.0 Micrel, Inc. MIC2790/1/3 PCB Layout Recommendations Top Layer Bottom Layer August 23, 2013 13 Revision 1.0 Micrel, Inc. MIC2790/1/3 Package Information(14) and Recommended Land Pattern (TSOT-23-6L) 6-pin TSOT-23 (D6) Note: 14. Package information is correct as of the publication date. For updates and most current information, go to www.micrel.com. August 23, 2013 14 Revision 1.0 Micrel, Inc. MIC2790/1/3 Package Information(14) and Recommended Land Pattern (1.6mm × 1.6mm TDFN-6L) 6-pin 1.6mm × 1.6mm TDFN (MT) August 23, 2013 15 Revision 1.0 Micrel, Inc. MIC2790/1/3 Package Information(14) and Recommended Land Pattern (2mm × 2mm TDFN-6L) 6-pin 2mm × 2mm TDFN (MT) August 23, 2013 16 Revision 1.0 Micrel, Inc. MIC2790/1/3 Package Information(14) and Recommended Land Pattern (2mm × 2mm TDFN-8L) 8-pin 2mm × 2mm TDFN (MT) August 23, 2013 17 Revision 1.0 Micrel, Inc. MIC2790/1/3 MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry, specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2013 Micrel, Incorporated. August 23, 2013 18 Revision 1.0