MP1494 High-Efficiency, 2A, 16V, 500kHz Synchronous, Step-Down Converter The Future of Analog IC Technology DESCRIPTION FEATURES The MP1494 is a high-frequency, synchronous, rectified, step-down, switch-mode converter with built-in power MOSFETs. It offers a very compact solution to achieve a 2A continuous output current with excellent load and line regulation over a wide input supply range. The MP1494 has synchronous mode operation for higher efficiency over the output current load range. • • • • • • • • • • • Current-mode operation provides fast transient response and eases loop stabilization. Full protection features include over-current protection and thermal shut down. The MP1494 requires a minimal number of readily-available standard external components, and is available in a space-saving 8-pin TSOT23 package. Wide 4.5V-to-16V Operating Input Range 100mΩ/40mΩ Low RDS(ON) Internal Power MOSFETs High-Efficiency Synchronous Mode Operation Fixed 500kHz Switching Frequency Synchronizes from a 200kHz-to-2MHz External Clock AAM Power-Save Mode Internal Soft-Start OCP Protection and Hiccup Thermal Shutdown Output Adjustable from 0.8V Available in an 8-pin TSOT-23 Package APPLICATIONS • • • • Notebook Systems and I/O Power Digital Set-Top Boxes Flat-Panel Television and Monitors Distributed Power Systems All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are Registered Trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION 4.5V-16V VIN R4 2 IN BST 5 10 C1 22 C4 6 EN/ SYNC C3 0.1 7 R3 90.9k R5 10k MP1494 Rev. 1.04 12/26/2012 EN/SYNC SW VCC FB 1 AAM GND 4 3.3V/2A 3 L1 8 R9 33k R1 40.2k C2 47 R2 13k www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 1 MP1494 – SYNCHRONOUS STEP-DOWN CONVERTER ORDERING INFORMATION Part Number* MP1494DJ Package TSOT-23-8 Top Marking ABZ For Tape & Reel, add suffix –Z (e.g. MP1494DJ–Z); For RoHS, compliant packaging, add suffix –LF (e.g. MP1494DJ–LF–Z). PACKAGE REFERENCE ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance VIN ..................................................-0.3V to 17V VSW ...................................................................... -0.3V (-5V for <10ns) to 17V (19V for <10ns) VBS ......................................................... VSW+6V All Other Pins ................................ -0.3V to 6V (2) (3) Continuous Power Dissipation (TA = +25°C) ........................................................... 1.25W Junction Temperature ...............................150°C Lead Temperature ....................................260°C Storage Temperature................. -65°C to 150°C TSOT-23-8............................. 100 ..... 55... °C/W Recommended Operating Conditions (4) Supply Voltage VIN ...........................4.5V to 16V Output Voltage VOUT ..................... 0.8V to VIN-3V Operating Junction Temp. (TJ). -40°C to +125°C MP1494 Rev. 1.04 12/26/2012 (5) θJA θJC Notes: 1) Exceeding these ratings may damage the device. 2) About the details of EN pin’s ABS MAX rating, please refer to Page 9, Enable/SYNC control section. 3) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 4) The device is not guaranteed to function outside of its operating conditions. 5) Measured on JESD51-7, 4-layer PCB. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 2 MP1494 – SYNCHRONOUS STEP-DOWN CONVERTER ELECTRICAL CHARACTERISTICS (6) VIN = 12V, TA = 25°C, unless otherwise noted. Parameter Symbol Supply Current (Shutdown) Supply Current (Quiescent) HS Switch-On Resistance LS Switch-On Resistance Switch Leakage Current Limit (6) Oscillator Frequency Fold-Back Frequency Maximum Duty Cycle Minimum On Time(6) Sync Frequency Range IIN Iq HSRDS-ON LSRDS-ON SWLKG ILIMIT fSW fFB DMAX tON_MIN fSYNC Feedback Voltage VFB Feedback Current EN Rising Threshold EN Falling Threshold IFB EN Input Current EN Turn-Off Delay VIN Under-Voltage Lockout Threshold-Rising VIN Under-Voltage Lockout Threshold-Hysteresis VCC Regulator VCC Load Regulation Soft-Start Period Thermal Shutdown (6) Thermal Hysteresis (6) Condition VEN = 0V VEN = 2V, VFB = 1V, AAM=0.5V VBST-SW=5V VCC =5V VEN = 0V, VSW =12V Under 40% Duty Cycle VFB=0.75V VFB<400mV VFB=700mV TA =25°C -40°C<TA<85°C (7) VFB=820mV VEN_RISING VEN_FALLING IEN Min Typ 0.5 100 40 Max Units 1 1 μA mA mΩ mΩ μA A kHz fSW % ns MHz 1 3 440 90 0.2 791 787 1.2 1.1 500 0.25 95 60 807 807 10 1.4 1.25 580 2 823 827 50 1.6 1.4 mV nA V V VEN=2V 2 μA VEN=0 0 μA 8 μs ENtd-off 3.7 INUVVth 3.9 4.1 V INUVHYS 650 mV VCC 5 3 1.5 150 20 V % ms °C °C ICC=5mA tSS Notes: 6) Guaranteed by design. 7) Not tested in production and guaranteed by over-temperature correlation. MP1494 Rev. 1.04 12/26/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 3 MP1494 – SYNCHRONOUS STEP-DOWN CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS Performance waveforms are tested on the evaluation board of the Design Example section. VIN = 12V, VOUT = 3.3V, AAM=0.5V, TA = 25°C, unless otherwise noted. Load Regulation 100 VIN=4.5V-16V, IOUT=0A-2A 0.20 100 VIN=5V 95 0.10 VIN=16V VIN=12V 90 0.15 VIN=5V 95 90 85 85 80 80 75 75 VIN=12V 0.05 0.00 VIN=16V VIN=12V VIN=4.5V VIN=16V -0.05 -0.10 70 0 0.5 1 1.5 70 2 -0.15 0 LOAD CURRENT (A) 0.5 1 1.5 OUTPUT CURRENT (A) Peak Current vs. Duty Cycle VIN=5V-16V 1.0 Disabled Supply Current vs. Input Voltage 50 4.3 0.0 IOUT=2A -0.5 -1.0 4 6 8 10 12 14 16 INPUT CURRENT (nA) PEAK CURRENT (A) IOUT=1A VIN=6V-16V, IOUT=0A 40 4 IOUT=0A 0.5 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2 LOAD CURRENT (A) Line Regulation 3.7 3.4 3.1 2.8 30 20 10 0 -10 -20 2.5 25 30 35 40 45 50 55 60 65 70 75 -30 4 6 8 10 12 14 16 18 INPUT VOLTAGE(V) INPUT VOLTAGE(V) Enabled Supply Current vs. Input Voltage 540 -0.20 2 VIN=6V-16V, IOUT=0A Case Temperature Rise vs. Output Current 18 535 IOUT=0A-2A 15 530 12 525 9 520 515 6 510 3 505 500 4 6 8 10 12 14 INPUT VOLTAGE(V) MP1494 Rev. 1.04 12/26/2012 16 18 0 0 0.5 1 1.5 2 OUTPUT CURRENT (A) www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 4 MP1494 – SYNCHRONOUS STEP-DOWN CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS (continued) Performance waveforms are tested on the evaluation board of the Design Example section. VIN = 12V, VOUT = 3.3V, AAM=0.5V, TA = 25°C, unless otherwise noted. Shutdown through Input Voltage IOUT = 0A IOUT =0A VIN 5V/div. VIN 5V/div. VOUT 2V/div. VOUT 2V/div. VSW 5V/div. IINDUCTOR 2A/div. VSW 5V/div. IINDUCTOR 2A/div. VOUT/AC 50mV/div. IOUT 1A/div. Startup through Input Voltage Startup through Input Voltage Shutdown through Input Voltage IOUT = 2A IOUT = 2A Startup through Enable IOUT = 0A VEN 5V/div. VIN 5V/div. VOUT 2V/div. VIN 5V/div. VSW 5V/div. VSW 5V/div. IINDUCTOR 2A/div. IINDUCTOR 2A/div. VOUT 2V/div. VOUT 2V/div. VSW 5V/div. IINDUCTOR 2A/div. Shuthdown through Enable Startup through Enable Shutdown through Enable IOUT = 0A IOUT = 2A IOUT = 2A VEN 5V/div. VEN 5V/div. VEN 5V/div. VOUT 2V/div. VOUT 2V/div. VOUT 2V/div. VSW 5V/div. VSW 5V/div. VSW 5V/div. IINDUCTOR 2A/div. IINDUCTOR 2A/div. IINDUCTOR 2A/div. MP1494 Rev. 1.04 12/26/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 5 MP1494 – SYNCHRONOUS STEP-DOWN CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS (continued) Performance waveforms are tested on the evaluation board of the Design Example section. VIN = 12V, VOUT = 3.3V, AAM=0.5V, TA = 25°C, unless otherwise noted. MP1494 Rev. 1.04 12/26/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 6 MP1494 – SYNCHRONOUS STEP-DOWN CONVERTER PIN FUNCTIONS Package Pin # 1 2 3 4 5 6 7 8 Name Description Advanced Asynchronous Modulation. Connect to a voltage supply through 2 resistor dividers to force the MP1494 into non-synchronous mode under light loads. Drive AAM pin high (VCC) to force the MP1494 into CCM. Supply Voltage. The MP1494 operates from a 4.5V-to-16V input rail. Requires C1 to IN decouple the input rail. Connect using a wide PCB trace. SW Switch Output. Connect using a wide PCB trace. System Ground. Reference ground of the regulated output voltage. Requires special GND consideration during PCB layout. Connect to GND with copper traces and vias. Bootstrap. Requires a capacitor between SW and BST pins to form a floating supply BST across the high-side switch driver. A 10Ω resistor placed between SW and BST cap is strongly recommended to reduce SW spike voltage. EN high to enable the MP1494. Apply an external clock can to the EN pin to change the EN/SYNC switching frequency. Bias Supply. Decouple with a 0.1μF-to-0.22μF capacitor. The capacitance should not VCC exceed 0.22μF. VCC capacitor should be put closely to VCC pin and GND pin. Feedback. Connect to the tap of an external resistor divider from the output to GND to set the output voltage. The frequency fold-back comparator lowers the oscillator frequency FB when the FB voltage is below 400mV to prevent current-limit run-away during a shortcircuit fault condition. AAM MP1494 Rev. 1.04 12/26/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 7 MP1494 – SYNCHRONOUS STEP-DOWN CONVERTER FUNCTIONAL BLOCK DIAGRAM IN + - VCC Regulator VCC RSEN Currrent Sense Amplifer Bootstrap Regulator Oscillator HS Driver + 1pF Reference EN/SYNC 6.5V FB 50pF 400k BST Current Limit Comparator Comparator On Time Control Logic Control 1MEG + + - SW VCC LS Driver Error Amplifier GND AAM Figure 1: Functional Block Diagram MP1494 Rev. 1.04 12/26/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 8 MP1494 – SYNCHRONOUS STEP-DOWN CONVERTER OPERATION The MP1494 is a high-frequency, synchronous, rectified, step-down, switch-mode converter with built-in power MOSFETs. It offers a very compact solution that achieves a 2A continuous output current with excellent load and line regulation over a wide input supply range. The MP1494 operates in a fixed-frequency, peak-current–control mode to regulate the output voltage. An internal clock initiates a PWM cycle. The integrated high-side power MOSFET turns on and remains on until the current reaches the value set by the COMP voltage. When the power switch is off, it remains off until the next clock cycle starts. If, in within 95% of one PWM period, the current in the power MOSFET does not reach the value set by the COMP value, the power MOSFET is forced to turn off. Internal Regulator A 5V internal regulator powers most of the internal circuitries. This regulator takes the VIN input and operates in the full VIN range. When VIN is greater than 5.0V, the output of the regulator is in full regulation. When VIN is lower than 5.0V, the output decreases, and the part requires a 0.1µF ceramic decoupling capacitor. Error Amplifier The error amplifier compares the FB pin voltage against the internal 0.8V reference (REF) and outputs the COMP voltage—COMP controls the power MOSFET current. The optimized internal compensation network minimizes the external component count and simplifies the control loop design. Enable/SYNC control EN/SYNC is a digital control pin that turns the regulator on and off. Drive EN high to turn on the regulator; drive it low to turn it off. An internal 1MΩ resistor from EN/SYNC to GND allows EN/SYNC to be floated to shut down the chip. The EN pin is clamped internally using a 6.7V series-Zener-diode as shown in Figure 2. Connecting the EN input pin through a pullup resistor to the voltage on the VIN pin limits the EN input current to less than 100µA. MP1494 Rev. 1.04 12/26/2012 For example, with 12V connected to Vin, RPULLUP ≥ (12V – 6.5V) ÷ 100µA = 55kΩ. Connecting the EN pin is directly to a voltage source without any pullup resistor requires limiting the amplitude of the voltage source to ≤6V to prevent damage to the Zener diode. Figure 2: 6.5V Zener Diode Connection For external clock synchronization, connect a clock with a frequency range between 200kHz and 2MHz 2ms after the output voltage is set: The internal clock rising edge will synchronize with the external clock rising edge. Select an external clock signal with a pulse width less than 1.7μs. Under-Voltage Lockout (UVLO) Under-voltage lockout (UVLO) protects the chip from operating at insufficient supply voltage. The MP1494 UVLO comparator monitors the output voltage of the internal regulator, VCC. The UVLO rising threshold is about 3.9V while its falling threshold is 3.25V. Internal Soft-Start The soft-start prevents the converter output voltage from overshooting during startup. When the chip starts, the internal circuitry generates a soft-start voltage (SS) that ramps up from 0V to 1.2V. When SS is lower than REF, the error amplifier uses SS as the reference. When SS is higher than REF, the error amplifier uses REF as the reference. The SS time is internally set to 1.5ms. Over-Current-Protection and Hiccup The MP1494 has a cycle-by-cycle over-current limit when the inductor current peak value exceeds the set current limit threshold. Meanwhile, the output voltage drops until FB is below the Under-Voltage (UV) threshold— typically 50% below the reference. Once UV is triggered, the MP1494 enters hiccup mode to periodically restart the part. This protection mode is especially useful when the output is dead-shorted to ground. The average short www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 9 MP1494 – SYNCHRONOUS STEP-DOWN CONVERTER circuit current is greatly reduced to alleviate thermal issues and to protect the regulator. The MP1494 exits the hiccup mode once the overcurrent condition is removed. Thermal Shutdown Thermal shutdown prevents the chip from operating at exceedingly high temperatures. When the silicon die reaches temperatures that exceed 150°C, it shuts down the whole chip. When the temperature is less than its lower threshold, typically 130°C, the chip is enabled again. Floating Driver and Bootstrap Charging An external bootstrap capacitor powers the floating power MOSFET driver. This floating driver has its own UVLO protection. This UVLO’s rising threshold is 2.2V with a hysteresis of 150mV. The bootstrap capacitor voltage is regulated internally by VIN through D1, M1, C4, L1 and C2 (Figure 3). If (VIN-VSW) exceeds 5V, U1 will regulate M1 to maintain a 5V BST voltage across C4. A 10Ω resistor placed between SW and BST cap is strongly recommended to reduce SW spike voltage. D1 VIN M1 BST 5V U1 R4 C4 SW VOUT L1 C2 Figure 3: Internal Bootstrap Charging Circuit, Startup and Shutdown If both VIN and EN exceed their respective thresholds, the chip starts. The reference block starts first, generating stable reference voltage and currents, and then the internal regulator is enabled. The regulator provides a stable supply for the remaining circuitries. Three events can shut down the chip: EN low, VIN low, and thermal shutdown. In the shutdown procedure, the signaling path is first blocked to avoid any fault triggering. The COMP voltage and the internal supply rail are then pulled down. The floating driver is not subject to this shutdown command. MP1494 Rev. 1.04 12/26/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 10 MP1494 – SYNCHRONOUS STEP-DOWN CONVERTER APPLICATION INFORMATION Setting the Output Voltage The external resistor divider sets the output voltage (see Typical Application on page 1). The feedback resistor R1 also sets the feedback loop bandwidth with the internal compensation capacitor (see Typical Application on page 1). Choose R1 around 40kΩ. R2 is then given by: R1 R2 = VOUT 0.807V −1 FB R1 RT VOUT R2 Figure 4: T-Type Network Table 1 lists the recommended T-type resistors value for common output voltages. Table 1: Resistor Selection for Common Output Voltages VOUT (V) R1 (kΩ) R2 (kΩ) Rt (kΩ) 1.0 20.5(1%) 82(1%) 82(1%) 1.2 30.1(1%) 60.4(1%) 82(1%) 1.8 40.2(1%) 32.4(1%) 56(1%) 2.5 40.2(1%) 19.1(1%) 33(1%) 3.3 40.2(1%) 13(1%) 33(1%) 5 40.2(1%) 7.68(1%) 33(1%) Selecting the Inductor Use a1µH-to-10µH inductor with a DC current rating of at least 25% percent higher than the maximum load current for most applications. For highest efficiency, use an inductor with a DC resistance less than 15mΩ. For most designs, the inductance value can be derived from the following equation. L1 = MP1494 Rev. 1.04 12/26/2012 Choose the inductor ripple current to be approximately 30% of the maximum load current. The maximum inductor peak current is: IL(MAX) = ILOAD + ΔIL 2 Use a larger inductor for improved efficiency under light-load conditions—below 100mA. The T-type network—as shown in Figure 4—is highly recommended when VOUT is low. 8 Where ΔIL is the inductor ripple current. Setting the AAM Voltage The AAM voltage sets the transition point from AAM to CCM. Select a voltage to balance efficiency, stability, ripple, and transient. A low AAM voltage improves stability and ripple, but degrades transient and efficiency during AAM. Likewise, a high AAM voltage improves the transient and efficiency during AAM, but degrades stability and ripple. The AAM voltage comes from the tap of a resistor divider from VCC (5V) to GND, as shown in Figure 5. VCC(5V) R3 AAM R4 Figure 5: AAM Network Generally, choose R4 to be around 10kΩ, then R3 is: ⎛ VCC ⎞ R3 = R4⎜ − 1⎟ ⎝ AAM ⎠ VOUT × (VIN − VOUT ) VIN × ΔIL × fOSC www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 11 MP1494 – SYNCHRONOUS STEP-DOWN CONVERTER 0.8 VOUT=2.5V 0.7 VOUT=3.3V VOUT=5V AAM(V) 0.6 0.5 0.4 0.3 0.1 ΔVIN = VOUT=1.8V 0.2 VOUT=1.05V 0 2 4 6 8 10 12 Figure 6: AAM Values for Common Output Voltages (VIN = 4.5V to 16V) Selecting the Input Capacitor The input current to the step-down converter is discontinuous, therefore requires a capacitor is to supply the AC current to the step-down converter while maintaining the DC input voltage. Use low ESR capacitors for the best performance. Use ceramic capacitors with X5R or X7R dielectrics for best results because of their low ESR and small temperature coefficients. For most applications, use a 22µF capacitor. Since C1 absorbs the input switching current, it requires an adequate ripple current rating. The RMS current in the input capacitor can be estimated by: I C1 = ILOAD × VOUT ⎛⎜ VOUT × 1− VIN ⎜⎝ VIN ⎞ ⎟ ⎟ ⎠ The worse case condition occurs at VIN = 2VOUT, where: IC1 = ILOAD 2 For simplification, choose an input capacitor with an RMS current rating greater than half of the maximum load current. The input capacitor can be electrolytic, tantalum or ceramic. When using electrolytic or tantalum capacitors, add a small, high quality ceramic capacitor (e.g. 0.1μF) placed as close to the IC MP1494 Rev. 1.04 12/26/2012 as possible. When using ceramic capacitors, make sure that they have enough capacitance to provide sufficient charge to prevent excessive voltage ripple at input. The input voltage ripple caused by capacitance can be estimated by: ⎛ ⎞ ILOAD V V × OUT × ⎜ 1 − OUT ⎟ fS × C1 VIN ⎝ VIN ⎠ Selecting the Output Capacitor The output capacitor (C2) maintains the DC output voltage. Use ceramic, tantalum, or lowESR electrolytic capacitors. For best results, use low ESR capacitors to keep the output voltage ripple low. The output voltage ripple can be estimated by: ΔVOUT = ⎞ VOUT ⎛ VOUT ⎞ ⎛ 1 × ⎜1 − ⎟ ⎟ × ⎜ RESR + fS × L1 ⎝ VIN ⎠ ⎝ 8 × fS × C2 ⎠ Where L1 is the inductor value and RESR is the equivalent series resistance (ESR) value of the output capacitor. For ceramic capacitors, the capacitance dominates the impedance at the switching frequency, and the capacitance causes the majority of the output voltage ripple. For simplification, the output voltage ripple can be estimated by: ΔVOUT = ⎛ V ⎞ VOUT × ⎜ 1 − OUT ⎟ VIN ⎠ 8 × fS 2 × L1 × C2 ⎝ For tantalum or electrolytic capacitors, the ESR dominates the impedance at the switching frequency. For simplification, the output ripple can be approximated to: ΔVOUT = VOUT ⎛ V × 1 − OUT fS × L1 ⎜⎝ VIN ⎞ ⎟ × RESR ⎠ The characteristics of the output capacitor also affect the stability of the regulation system. The MP1494 can be optimized for a wide range of capacitance and ESR values. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 12 MP1494 – SYNCHRONOUS STEP-DOWN CONVERTER MP1494 SW R1 C4 SW R6 R5 External BST Diode IN4148 VCC CBST 7 6 5 3 4 R4 8 2 R7 1 R9 C6 VOUT >65% VIN In these cases, add an external BST diode from the VCC pin to BST pin, as shown in Figure 7. BST R3 C5 Duty cycle is high: D= C3 R2 z GND R8 External Bootstrap Diode An external bootstrap diode can enhance the efficiency of the regulator given the following conditions: z VOUT is 5V or 3.3V; and L1 C1 C1A Vin L C2 COUT C2A GND Figure 7: Optional External Bootstrap Diode to Enhance Efficiency Vout The recommended external BST diode is IN4148, and the BST capacitor value is 0.1µF to 1μF. PC Board Layout (8) PCB layout is very important to achieve stable operation especially for VCC capacitor and input capacitor placement. For best results, follow these guidelines: 1) Use large ground plane directly connect to GND pin. Add vias near the GND pin if bottom layer is ground plane. 2) Place the VCC capacitor to VCC pin and GND pin as close as possible. Make the trace length of VCC pin-VCC capacitor anode-VCC capacitor cathode-chip GND pin as short as possible. 3) Place the ceramic input capacitor close to IN and GND pins. Keep the connection of input capacitor and IN pin as short and wide as possible. 4) Route SW, BST away from sensitive analog areas such as FB. It’s not recommended to route SW, BST trace under chip’s bottom side. 5) Place the T-type feedback resistor R9 close to chip to ensure the trace which connects to FB pin as short as possible GND VCC EN/SYNC BST SW GND Notes: 8) The recommended layout is based on the Figure 8 Typical Application circuit on the next page. MP1494 Rev. 1.04 12/26/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 13 MP1494 – SYNCHRONOUS STEP-DOWN CONVERTER TYPICAL APPLICATION CIRCUITS U1 2 C1A NS 7 VCC R7 90.9k R5 28.7k C5 1nF 6 R6 11k MP1494 SW 1 R8 10k BST IN 5 R4 10 3.3V 3 AAM FB 8 EN/SYNC R9 33k GND 4 C3 15pF R1 40.2k R3 0 R2 13k Figure 8: 12VIN, 3.3V/2A MP1494 Rev. 1.04 12/26/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 14 MP1494 – SYNCHRONOUS STEP-DOWN CONVERTER PACKAGE INFORMATION TSOT23-8 See note 7 EXAMPLE TOP MARK PIN 1 ID RECOMMENDED LAND PATTERN TOP VIEW SEATING PLANE SEE DETAIL ''A'' FRONT VIEW SIDE VIEW NOTE: DETAIL ''A'' 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSION OR GATE BURR. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. 4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.10 MILLIMETERS MAX. 5) JEDEC REFERENCE IS MO-193, VARIATION BA. 6) DRAWING IS NOT TO SCALE. 7) PIN 1 IS LOWER LEFT PIN WHEN READING TOP MARK FROM LEFT TO RIGHT, (SEE EXAMPLE TOP MARK) NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP1494 Rev. 1.04 12/26/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 15