MP1498 High-Efficiency, 2A, 16V, 1.4MHz Synchronous, Step-Down Converter The Future of Analog IC Technology DESCRIPTION FEATURES The MP1498 is a high-frequency, synchronous, rectified, step-down, switch-mode converter with built-in internal power MOSFETs. It offers a very compact solution to achieve 2A continuous output current with excellent load and line regulation over a wide input supply range. The MP1498 has synchronous mode operation for higher efficiency over the output current load range. Current-mode operation provides a fast transient response and eases loop stabilization. Protective features include over-current protection, thermal shutdown, and external SS control. The MP1498 requires a minimal number of readily-available external components and is available in a space-saving 8-pin TSOT23 package. Wide 4.5V-to-16V Operating Input Range 100mΩ/40mΩ Low RDS(ON) Internal Power MOSFETs Proprietary Switching-Loss–Reduction Technique High-Efficiency Synchronous Mode Operation Fixed 1.4MHz Switching Frequency Can Synchronize to a 300kHz-to-3MHz External Clock Externally-Programmable Soft-Start OCP and Hiccup Thermal Shutdown Output Adjustable from 0.8V Available in an 8-pin TSOT-23 Package APPLICATIONS Notebook Systems and I/O Power Digital Set-Top Boxes Flat-Panel Televisions and Monitors Distributed Power Systems All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Products, Quality Assurance page. “MPS” and “The Future of Analog IC Technology” are registered trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION 2 VIN IN C1 22 F BST MP1498 6 EN/ SYNC 7 C3 0.1 F EN/SYNC SW C5 22nF R3 20 3 95 3.3V/2A L1 2.2 H VCC SS 100 C4 0.1 F GND 4 90 85 R1 40.2k C2 22 F FB 1 5 80 75 8 70 R5 24k R2 13k 65 60 55 50 0.0 0.4 0.8 1.2 1.6 MP1498 Rev. 1.01 www.MonolithicPower.com 12/18/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 2.0 1 MP1498 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS ORDERING INFORMATION Part Number* MP1498DJ Package TSOT-23-8 Top Marking ADU For Tape & Reel, add suffix –Z (e.g. MP1498DJ–Z); For RoHS, compliant packaging, add suffix –LF (e.g. MP1498DJ–LF–Z). PACKAGE REFERENCE ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance VIN .................................................. -0.3V to 17V VSW ... -0.3V (-5V for <10ns) to 17V (19V for 5ns) VBST ........................................................ VSW+6V (2) All Other Pins ................................ -0.3V to 6V (3) Continuous Power Dissipation (TA = +25°C) ........................................................... 1.25W Junction Temperature ...............................150°C Lead Temperature ....................................260°C Storage Temperature ................. -65°C to 150°C TSOT-23-8 ............................. 100 ..... 55... °C/W Recommended Operating Conditions (4) Supply Voltage VIN ........................... 4.5V to 16V Output Voltage VOUT .................... 0.8V to VIN–3V Operating Junction Temp. (TJ). -40°C to +125°C (5) θJA θJC Notes: 1) Exceeding these ratings may damage the device. 2) About the details of the EN pin’s ABS MAX rating, please refer to Page 9, Enable section. 3) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 4) The device is not guaranteed to function outside of its operating conditions. 5) Measured on JESD51-7, 4-layer PCB. MP1498 Rev. 1.01 www.MonolithicPower.com 12/18/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 2 MP1498 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS ELECTRICAL CHARACTERISTICS VIN = 12V, TA = 25°C, unless otherwise noted. Parameter Supply Current (Shutdown) Supply Current (Quiescent) HS-Switch ON Resistance LS-Switch ON Resistance Switch Leakage Current Limit (6) Oscillator Frequency Fold-back Frequency Maximum Duty Cycle (6) Minimum ON Time (6) Sync Frequency Range Feedback Voltage Feedback Current EN Rising Threshold EN Falling Threshold EN Input Current EN Turn Off Delay VIN Under-Voltage Lockout Threshold-Rising VIN Under-Voltage Lockout Threshold-Hysteresis VCC Regulator VCC Load Regulation Soft-Start Current Thermal Shutdown(6) Thermal Hysteresis(6) Symbol IIN Iq Condition VEN = 0V VEN = 2V, VFB = 1V VBST-SW=5V VCC=5V VEN = 0V, VSW =12V Under 40% Duty Cycle HSRDS-ON LSRDS-ON SWLKG ILIMIT fSW fFB VFB= 0V DMAX VFB=700mV Min 0.8 100 40 IEN Units 1 1 μA mA mΩ mΩ μA A kHz fSW % 1400 0.15 89 1700 40 fSYNC IFB VEN RISING VEN FALLING Max 1 3.4 1100 τON_MIN VFB Typ TA=25°C -40°C<TA<85°C(7) VFB=820mV 0.3 784 780 1.2 1.1 800 800 10 1.4 1.25 ns 3 816 820 50 1.6 1.4 MHz mV nA V V VEN=2V 2 μA VEN=0 0 μA 5 μs ENTd-off INUVVth 3.7 3.9 4.1 V INUVHYS 650 mV VCC 5 3 14 150 20 V % μA °C °C ICC=5mA ISS 10 18 Notes: 6) Guaranteed by design. 7) Not tested in production and guaranteed by over-temperature correlation. MP1498 Rev. 1.01 www.MonolithicPower.com 12/18/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 3 MP1498 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS TYPICAL CHARACTERISTICS VIN=12V, VOUT=3.3V,L=2.2μH,TA = 25°C, unless otherwise noted. 1000 50 900 40 800 30 700 20 600 10 500 0 400 -10 300 -20 200 4 6 8 10 12 14 16 18 1.45 1.4 1.35 1.3 1.25 0 5 10 15 20 1.0 0.3 0 50 100 150 5.5 0.6 0.4 0.1 1.2 -50 6.0 0.8 0.2 5.0 0.2 0.0 4.5 0.0 -0.2 -0.1 4.0 -0.4 -0.6 -0.2 -0.3 0.0 -30 1.5 3.5 -0.8 0.4 0.8 1.2 1.6 2.0 -1.0 3.0 5 6 7 8 9 10 11 12 13 14 15 16 0 10 20 30 40 50 60 70 80 MP1498 Rev. 1.01 www.MonolithicPower.com 12/18/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 4 MP1498 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS TYPICAL PERFORMANCE CHARACTERISTICS Performance waveforms are tested on the evaluation board in the Design Example section. VIN=12V, VOUT=3.3V,L=2.2μH,TA = 25°C, unless otherwise noted. 95 100 95 100 95 90 90 90 85 85 85 80 80 80 75 75 75 70 70 70 65 65 60 65 60 55 50 0.0 55 50 0.0 55 50 0.0 100 0.4 0.8 1.2 1.6 2.0 60 0.4 0.8 1.2 1.6 2.0 100 95 100 100 95 95 90 90 90 85 85 85 80 80 80 75 75 75 70 70 70 65 65 65 60 60 55 50 55 50 0.0 60 55 50 0.0 0.0 0.4 0.8 1.2 1.6 2.0 0.4 0.8 1.2 1.6 2.0 25 25 25 20 20 20 15 15 15 10 10 10 5 5 5 0 0.5 1 1.5 2 0 0.4 0.8 1.2 1.6 2.0 0.4 0.8 1.2 1.6 2.0 0 0.5 1 1.5 2 0.5 1 1.5 MP1498 Rev. 1.01 www.MonolithicPower.com 12/18/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 2 5 MP1498 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS TYPICAL PERFORMANCE CHARACTERISTICS (continued) Performance waveforms are tested on the evaluation board in the Design Example section. VIN=12V, VOUT=3.3V,L=2.2μH,TA = 25°C, unless otherwise noted. MP1498 Rev. 1.01 www.MonolithicPower.com 12/18/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 6 MP1498 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS TYPICAL PERFORMANCE CHARACTERISTICS (continued) Performance waveforms are tested on the evaluation board in the Design Example section. VIN=12V, VOUT=3.3V,L=2.2μH,TA = 25°C, unless otherwise noted. MP1498 Rev. 1.01 www.MonolithicPower.com 12/18/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 7 MP1498 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS PIN FUNCTIONS Package Pin # 1 2 3 4 5 6 7 8 Name Description Soft-Start. Connect an external capacitor to program the soft start time for the switchmode regulator. Supply Voltage. The IN pin supplies power for internal MOSFET and regulator. The MP1498 operates from a +4.5V to +16V input rail. Requires a low-ESR, and lowIN inductance capacitor (C1) to decouple the input rail. Place the input capacitor very close to this pin and connect it with wide PCB traces and multiple vias. Switch Output. Connect this pin to the inductor and bootstrap capacitor. This pin is driven up to the VIN voltage by the high-side switch during the PWM duty cycle ON time. The SW inductor current drives the SW pin negative during the OFF time. The low-side switch’s ON-resistance and the internal body diode fix the negative voltage. Use wide PCB traces and multiple vias. System Ground. The regulated output voltage reference ground. Connect to GND with GND copper and vias. Bootstrap. Connect a capacitor between SW and BST pins to form a floating supply BST across the high-side switch driver. Enable. EN=high to enable the MP1498. Apply an external clock to change the switching EN/SYNC frequency. For automatic start-up, connect EN pin to VIN with 100KΩ resistor. Internal 5V LDO Output. Powers the driver and control circuits. Decouple with a 0.1μFVCC 0.22μF capacitor. Avoid capacitor values that exceed 0.22μF. Feedback. An external resistor divider from the output to GND, tapped to the FB pin, sets the output voltage. The comparator lowers the oscillator frequency linearly with the FB FB voltage. It is recommended to place the resistor divider as close to FB pin as possible. Avoid placing vias on the FB traces. SS MP1498 Rev. 1.01 www.MonolithicPower.com 12/18/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 8 MP1498 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS BLOCK DIAGRAM IN VCC + - VCC Regulator RSEN Currrent Sense Amplifer Boost Regulator Oscillator HS Driver + 1pF EN/SYNC Reference 6.5V 1MEG SS 50pF 400k BST Current Limit Comparator Comparator On Time Control Logic Control + + - SW VCC LS Driver Error Amplifier GND FB Figure 1: Functional Block Diagram MP1498 Rev. 1.01 www.MonolithicPower.com 12/18/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 9 MP1498 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS OPERATION The MP1498 is a high-frequency, synchronous, rectified, step-down, switch-mode converter with built-in power MOSFETs. It offers a very compact solution to achieve a continuous 2A output current with excellent load and line regulation over a wide input supply range. The MP1498 operates in a fixed-frequency, peak-current–control mode to regulate the output voltage. The internal clock initiates a PWM cycle. The integrated high-side power MOSFET turns on and remains on until its current reaches the value set by the COMP voltage. When the power switch is off, it remains off until the next clock cycle starts. If the current in the power MOSFET does not reach the COMP set current value within 89% of one PWM period, the power MOSFET will be forced to turn off. The high-side power MOSFET has an 80ns minimum off time to refresh the BST voltage. Internal Regulator The 5V internal regulator powers most of the internal circuitries. This regulator takes the VIN input and operates in the full VIN range. When VIN exceeds 5.0V, the output of the regulator is in full regulation. When VIN is below 5.0V, the output decreases and requires a 0.1µF ceramic decoupling capacitor. Error Amplifier The error amplifier compares the FB pin voltage to the internal 0.8V reference (REF) and outputs a current proportional to the difference between the two. This output current then charges or discharges the internal compensation network to form the COMP voltage, which is used to control the power MOSFET current. The optimized internal compensation network minimizes the external component counts and simplifies the control loop design. Enable/SYNC Control EN is a digital control pin that turns the regulator on and off. Drive EN high to turn on the regulator, drive it low to turn it off after a 5μs The EN pin is clamped internally using a 6.5V series-Zener-diode as shown in Figure 2. Connecting the EN pin through a pullup resistor to any voltage connected to VIN limits the EN input current to less than 100µA. For example, when connecting VIN to a 12V source, RPULLUP≥[(12V–6.5V) ÷ 100µA = 55kΩ]. Connecting the EN pin directly to a voltage source without any pullup resistor requires limiting the amplitude of the voltage source to below 6.5V to prevent damaging the Zener diode. EN/SYNC Zener 6.5V-typ EN LOGIC GND Figure 2: Zener Diode Circuit For external clock synchronization, connect a clock with a frequency range of 300kHz to 3MHz after setting the output voltage: The internal clock rising edge will synchronize with the external clock’s rising edge. Select an external clock signal with a pulse-width less than 700ns. Under-Voltage Lockout The MP1498 has under-voltage lockout (UVLO) protection. When VCC exceeds the UVLO rising threshold voltage, the MP1498 powers up. It shuts off when the VCC voltage falls below the UVLO falling threshold voltage. This is non-latch protection. The MP1498 is disabled when the input voltage falls below 3.25V. If an application requires a higher UVLO, use the EN pin as shown in Figure 3 to adjust the input voltage UVLO by using two external resistors. For best results, use the enable resistors to set the UVLO falling threshold (VSTOP) above 4.5V. Set the rising threshold (VSTART) to provide enough hysteresis to allow for any input supply variations. delay. An internal 1MΩ resistor from EN to GND allows EN to float to shut down the chip. MP1498 Rev. 1.01 www.MonolithicPower.com 12/18/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 10 MP1498 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS shorted to ground. The average short-circuit current falls to alleviate thermal issues and to protect the regulator. The MP1498 exits hiccup mode once the over-current condition is removed. Thermal Shutdown Figure 3: Adjustable UVLO External Soft-Start The MP1498 employs a soft-start (SS) mechanism to smooth the output during powerup. When the EN pin goes high, an internal current source (14μA) charges the SS capacitor. The SS capacitor voltage overtakes the REF voltage to the PWM comparator. The output voltage smoothly ramps up with the SS voltage. Once the SS voltage reaches the same level as the REF voltage, it keeps ramping up while VREF takes over the PWM comparator. At this point, the soft-start finishes and the device enters steady state operation. If the output is pre-biased to a certain voltage during startup, the IC will disable the high-side and low-side switches until the voltage on the internal soft-start capacitor exceeds the sensed output voltage at the FB pin. The SS capacitor value can be determined as follows: CSS (nF) SS (ms) ISS ( A) VREF (V) (1) If the output capacitors have large capacitances, avoid setting a short SS time to avoid hitting the current limit during SS. Use a minimum value of 4.7nF if the output capacitance value is larger than 330μF. Thermal shutdown prevents the chip from operating at exceedingly high temperatures. When the silicon die temperature exceeds 150°C, it shuts down the whole chip. When the temperature drops below its lower threshold (typically 130°C) the chip is enabled again. Floating Driver and Bootstrap Charging An external bootstrap capacitor powers the floating power MOSFET driver. This floating driver has its own UVLO protection with a rising threshold of 2.2V and a hysteresis of 150mV. The bootstrap capacitor voltage is regulated internally by VIN through D1, M1, R3, C4, L1 and C2 (Figure 4). If (VIN-VSW) exceed 5V, U1 will regulate M1 to maintain a 5V BST voltage across C4. A 20Ω resistor placed between SW and BST cap is strongly recommended to reduce SW spike voltage. R3 Figure 4: Internal Bootstrap Charging Circuit Over-Current Protection and Hiccup The MP1498 has a cycle-by-cycle over-current limit that protects against the inductor current peak value exceeding the set current limit threshold. Under-voltage protection (UVP) triggers if the FB voltage drops below the under-voltage (UV) threshold—typically 50% below the reference. Once UVP triggers, the MP1498 enters hiccup mode to periodically restart the part. This protection mode is especially useful when the output is deadMP1498 Rev. 1.01 www.MonolithicPower.com 12/18/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 11 MP1498 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS Startup and Shutdown If both VIN and EN exceed their respective thresholds, the chip starts. The reference block starts first, generating stable reference voltage and currents, and then the internal regulator is enabled. The regulator provides stable supply for the remaining circuitries. The frequency needs to fold-back linearly with FB so VOUT starts up smoothly. Three events can shut down the chip: EN low, VIN low, and thermal shutdown. For the shutdown procedure, the signaling path is first blocked to avoid any fault triggering. The COMP voltage and the internal supply rail are then pulled down. The floating driver is not subject to this shutdown command. MP1498 Rev. 1.01 www.MonolithicPower.com 12/18/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 12 MP1498 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS APPLICATION INFORMATION Setting the Output Voltage The external resistor divider sets the output voltage (see Typical Application on page 1). The feedback resistor (R1) sets the feedback loop bandwidth in conjunction with the internal compensation capacitor. R2 is then: VOUT 0.8V 1 Cf Rt Figure 5: T-Type Network Table 1 lists the recommended T-type resistors value for common output voltages. Table 1: Resistor Values for Common Output Voltages R2(kΩ) 84.5 61.9 32.4 19.1 13 7.68 Rt(kΩ) 140 140 59 43 24 24 Cf(pF) 0 0 15 15 15 15 L(µH) 1 1 1.5 1.5 2.2 2.2 Selecting the Inductor Use a 1µH-to-10µH inductor with a DC current rating of at least 25% percent higher than the maximum load current for most applications. For highest efficiency, select an inductor with a DC resistance less than 15mΩ. For most designs, calculate the inductance value as: L1 I L 2 Selecting the Input Capacitor The T-type network shown in Figure 5 is highly recommended. VOUT(V) R1(kΩ) 1 20.5 1.2 30.1 1.8 40.2 2.5 40.2 3.3 40.2 5 40.2 IL(MAX ) ILOAD Use a larger inductance for improved light-load efficiency. R1 R2 Choose an inductor ripple current to be approximately 30% of the maximum load current. The maximum inductor peak current is: VOUT (VIN VOUT ) VIN IL fOSC Where ΔIL is the inductor ripple current. The input current to the step-down converter is discontinuous, therefore requires a capacitor supply the AC current to the step-down converter while maintaining the DC input voltage. Use low-ESR capacitors for the best performance, such as ceramic capacitors with X5R or X7R dielectrics that have low ESR and small temperature coefficients. For most applications, use a 22µF capacitor. The input capacitor (C1) requires an adequate ripple current rating because it absorbs the input switching current. Estimate the RMS current in the input capacitor as: I C1 ILOAD VOUT VOUT 1 VIN VIN The worst-case condition occurs at VIN=2VOUT, where: IC1 ILOAD 2 For simplification, choose the input capacitor with an RMS current rating greater than half of the maximum load current. The input capacitor can be electrolytic, tantalum or ceramic. When using electrolytic or tantalum capacitors, place a small, high-quality, ceramic capacitor—e.g. 0.1μF—as close to the IC as possible. When using ceramic capacitors, make sure that they have enough capacitance to prevent excessive input voltage ripple. Estimate the input voltage ripple caused by the capacitance as: VIN ILOAD V V OUT 1 OUT fS C1 VIN VIN MP1498 Rev. 1.01 www.MonolithicPower.com 12/18/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 13 MP1498 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS Selecting the Output Capacitor The output capacitor (C2) maintains the DC output voltage. Use ceramic, tantalum, or lowESR electrolytic capacitors. Low ESR capacitors are preferred to keep the output voltage ripple low. The output voltage ripple can be estimated by: VOUT MP1498 VOUT VOUT 1 1 RESR fS L1 VIN 8 fS C2 Where L1 is the inductor value and RESR is the equivalent series resistance of the output capacitor. For ceramic capacitors, the capacitance dominates the impedance at the switching frequency. The capacitance also causes the majority of the output voltage ripple. For simplification, estimate the output voltage ripple as: ΔVOUT V VOUT 1 OUT VIN 8 fS L1 C2 2 For tantalum or electrolytic capacitors, the ESR dominates the impedance at the switching frequency. For simplification, the output ripple can be approximated as: ΔVOUT VOUT V 1 OUT fS L1 VIN RESR The characteristics of the output capacitor also affect the stability of the regulation system. The MP1498 can be optimized for a wide range of capacitance and ESR values. External Bootstrap Diode An external bootstrap diode can enhance the efficiency of the regulator, given the following conditions: VOUT is 5V or 3.3V; and In these cases, connect an external BST diode from the VCC pin to BST pin, as shown in Figure 6 Duty cycle is high: D= VOUT >65% VIN Figure 6: Optional External Bootstrap Diode to Enhance Efficiency The recommended external BST diode is IN4148, and the BST capacitor is 0.1µF to 1μF. PC Board Layout (8) PCB layout is very important to achieve stable operation especially for VCC capacitor and input capacitor placement. For best results, follow these guidelines: 1) 2) 3) 4) 5) Connect the GND pin directly to a large ground plane. Add vias near the GND pin if the bottom layer is a ground plane. Place the VCC capacitor as close to the VCC and GND pins as possible. Make the trace length of the VCC pin→VCC capacitor anode՜VCC capacitor cathode→ IC GND pin as short as possible. Place the ceramic input capacitor close to IN and GND pins. Keep the connection of input capacitor and IN pin as short and wide as possible. Route SW, BST net away from sensitive analog areas such as FB. Avoid routing the SW, BST trace under the IC. Place the T-type feedback resistor (R5) close to chip to ensure that the trace to the FB pin is as short as possible. Notes: 8) The recommended layout is based on the Figure 7 Typical Application circuit on the next page. MP1498 Rev. 1.01 www.MonolithicPower.com 12/18/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 14 MP1498 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS Design Example Below is a design example following the application guidelines for the specifications: C3 R1 GND C4 7 6 5 2 3 4 R3 8 1 R5 SW C5 R2 C6 R4 L1 C1 C1A Vin C2 Table 2: Design Example VIN 12V VOUT 3.3V Io 2A Figure 8 shows the detailed application schematic. The typical performance and circuit waveforms have been shown in the Typical Performance Characteristics section. For more device applications, please refer to the related Evaluation Board Datasheets. Vout GND VOUT GND EN/SYNC BST SW GND MP1498 Rev. 1.01 www.MonolithicPower.com 12/18/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 15 MP1498 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS TYPICAL APPLICATION CIRCUITS 2 VIN C1A C1 25V 25V GND R3 20 5 C4 MP1498 GND 7 VCC BST IN C6 VCC L1 SW 5V /2A 3 C2 GND 1 SS VOUT C5 GND SS GND R4 100K R5 24K GND 6 EN/SYNC FB EN/SYNC C3 15pF 8 R1 40.2K GND GND 4 R2 7.68K GND GND Figure 7: VIN=12V, 5V/2A Output 2 VIN C1A C1 25V 25V GND 5 R3 20 C4 MP1498 GND 7 VCC BST IN C6 VCC L1 SW 3.3V /2A 3 C2 GND 1 SS C5 GND SS GND R4 100K 6 FB EN/SYNC C3 15pF R5 24K GND EN/SYNC VOUT 8 R1 40.2K GND GND 4 R2 13K GND GND Figure 8: VIN=12V, 3.3V/2A Output 2 VIN C1A C1 25V 25V GND 5 R3 20 C4 MP1498 GND 7 VCC BST IN C6 VCC L1 SW 2.5V /2A 3 C2 GND 1 SS C5 GND SS GND R4 100K GND EN/SYNC VOUT 6 FB EN/SYNC 8 R5 43K 4 GND GND C3 15pF R1 40.2K GND R2 19.1K GND Figure 9: VIN=12V, 2.5V/2A Output MP1498 Rev. 1.01 www.MonolithicPower.com 12/18/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 16 MP1498 – SYNCHRONOUS, STEP-DOWN CONVERTER WITH INTERNAL MOSFETS 2 VIN C1A C1 25V 25V GND BST IN R3 20 5 C4 MP1498 GND 7 VCC C6 VCC L1 SW C2 GND GND 1 SS VOUT 1.8V /2A 3 C5 SS GND R4 100K R5 59K GND 6 EN/SYNC FB EN/SYNC C3 15pF 8 R1 40.2K GND GND 4 R2 32.4K GND GND Figure 10: VIN=12V, 1.8V/2A Output 2 VIN C1A C1 25V 25V GND R3 20 5 C4 MP1498 GND 7 VCC BST IN C6 VCC L1 SW C2 GND 1 SS VOUT 1.2V /2A 3 C5 GND SS GND R4 100K R5 140K GND 6 EN/SYNC FB EN/SYNC R1 30.1K 8 GND GND 4 R2 61.9K GND GND Figure 11: VIN=12V, 1.2V/2A Output 2 VIN C1A C1 25V 25V GND 5 R3 20 C4 MP1498 GND 7 VCC BST IN C6 VCC L1 SW 1V /2A 3 C2 GND C5 R4 100K EN/SYNC GND 1 SS VOUT SS GND GND 6 FB EN/SYNC 8 R5 140K 4 GND GND R1 20.5K GND R2 84.5K GND Figure 12: VIN=12V, 1V/2A Output MP1498 Rev. 1.01 www.MonolithicPower.com 12/18/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 17 MP1498 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS PACKAGE INFORMATION TSOT23-8 See note 7 EXAMPLE TOP MARK PIN 1 ID RECOMMENDED LAND PATTERN TOP VIEW SEATING PLANE SEE DETAIL ''A'' FRONT VIEW SIDE VIEW NOTE: DETAIL ''A'' 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSION OR GATE BURR. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. 4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.10 MILLIMETERS MAX. 5) JEDEC REFERENCE IS MO-193, VARIATION BA. 6) DRAWING IS NOT TO SCALE. 7) PIN 1 IS LOWER LEFT PIN WHEN READING TOP MARK FROM LEFT TO RIGHT, (SEE EXAMPLE TOP MARK) NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP1498 Rev. 1.01 12/18/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 18