MPS MP2125DL

MP2125
Dual 1.5A, 1.2MHz
Synchronous Step-Down Converter
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MP2125 is a fully integrated dual PWM
step-down converter with built-in internal power
MOSFETs. It is ideal for powering portable
equipment that runs from a single cell LithiumIon (Li+) Battery, with an input range from 2.7V
to 6V. The MP2125 can provide up to 1.5A of
load current with output voltage as low as 0.8V
for each output. It can also operate at 100%
duty cycle for low dropout applications.
•
•
•
•
•
With peak current mode control and internal
compensation, the MP2125 is stable with
ceramic capacitors and small inductors.
•
•
•
•
•
•
Fault condition protection includes cycle-bycycle current limiting and thermal shutdown.
MP2125 is available in
3mmx4mm QFN package.
the
small
2.7V-6V Input Operation Range
Each Output Adjustable from 0.8V to VIN
1uA Shutdown Current
Up to 92% Efficiency
100% Duty Cycle for Low Dropout
Applications
Fixed 1.2MHz Frequency
Stable with Low ESR Output Ceramic
Capacitors
Cycle-by-Cycle Over Current Protection
Thermal Shutdown
Short Circuit Protection
Available in 14-pin 3mmx4mm QFN
package
APPLICATIONS
14-pin
•
•
•
•
•
•
Solid State Disk
DVD+/-RW Drivers
Smart Phones
PDAs
Digital Cameras
Portable Instruments
“MPS” and “The Future of Analog IC Technology” are Registered Trademarks of
Monolithic Power Systems, Inc.
TYPICAL APPLICATION
Efficiency Curve
C1
12
PVIN1
EN1
13 VIN1
2
3
SW1
1
GND1
Vin2
2.7V-6V
4 N/C
5
6
C2
MP2125
FB1
N/C
PVIN2
EN2
VIN2
SW2
9 GND2
11
8
FB2
R1
Rt
R2
C3
EN2
Vout2
1.8V/1.5A
L2
R3
Rt
90
Vout1
1.8V/1.5A
L1
7
10
100
EN1
14
R4
C4
80
EFFICIENCY (%)
Vin1
2.7V-6V
70
Vin=6V
Vin=3V
Vin=5V
60
50
40
30
20
10
0
0
0.3
0.6
0.9
1.2
1.5
OUTPUT CURRENT (A)
MP2125 Rev. 1.0
12/24/2013
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1
MP2125 – DUAL 1.5A, 1.2MHZ SYNCHRONOURS STEP-DOWN CONVERTER
ORDERING INFORMATION
Part Number*
MP2125DL
Package
QFN14 (3mm x 4mm)
Top Marking
2125
Free Air Temperature (TA)
–40°C to +85°C
For Tape & Reel, add suffix –Z (e.g. MP2125DL–Z).
For RoHS compliant packaging, add suffix –LF (e.g. MP2125DL–LF–Z)
PACKAGE REFERENCE
TOP VIEW
FB1
1
14
EN1
GND1
2
13
VIN1
SW1
3
12
PVIN1
N/C
4
11
N/C
PVIN2
5
10
SW2
VIN2
6
9
GND2
EN2
7
8
FB2
MP2125
ABSOLUTE MAXIMUM RATINGS (1)
PIN, VIN to GND ..........................-0.3V to +6.5V
SW to GND ...........................-0.3V to VIN + 0.3V
EN, FB to GND ............................-0.3V to +6.5V
Operating Temperature.............. -40°C to +85°C
(2)
Continuous Power Dissipation (TA = +25°C)
………………………………………………....2.5W
Junction Temperature ...............................150°C
Lead Temperature ....................................260°C
Storage Temperature............... -65°C to +150°C
MP2125 Rev. 1.0
12/24/2013
Recommended Operating Conditions
(3)
Supply Voltage VIN .............................2.7V to 6V
Operating Junct. Temp (TJ)..... -40°C to +125°C
Thermal Resistance
(4)
θJA
θJC
QFN14(3mm X 4mm)..............50 ...... 12 ... °C/W
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA.
The maximum allowable continuous power dissipation at any
ambient temperature is calculated by PD(MAX)=(TJ(MAX)TA)/θJA. Exceeding the maximum allowable power dissipation
will cause excessive die temperature, and the regulator will go
into thermal shutdown. Internal thermal shutdown circuitry
protects the device from permanent damage.
3) The device is not guaranteed to function outside of its operating
conditions.
4) Measured on JESD51-7, 4-layer PCB.
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2
MP2125 – DUAL 1.5A, 1.2MHZ SYNCHRONOUS STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS (5)
VIN = VEN = 3.6V, TA = +25°C, unless otherwise noted.
Parameters
Condition
Supply Current
Shutdown Current
Thermal Shutdown Trip Threshold
EN Trip Threshold
EN Input Current
EN Input Current
IN Undervoltage Lockout Threshold
IN Undervoltage Lockout Hysteresis
Regulated FB Voltage
FB Input Bias Current
SW PFET On Resistance
SW NFET On Resistance
SW Leakage Current
SW Leakage Current
SW PFET Peak Current Limit
Switching Frequency
Typ
Max
Units
VEN= VIN, VFB = 0.9V
600
750
μA
VEN= 0V, VIN = 6V
Hysteresis = 20°C
-40°C ≤ TA ≤ +85°C
VEN = 0V
VEN = 6V
Rising Edge
0.01
150
1.0
0.1
6
2.40
160
0.800
0.800
-2
0.25
0.2
1
μA
°C
V
μA
μA
V
mV
V
V
nA
Ω
Ω
TA = +25°C
-40°C≤ TA≤ +85°C
VFB = 0.8V
ISW = 100mA
ISW = -100mA
VEN=0V; VIN=6V
VSW_=0V
VEN=0V; VIN=6V
VSW_=6V
Duty Cycle=100%
Min
0.3
2.15
0.784
0.776
-50
1.5
1.0
2.65
0.816
0.824
+50
-1
0.1
1
μA
-5
1.5
5
μA
1.0
3.0
1.2
1.4
A
MHz
Notes:
5) Production test at +25°C. Specifications over the temperature range are guaranteed by design and characterization
PIN FUNCTIONS
Pin #
Name
Description
1
2
3
4
5
6
FB1
GND1
SW1
N/C
PVIN2
VIN2
7
EN2
8
9
10
11
12
13
FB2
GND2
SW2
N/C
PVIN1
VIN1
14
EN1
Feedback input voltage for channel 1
Ground pin 1
Switch node to the inductor for channel 1
Not connect
Channel 2 input supply pin for power FET
Channel 2 input supply pin for controller
Enable input for channel 2, “High” enables channel 2. EN2 is pulled to GND with 1Meg
internal resistor
Feedback input voltage for channel 2
Ground pin 2
Switch node to the inductor for channel 2
Not connect
Channel 1 input supply pin for power FET
Channel 1 input supply pin for controller
Enable input for channel 1, “High” enables channel 1. EN1 is pulled to GND with 1Meg
internal resistor
MP2125 Rev. 1.0
12/24/2013
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MP2125 – DUAL 1.5A, 1.2MHZ SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 5V, VOUT = 1.8V, L=3.3uH, TA = +25ºC, one channel, unless otherwise noted.
Efficiency Curve
EenableSupply Current vs.
Input Voltage
Case Tem perature Risevs.
Output Current
VEN=3V
100
35
700
30
650
25
600
20
40
550
15
30
500
10
450
5
90
EFFICIENCY (%)
80
70
V IN=6V
V IN=3V
V IN=5V
60
50
20
10
0
0
0.3
0.6
0.9
1.2
400
2.5
1.5
3
OUTPUT CURRENT (A)
3.5
4
4.5
5
5.5
0
0.2 0.4 0.6 0.8
6
Load Regulation
Load Regulation
VIN=3V
VIN=5V
VIN=6V
0.20
0.15
0.15
0.15
0.00
-0.05
-0.10
-0.15
-0.20
0
0.3
0.6
0.9
1.2
0.10
0.05
0.00
-0.05
-0.10
-0.15
-0.20
1.5
LOAD REGULATION (%)
0.20
0.05
0
OUTPUT CURRENT (A)
0.3
0.6
0.9
1.2
1.5
OUTPUT CURRENT (A)
Line Regulation
1.2 1.4 1.6
Load Regulation
0.20
0.10
1
OUTPUT CURRENT (A)
INPUT VOLTAGE(V)
LOAD REGULATION (%)
LOAD REGULATION (%)
IOUT1=IOUT2
750
0.10
0.05
0.00
-0.05
-0.10
-0.15
-0.20
0
0.3
0.6
0.9
1.2
1.5
OUTPUT CURRENT (A)
Peak Current vs.
Duty Cycle
4.5
0.08
0.04
PEAK CURRENT(A)
LINE REGULATION (%)
0.06
IOUT=0A
0.02
0.00
-0.02
IOUT=0.75A
-0.04
-0.06
IOUT=1.5A
-0.08
4
3.5
3
2.5
-0.10
-0.12
2.5
2
3 3.5
4 4.5
5 5.5
INPUT VOLTAGE (V)
MP2125 Rev. 1.0
12/24/2013
6
40
50
60
70
80
90
100
DUTY CYCLE (%)
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4
MP2125 – DUAL 1.5A, 1.2MHZ SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 5V, VOUT = 1.8V, L=3.3uH, TA = +25ºC, one channel, unless otherwise noted.
Short Entry
VOUT
1V/div
SW
5V/div
VIN
5V/div
IINDUCTOR
2A/div
Short Recovery
Power Up without Load
VOUT
1V/div
VOUT
1V/div
SW
5V/div
SW
5V/div
VIN
5V/div
VIN
5V/div
IINDUCTOR
2A/div
IINDUCTOR
2A/div
VOUT
1V/div
VOUT
1V/div
VOUT
1V/div
SW
5V/div
SW
5V/div
SW
5V/div
VIN
5V/div
IINDUCTOR
2A/div
VIN
20mV/div
EN
5V/div
IINDUCTOR
2A/div
VOUT
10mV/div
EN
5V/div
IINDUCTOR
2A/div
VOUT
50mV/div
SW
2V/div
SW
2V/div
MP2125 Rev. 1.0
12/24/2013
IINDUCTOR
2A/div
IOUT
500mA/div
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MP2125 – DUAL 1.5A, 1.2MHZ SYNCHRONOUS STEP-DOWN CONVERTER
FUNCTIONAL BLOCK DIAGRAM
PVIN1
VIN1
To controller
blocks
Bias
EN1
0.8V
ICS
Feedback
Error Amp
Slope Comp
+
EAO
EAMP
FB1
IAMP
10X
Current
Sense Amp
Voltage
Reference
-
0.04
-
Main
Switch
(PCH)
+
+
+
PWMCMP
PWM
-
PWM
Control
RZ
CC
1.2M
17pF
Logic
1.2MHz
Oscillator
OSC
SW1
Synchronous
Rectifier
(NCH)
Figure 1 -Functional Block Diagram (1/2 of the MP2125)
MP2125 Rev. 1.0
12/24/2013
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6
MP2125 – DUAL 1.5A, 1.2MHZ SYNCHRONOUS STEP-DOWN CONVERTER
OPERATION
The MP2125 is a dual channel, fixed frequency,
current mode step-down converter, optimized for
low voltage, Li-Ion battery powered applications
where high efficiency and small size are critical.
MP2125 integrates two high side PFET main
switches and two low side synchronous rectifiers.
It always operates in continuous conduction
mode, simplifies the control scheme and
eliminates the random spectrum noise due to
discontinuous conduction mode.
turned on to provide the inductor current. The
synchronous rectifier will stay on until the next
oscillator cycle.
The steady state duty cycle D for this mode can
be calculated as:
continuously to deliver current to the output up to
the PFET current limit. In this case, the output
voltage becomes the input voltage minus the
voltage drop across the main switch and the
inductor.
D = TON × fOSC × 100% ≈
VOUT
× 100%
VIN
Where TON is the main switch on time and fOSC is
the oscillator frequency (1.2MHz typ.).
Current Mode PWM Control
Slope compensated current mode PWM control
provides stable switching and cycle-by-cycle
current limiting for superior load and line
response as well as protection of the internal
main switches and synchronous rectifiers. The
MP2125 switches at a constant frequency
(1.2MHz) and modulates the inductor peak
current to regulate the output voltage. Specifically,
for each cycle the PWM controller forces the
inductor peak current to an internal reference
level derived from the feedback error voltage. At
normal operation for each channel, the main
switch is turned on at each rise edge of the
internal oscillator, and remains on for a certain
period of time to ramp up the inductor current. As
soon as the inductor current reaches the
reference level, the main switch is turned off and
immediately the synchronous rectifier will be
MP2125 Rev. 1.0
12/24/2013
Dropout Operation
The MP2125 allows the main switch to remain on
for more than one switching cycle to increase the
duty cycle when the input voltage is dropping
close to the output voltage. When the duty cycle
reaches 100%, the main switch is held on
Maximum Load Current
The MP2125 can operate down to 2.7V input
voltage; however the maximum load current
decreases at lower input due to a large IR drop
on the main switch and synchronous rectifier.
The slope compensation signal reduces the peak
inductor current as a function of the duty cycle to
prevent sub-harmonic oscillations at duty cycles
greater than 50%. Conversely, the current limit
increases as the duty cycle decreases.
Short Circuit Protection
When the output is shorted to ground, the
oscillator frequency is reduced to prevent the
inductor current from increasing beyond the
PFET current limit. The PFET current limit is also
reduced to lower the short circuit current. The
frequency and current limit will return to the
normal values once the short circuit condition is
removed and the feedback voltage approaches
0.8V.
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MP2125 – DUAL 1.5A, 1.2MHZ SYNCHRONOUS STEP-DOWN CONVERTER
APPLICATION INFORMATION
The MP2125 has two channels: channel 1 and
channel 2. The following formulates are used for
components selection of both channels.
8
.
0
⎞
⎟
⎠
2
VOUT
R1
Rt
FB
R2
Figure 2―Feedback Network
Table 1 lists the recommended resistor value for
common output voltages.
Table 1—Resistor Selection vs. Output
Voltage Setting
VOUT/
V
Rt/
kΩ
R1/
kΩ
R2/
kΩ
L1/
μH
C2/
μF
1.2
1.8V
2.5V
3.3V
300
243
100
100
4.99
4.99
121
121
10
4.02
57.6
39
2.2
3.3
3.3
3.3
22
22
22
22
Inductor Selection
A 1μH to 10μH inductor with DC current rating at
least 25% higher than the maximum load current
is recommended for most applications. For best
efficiency, the inductor DC resistance shall be
<200mΩ. See Table 2 for recommended
inductors and manufacturers. For most designs,
the inductance value can be derived from the
following equation:
VOUT × (VIN − VOUT )
VIN × ΔIL × fOSC
Where ΔIL is inductor ripple current. Choose
inductor ripple current approximately 30% of the
maximum load current, 1.5A.
MP2125 Rev. 1.0
12/24/2013
ΔIL
2
Table 2—Suggested Inductors
Manufacturer
Toko
Rt is recommended when output voltage is high,
as the Figure 2 shows.
L=
IL(MAX ) = ILOAD +
1
⎛
×⎜ +
⎝
T
U
VO
=
R R
1
Output Voltage Setting
The external resistor divider sets the output
voltage.
The maximum inductor peak current is:
Cooper
TDK
Part
Number
Inductance
(μH)
Dimensions
LxWxH
(mm3)
3.3
6.3X6.2X3.5
3.3
5.2X5.2X2.5
3.3
7X7X4.5
D63CB#A916
CY-3R3M
SD25-3R3
SLF7045T3R3M2R5-PF
Input Capacitor CIN Selection
The input capacitor reduces the surge current
drawn from the input and switching noise from
the device. Ceramic capacitors with X5R or X7R
dielectrics are highly recommended because of
their low ESR and small temperature coefficients.
For most applications, a 10μF capacitor is
sufficient.
Output Capacitor COUT Selection
The output capacitor keeps output voltage ripple
small and ensures regulation loop stable. The
output capacitor impedance shall be low at the
switching frequency. Ceramic capacitors with
X5R or X7R dielectrics are recommended. For
forced PWM mode operation, the output ripple
ΔVOUT is approximately:
ΔVOUT =
VOUT ⋅ (VIN − VOUT )
1
1
(RESR + ⋅
)
VIN ⋅ fOSC ⋅ L
8 fOSC ⋅ COUT
For most applications, a 22μF capacitor is
sufficient.
Thermal Dissipation
Power dissipation shall be considered when
operates MP2125 at maximum 1.5A output
current. If the junction temperature rises above
150°C, MP2125 will be shut down by internal
thermal protection circuitry.
The junction-to-ambient thermal resistance of the
14-pin QFN (3mm x 4mm) RΘJA is 50°C/W. The
maximum allowable power dissipation is about
1.6W when MP2125 is operating in a 70°C
ambient temperature environment:
PD MAX =
150 o C − 70 o C
50 o C / W
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= 1 .6 W
8
MP2125 – DUAL 1.5A, 1.2MHZ SYNCHRONOURS STEP-DOWN CONVERTER
PCB Layout
PCB layout is very important to achieve stable
operation. Please follow these guidelines and
take Figure3 for references.
The high current paths (GND, IN and SW) should
be placed very close to the device with short,
direct and wide traces. Input capacitors should
be placed as close as possible to the respective
IN and GND pins. The external feedback
resistors shall be placed next to the FB pins.
Keep the switching nodes SW short and away
from the feedback network.
VOUT1
R1
C3
VIN1
R2
L1
1
14 EN1
GND1 2
R6
C2
13 VIN1
SW1
3
N/C
4
PVIN2
5
10 SW2
VIN2
6
9 GND2
EN2
7
8 FB2
12 PVIN1
2
11 N/C
R4
VIN2
C1
R5
FB1
GND
GND
L2
C4
R3
VOUT2
Top Layer
Bottom Layer
Figure 3 -PCB Layout
MP2125 Rev. 1.0
12/24/2013
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MP2125 – DUAL 1.5A, 1.2MHZ SYNCHRONOURS STEP-DOWN CONVERTER
PACKAGE INFORMATION
QFN14 (3mm x 4mm)
2.90
3.10
1.60
1.80
0.30
0.50
PIN 1 ID
SEE DETAIL A
PIN 1 ID
MARKING
1
14
0.18
0.30
3.20
3.40
3.90
4.10
PIN 1 ID
INDEX AREA
0.50
BSC
7
8
TOP VIEW
BOTTOM VIEW
0.80
1.00
0.20 REF
PIN 1 ID OPTION A
0.30x45º TYP.
PIN 1 ID OPTION B
R0.20 TYP.
0.00
0.05
SIDE VIEW
DETAIL A
2.90
0.70
NOTE:
1.70
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH.
3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETER MAX.
4) JEDEC REFERENCE IS MO-229, VARIATION VGED-3.
5) DRAWING IS NOT TO SCALE.
0.25
3.30
0.50
RECOMMENDED LAND PATTERN
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP2125 Rev. 1.0
12/24/2013
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10