Page No. : 1/ RS2022 Low Power OFF-Line SMPS Primary Switcher The RS2022 combines a dedicated current mode PWM controller with a high voltage Power MOSFET on the same silicon chip. Typical applications cover off line power supplies for battery charger adapters, standby power supplies for TV or monitors, auxiliary supplies for motor control, etc. The internal control circuit offers the following benefits: ◎ Large input voltage range on the VCC pin accommodates changes in auxiliary supply voltage. This feature is well adapted to battery charger adapter configurations. ◎ Automatic burst mode in low load condition. ◎ Over voltage protection in HICCUP mode. Features ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ ◎ 85V to 265V wide range AC voltage input A 700V MOSFET on the same silicon chip Auto start up with high voltage current source PWM with current mode control 9V to 38V wide range VCC voltage Fixed 60KHz switching frequency Automatic skip cycle mode in low load condition Over temperature, over current and over voltage protection Auxiliary under voltage lockout with hysteresis Applications ◎ ◎ ◎ ◎ ◎ ◎ Power AC/DC Adapters for Chargers DVD/VCD power supplies Electromagnetic Oven power supplies Air Conditioner power supplies STB power supplies AC/DC LED Driver Applications Pin Configurations Pin Number 1, 2 3 4 5, 6, 7, 8 DS-RS2022-02 TYPE DIP-8L European (195-265 Vac) 20W US (85-265 Vac) 12W Pin Name Function Description GND Sense FET source terminal on primary side and internal control ground. COMP Feedback input defines the peak drain MOSFET current. Positive supply voltage input. Although connected to an auxiliary transformer winding, current is supplied from SW via an internal switch during startup (see Internal Block VCC Diagram section). It is not until VCC reaches them UVLO upper threshold (14.5V) that the internal start-up switch opens and device power is supplied via the auxiliary transformer winding. The SW pin is designed to connect directly to the primary lead of the transformer and SW is capable of switching a maximum of 700V. November, 2010 www.Orister.com Page No. : 2/ Block Diagram Typical Application Circuit DS-RS2022-02 November, 2010 www.Orister.com Page No. : 3/ Absolute Maximum Ratings (Ta=25°C, unless otherwise specified) Symbol VSW ID VCC ICOMP VESDMM VESDHBM TJ TC TSTG Parameter SW to GND Voltage (TJ =25-125°C) Continuous VDMOS Drain Current Supply Voltage Feedback Current Electrostatic Discharge: Machine Model (R=0Ω ; C=200pF) Electrostatic Discharge: HBM Junction Operating Temperature Case Operating Temperature Storage Temperature Range Units -0.3 to 730 Internally limited 0 to 50 3 200 2000 Internally limited-40 to +150 -55 to +150 V A V mA V V o C o C o C Electrical Characteristics (Power) Symbol BVDSS IDSS RDSON TR TF COSS Parameter VDMOS Breakdown Voltage Zero Gate Voltage Drain Current Static Drain-Source on Resistance Rise Time Fall Time VDMOS Drain Capacitance Conditions ID=1mA; VCOMP=2V VDS=500V; VCOMP=2V; VGS=10V ID=0.4A; ID=0.1A; VIN=300V ID=0.2A; VIN=300V VDS=25V Min. 730 Typ. Max. 100 17 15 50 100 40 Unit V uA Ω ns ns pF Electrical Characteristics (Control) (Ta=25°C, VCC=18V, unless otherwise specified) Symbol VSTART VSTOP VHYS FOSC ΔF/ΔT ICOMP RCOMP GID ILIM TD TB TONMIN TSD THYST VOVP ICH ICHOFF IOP0 IOP1 Parameter VCC Start Threshold Voltage VCC Stop Threshold Voltage VCC Threshold Hysteresis Conditions UVLO SECTION VCOMP =0V VCOMP =0V OSCILLATOR SECTION VSTOP ≤ VCC ≤ 35V; Initial Accuracy 0 ≤ TJ ≤ 100°C Frequency Change With Temperature -25°C ≤ TJ ≤ +85°C FEEDBACK SECTION Feedback Shutdown Current TJ =25°C, VCOMP = 0V COMP Pin Input Impedance ID =0mA CURRENT LIMIT (SELF-PROTECTION) SECTION ICOMP to ID Current Gain Peak Current Limit TJ = 25°C Current Sense Delay to Turn-Off ID =0.2A Blanking Time Minimum Turn On Time PROTECTION SECTION Thermal Shutdown Temperature Thermal Shutdown Hysteresis Over Voltage Protection SUPPLY CURRENT SECTION Startup Charging Current Start Up Charging Current in Thermal VCC=5V; VDS =100V TJ > TSD Shutdown Operating Supply Current VCOMP = 0V (Control Part Only) Switching Operating Supply Current VCOMP = 2V (Control Part Only) Not Switching DS-RS2022-02 November, 2010 Min. Typ. Max. Unit 13 7 5.8 14.5 8 6.5 16 9 7.2 V V V 54 60 66 KHz ±5 ±10 % 0.9 1.2 0.56 140 38 mA kΩ 560 0.70 170 40 42 0.84 200 500 700 o C C V o 46 -1 mA 0.2 4.5 3 A ns ns ns mA mA 5 mA www.Orister.com Page No. : 4/ Functional Description 1. Startup This device includes a high voltage start up current source connected on the SW of the device. As soon as a voltage is applied on the input of the converter, this start up current source is activated and to charge the VCC capacitor as long as VCC is lower than VSTART. When reaching VSTART, the start up current source is cut off by UVLO&TSD and the device begins to operate by turning on and off its main power MOSFET. As the COMP pin does not receive any current from the opto-coupler, the device operates at full current capacity and the output voltage rises until reaching the regulation point where the secondary loop begins to send a current in the opto-coupler. At this point, the converter enters a regulated operation where the COMP pin receives the amount of current needed to deliver the right power on secondary side. Fig 1 Startup circuit 2. Feedback A feedback pin controls the operation of the device. Unlike conventional PWM control circuits which use a voltage input, the COMP pin is sensitive to current. Figure 2 presents the internal current mode structure. The Power MOSFET delivers a sense current which is proportional to the main current. R2 receives this current and the current coming from the COMP pin. The voltage across R2 VR2 is then compared to a fixed reference voltage. The MOSFET is switched off when VR2 equals the reference voltage. 3. Leading Edge Blanking (LEB) At the instant the internal Sense FET is turned on, there usually exists a high current spike through the Sense FET, caused by the primary side capacitance and secondary side rectifier diode reverse recovery. Excessive voltage across the sense resistor would lead to false feedback operation in the current mode PWM control. To counter this effect, the device employs a leading edge blanking (LEB) circuit. This circuit inhibits the PWM comparator for a short time (typically 500ns) after the Sense FET is turned on. 4. Under Voltage Lock Out Once fault condition occurs, switching is terminated and the Sense FET remains off. This causes VCC to fall. When VCC reaches the UVLO stop voltage, 8V, the protection is reset and the internal high voltage current source charges the VCC capacitor. When VCC reaches the UVLO start voltage, 14.5V, the device resumes its normal operation. In this manner, the auto-restart can alternately enable and disable the switching of the power Sense FET until the fault condition is eliminated. 5. Thermal Shutdown (TSD) The Sense FET and the control IC are integrated in the same chip, making it easier for the control IC to detect the temperature of the Sense FET. When the temperature exceeds approximately 170°C, thermal shutdown is activated, the device turn off the Sense FET and the high voltage current source to charge VCC. The device will go back to work when the lower threshold temperature about 140°C is reached. 6. Over Voltage Protection (OVP) In case of malfunction in the secondary side feedback circuit, or feedback loop open caused by a defect of solder, the current through the optocoupler transistor becomes almost zero. Because excess energy is provided to the output, the output voltage may exceed the rated voltage, resulting in the breakdown of the devices in the secondary side. In order to prevent this situation, an over voltage protection (OVP) circuit is employed. If VCC exceeds 42V, OVP circuit is activated resulting in termination of the switching operation. In order to avoid undesired activation of OVP during normal operation, VCC should be properly designed to be below 42V. DS-RS2022-02 November, 2010 www.Orister.com Page No. : 5/ DIP-8 Dimension 8 6 7 5 A 1 2 3 4 B J F E C I D G H α1 K M L DIM Min. Max. A 6.29 6.40 B 9.22 9.32 C - *1.52 D - *1.27 E - *0.99 F 3.25 3.35 G 3.17 3.55 H 0.38 0.53 I 2.28 2.79 J 7.49 7.74 K - *3.00 L 8.56 8.81 M 0.229 o 94 0.381 o 97 α1 *: Typical, Unit: mm 8-Lead DIP-8 Plastic Package Package Code: P Ordering Information PART NUMBER RS20223 DS-RS2022-02 November, 2010 PIN-PACKAGE DIP-8L www.Orister.com Page No. : 6/ Soldering Methods for Orister’s Products 1. Storage environment: Temperature=10oC~35oC Humidity=65%±15% 2. Reflow soldering of surface-mount devices Figure 1: Temperature profile tP Critical Zone TL to TP TP Ramp-up TL tL Temperature Tsmax Tsmin tS Preheat 25 Ramp-down t 25oC to Peak Time Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly <3oC/sec <3oC/sec 100oC 150oC 60~120 sec 150oC 200oC 60~180 sec <3oC/sec <3oC/sec Time maintained above: - Temperature (TL) - Time (tL) 183oC 60~150 sec 217oC 60~150 sec Peak Temperature (TP) 240oC +0/-5oC 260oC +0/-5oC Time within 5oC of actual Peak Temperature (tP) 10~30 sec 20~40 sec Ramp-down Rate <6oC/sec <6oC/sec <6 minutes <8 minutes Peak temperature Dipping time Average ramp-up rate (TL to TP) Preheat - Temperature Min (Tsmin) - Temperature Max (Tsmax) - Time (min to max) (ts) Tsmax to TL - Ramp-up Rate Time 25oC to Peak Temperature 3. Flow (wave) soldering (solder dipping) Products o 245 C ±5 C Pb devices. Pb-Free devices. DS-RS2022-02 o November, 2010 o o 260 C +0/-5 C 5sec ±1sec 5sec ±1sec www.Orister.com Page No. : 7/7 Important Notice: • All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of Orister Corporation. • Orister Corporation reserves the right to make changes to its products without notice. • Orister Corporation products are not warranted to be suitable for use in Life-Support Applications, or systems. • Orister Corporation assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. DS-RS2022-02 November, 2010 www.Orister.com