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RS2135 High Precision CC/CV Primary‐Side PWM Power Switch
General Description RS2135 is a high performance offline PWM Power switch for low power AC/DC charger and adaptor applications. It operates in primary‐
side sensing and regulation. Consequently, opto‐coupler and 431 could be eliminated. Proprietary Constant Voltage (CV) and Constant Current (CC) control is integrated as shown in the Fig.1. In CC control, the current and output power setting can be adjusted externally by the sense resistor RS at CS pin. In CV control, multi‐
mode operations are utilized to achieve high performance and high efficiency. In addition, good load regulation is achieved by the built‐
in cable drop compensation. Device operates in PFM in CC mode as well at large load condition and it operates in PWM with frequency reduction at light/medium load. RS2135 offers power on soft start control and protection coverage with auto‐recovery features including Cycle‐by‐Cycle current limiting, VDD OVP, VDD clamp and UVLO. Excellent EMI performance is achieved with Frequency Jiggling.
Features Applications ●
5% Constant Voltage Regulation, 5% Constant Current Regulation at Universal AC input Primary‐side Sensing and Regulation Without 431 and Opto‐
coupler Power on Soft‐start Built‐in Leading Edge Blanking (LEB) Cycle‐by‐Cycle Current Limiting VDD Under Voltage Lockout with Hysteresis (UVLO) Programmable CV and CC Regulation Adjustable Constant Current and Output Power Setting Built‐in Secondary Constant Current Control with Primary Side Feedback Built‐in adaptive current peak regulation Built‐in Primary winding inductance compensation Program cable drop compensation VDD OVP and VDD Clamp Available in an SOP‐8 Package RoHS Compliant and 100% Lead (Pb)‐Free and Green (Halogen Free with Commercial Standard) Cell Phone Charger Digital Cameras Charger Small Power Adaptor Auxiliary Power for PC, TV etc. Linear Regulator/RCC Replacement Fig.1. Typical CC/CV Curve DS‐RS2135‐03 September, 2009 www.Orister.com
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This integrated circuit can be damaged by ESD. Orister Corporation recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. Application Circuits 1
4 -
+ 2
Pin Assignments SOP‐8 PACKAGE PIN 1 2 SYMBOL VDD COMP SOP‐8 3 INV 4 5,6 7, 8 CS DRAIN GND DESCRIPTION Power Supply Loop Compensation for CV Stability The voltage feedback from auxiliary winding. Connected to resistor divider from auxiliary winding reflecting output voltage. PWM duty cycle is determined by EA output and current sense signal at pin 4. Current sense input HV MOSFET Drain Pin. The Drain pin is connected to the primary lead of the transformer Ground Ordering Information DEVICE RS2135 Y Z DEVICE CODE Y is package & Pin Assignments designator : S : SOP‐8 Z is Lead Free designator : P: Commercial Standard, Lead (Pb) Free and Phosphorous (P) Free Package G: Green (Halogen Free with Commercial Standard) DS‐RS2135‐03 September, 2009 www.Orister.com
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Block Diagram Absolute Maximum Ratings Symbol ‐ ‐ ‐ ‐ ‐ ‐ TJ TOPR TSTG TLEAD Parameter Drain Voltage (off state) VDD Voltage VDD Zener Clamp Continuous Current COMP Voltage CS Input Voltage INV Input Voltage Junction Temperature Operating Temperature Range Storage Temperature Range Lead Temperature (Soldering, 10secs) Range ‐0.3V to Bvdss ‐0.3 to VDD_Clamp 10 ‐0.3 to 7 ‐0.3 to 7 ‐0.3 to 7 ‐20 to 150 ‐20 to +85 ‐55 to 150 260 Units V V mA V V V o
C o
C o
C o
C Note: Stress beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. Exposure to absolute maximum‐rated conditions for extended periods may affect device reliability. Output Power Table Part No. RS2135S DS‐RS2135‐03 September, 2009 Package SOP‐8 230VAC ±15% 6W 85 to 265VAC 5W www.Orister.com
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Electrical Characteristics (VDD=16V, TA=25°C, unless otherwise specified) Symbol IDD_ST IDD_OP UVLO(ON) UVLO(OFF) OVP VDD_Clamp TLEB Vth_oc Td_oc ZSENSE_IN Tss Freq_Nom Freq_startup Δf/Freq VREF_EA Gdc I_COMP_MAX BVdss RDS(on) Parameter Test Conditions Supply Voltage (VDD) Section Standby current VDD=13V Operation supply current Operation Current INV=2V,CS=0V, VDD=VDDG=20V VDD Under Voltage Lockout Enter VDD falling VDD Under Voltage Lockout Exit VDD rising Over voltage protection voltage Ramp up VDD until gate clock is off
Maximum VDD opertation voltage IDD=10mA Current Sense Input Section LEB time ‐ Over current threshold ‐ OCP Propagation delay ‐ Input Impedance ‐ Soft start time ‐ CV Section System Nominal switch frequency ‐ ‐ INV=0V, Comp=5V Frequency jitter range ‐ Error Amplifier section Reference voltage for EA ‐ DC gain of the EA ‐ Max. Cable compensation current INV=2V, COMP=0V Power MOSFET Section MOSFET Drain‐Source Breakdown Voltage
‐ Static Drain to Source On Resistance ‐ Min. Typ. Max.
Unit ‐ 5 20 uA ‐ 2.5 3.5 mA 13.5 7.5 27.5 30.5 14.5 8.5 29.5 32.5 16.0 10 31.5 34.5 V V V V ‐ 870 ‐ ‐ ‐ 540 900 150 50 10 ‐ 930 ‐ ‐ ‐ ns mV ns KΩ ms ‐ ‐ ‐ 60 14 +/‐4 ‐ ‐ ‐ KHZ KHZ % 1.97 ‐ ‐ 2 60 42 2.03 ‐ ‐ V dB uA ‐ ‐ 650 12 ‐ 15 V Ω DS‐RS2135‐03 September, 2009 www.Orister.com
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Detail Description RS2135 is a cost effective PWM power switch optimized for off‐line low power AC/DC applications including battery chargers and adaptors. It operates in primary side sensing and regulation, thus opto‐coupler and 431 are not required. Proprietary built‐in CV and CC control can achieve high precision CC/CV control meeting most adaptor and charger application requirements. Startup Current and Start up Control Startup current of RS2135 is designed to be very low so that VDD could be charged up above UVLO threshold and starts up quickly. A large value startup resistor can therefore be used to minimize the power loss in application. Operating Current The Operating current of RS2135 is as low as 2.5mA. Good efficiency is achieved with the low operating current together with Multi‐mode control features. Soft Start RS2135 features an internal soft start to minimize the component electrical over‐stress during power on startup. As soon as VDD reaches UVLO (OFF), the control algorithm will ramp peak current voltage threshold gradually from nearly zero to normal setting of 0.90V. Every restart is a soft start. CC/CV Operation RS2135 is designed to produce good CC/CV control characteristic as shown in the Fig. 1. In charger applications, a discharged battery charging starts in the CC portion of the curve until it is nearly full charged and smoothly switches to operate in CV portion of the curve. In an AC/DC adapter, the normal operation occurs only on the CV portion of the curve. The CC portion provides output current limiting. In CV operation, the output voltage is regulated through the primary side control. In CC operation mode, RS2135 will regulate the output current constant regardless of the output voltage drop. Principle of Operation To support RS2135 proprietary CC/CV control, system needs to be designed in DCM mode for flyback system (Refer to Typical Application Diagram). In the DCM flyback converter, the output voltage can be sensed via the auxiliary winding. During MOSFET turn‐on time, the load current is supplied from the output filter capacitor CO. The current in the primary winding ramps up. When MOSFET turns off, the primary current transfers to the secondary at the amplitude of IS =
The auxiliary voltage reflects the output voltage as shown in fig.2 and it is given by VAUX =
× (VO + ΔV) NS
Where ΔV indicates the drop voltage of the output Diode. DS‐RS2135‐03 September, 2009 www.Orister.com
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Fig.2. Auxiliary voltage waveform Via a resistor divider connected between the auxiliary winding and INV (pin 3), the auxiliary voltage is sampled at the end of the demagnetization and it is hold until the next sampling. The sampled voltage is compared with VREF (2.0V) and the error is amplified. The error amplifier output COMP reflects the load condition and controls the PWM switching frequency to regulate the output voltage, thus constant output voltage can be achieved. When sampled voltage is below VREF and the error amplifier output COMP reaches its maximum, the switching frequency is controlled by the sampled voltage thus the output voltage to regulate the output current, thus the constant output current can be achieved. Adjustable CC point and Output Power In RS2135, the CC point and maximum output power can be externally adjusted by external current sense resistor RS at CS pin as illustrated in Typical Application Diagram. The output power is adjusted through CC point change. The larger RS, the smaller CC point is, and the smaller output power becomes, and vice versa as shown in Fig.3. Fig.3. Adjustable output power by changing RS Operation switching frequency The switching frequency of RS2135 is adaptively controlled according to the load conditions and the operation modes. No external frequency setting components are required. The operation switching frequency at maximum output power is set to 60KHz internally. For flyback operating in DCM, The maximum output power is given by 1
POMAX = × LP × FSW × IP 2 2
Where LP indicate the inductance of primary winding and IP is the peak current of primary winding. DS‐RS2135‐03 September, 2009 www.Orister.com
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Refer to the equation 3, the change of the primary winding inductance results in the change of the maximum output power and the constant output current in CC mode. To compensate the change from variations of primary winding inductance, the switching frequency is locked by an internal loop such that the switching frequency is FSW =
Since TDemag is inversely proportional to the inductance, as a result, the product LP and Fsw is constant, thus the maximum output power and constant current in CC mode will not change as primary winding inductance changes. Up to +/‐10% variation of the primary winding inductance can be compensated. Frequency Jiggling for EMI improvement The Frequency Jiggling (switching frequency modulation) is implemented in RS2135. The oscillation frequency is modulated so that the tone energy is spread out. The spread spectrum minimizes the conduction band EMI and therefore eases the system design. Current Sensing and Leading Edge Blanking Cycle‐by‐Cycle current limiting is offered in RS2135 current mode PWM control. The switch current is detected by a sense resistor into the CS pin. An internal leading edge blanking circuit chops off the sensed voltage spike at initial internal power MOSFET on state so that the external RC filtering on sense input is no longer needed. The PWM duty cycle is determined by the current sense input voltage and the EA output voltage. Gate Drive The internal power MOSFET in RS2135 is driven by a dedicated gate driver for power switch control. Too weak the gate drive strength results in higher conduction and switch loss of MOSFET while too strong gate drive compromises EMI. A good tradeoff is achieved through the built‐in totem pole gate design with right output strength control. Programmable Cable drop Compensation In RS2135, cable drop compensation is implemented to achieve good load regulation. An offset voltage is generated at INV by an internal current flowing into the resister divider. The current is inversely proportional to the voltage across pin COMP, as a result, it is inversely proportional to the output load current, thus the drop due to the cable loss can be compensated. As the load current decreases from full‐load to no‐load, the offset voltage at INV will increase. It can also be programmed by adjusting the resistance of the divider to compensate the drop for various cable lines used. Protection Control Good power supply system reliability is achieved with its rich protection features including Cycle‐by‐Cycle current limiting (OCP), VDD clamp, Power on Soft Start, and Under Voltage Lockout on VDD(UVLO). VDD is supplied by transformer auxiliary winding output. The output of RS2135 is shut down when VDD drops below UVLO (ON) limit and Switcher enters power on start‐up sequence thereafter. DS‐RS2135‐03 September, 2009 www.Orister.com
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SOP‐8 Dimension NOTES: A. All linear dimensions are in millimeters (inches). B. This drawing is subject to change without notice. C. Body length does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.006 (0.15) per end. D. Body width does not include interlead flash. Interlead flash shall not exceed 0.017 (0.43) per side. E. Falls within JEDEC MS‐012 variation AA. DS‐RS2135‐03 September, 2009 www.Orister.com
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Soldering Methods for Orister’s Products 1. Storage environment: Temperature=10oC~35oC Humidity=65%±15% 2. Reflow soldering of surface‐mount devices Figure 1: Temperature profile tP
Critical Zone
TL to TP
t 25oC to Peak
Profile Feature Average ramp‐up rate (TL to TP) Sn‐Pb Eutectic Assembly o
<3 C/sec Pb‐Free Assembly <3oC/sec ‐ Temperature Min (Tsmin) 100oC 150oC ‐ Temperature Max (Tsmax) 150oC 200oC 60~120 sec 60~180 sec Preheat ‐ Time (min to max) (ts) Tsmax to TL ‐ Ramp‐up Rate o
<3 C/sec <3 C/sec Time maintained above: ‐ Temperature (TL) ‐ Time (tL) o
217oC 183 C 60~150 sec Peak Temperature (TP) Time within 5oC of actual Peak Temperature (tP) Ramp‐down Rate Time 25oC to Peak Temperature o
60~150 sec 240 C +0/‐5 C 260oC +0/‐5oC 10~30 sec 20~40 sec <6oC/sec <6oC/sec <6 minutes <8 minutes Peak temperature Dipping time 3. Flow (wave) soldering (solder dipping) Products Pb devices. Pb‐Free devices. o
245 C ±5 C o
260 C +0/‐5 C 5sec ±1sec 5sec ±1sec DS‐RS2135‐03 September, 2009 www.Orister.com
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Important Notice: © Orister Corporation Orister cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an Orister product. No circuit patent licenses, copyrights, mask work rights, or other intellectual property rights are implied. Orister reserves the right to make changes to their products or specifications or to discontinue any product or service without notice. Except as provided in Orister’s terms and conditions of sale, Orister assumes no liability whatsoever, and Orister disclaims any express or implied warranty relating to the sale and/or use of Orister products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. Testing and other quality control techniques are utilized to the extent Orister deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed. Orister and the Orister logo are trademarks of Orister Corporation. All other brand and product names appearing in this document are registered trademarks or trademarks of their respective holders. DS‐RS2135‐03 September, 2009 www.Orister.com