NSC 74LS240

DM54LS240/DM74LS240,
DM54LS241/DM74LS241
Octal TRI-STATEÉ Buffers/Line Drivers/Line Receivers
These buffers/line drivers are designed to improve both the
performance and PC board density of TRI-STATE buffers/
drivers employed as memory-address drivers, clock drivers,
and bus-oriented transmitters/receivers. Featuring 400 mV
of hysteresis at each low current PNP data line input, they
provide improved noise rejection and high fanout outputs
and can be used to drive terminated lines down to 133X.
Features
Y
Y
Y
Typical IOL (sink current)
54LS
12 mA
74LS
24 mA
Typical IOH (source current)
b 12 mA
54LS
b 15 mA
74LS
Typical propagation delay times
Inverting
10.5 ns
Noninverting 12 ns
Typical enable/disable time 18 ns
Typical power dissipation (enabled)
Inverting
130 mW
Noninverting 135 mW
Y
General Description
Y
Y
Y
TRI-STATE outputs drive bus lines directly
PNP inputs reduce DC loading on bus lines
Hysteresis at data inputs improves noise margins
Y
Connection Diagrams
Dual-In-Line Package
Dual-In-Line Package
TL/F/6411 – 1
TL/F/6411 – 2
Order Number DM54LS241J,
DM54LS241W, DM54LS241E,
DM74LS241WM or DM74LS241N
See NS Package Number E20A, J20A,
M20B, N20A or W20A
Order Number DM54LS240J,
DM54LS240W, DM54LS240E,
DM74LS240WM or DM74LS240N
See NS Package Number E20A, J20A,
M20B, N20A or W20A
Function Tables
LS240
LS241
Inputs
Output
Inputs
Outputs
G
A
Y
G
G
1A
2A
1Y
L
L
H
L
H
X
H
L
Z
X
X
X
H
H
L
L
L
H
X
X
X
L
H
X
X
X
X
X
X
X
L
H
X
L
H
Z
2Y
L
H
Z
L e Low Logic Level
H e High Logic Level
X e Either Low or High Logic Level
Z e High Impedance
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.
C1995 National Semiconductor Corporation
TL/F/6411
RRD-B30M105/Printed in U. S. A.
DM54LS240/DM74LS240, DM54LS241/DM74LS241
Octal TRI-STATE Buffers/Line Drivers/Line Receivers
April 1992
Absolute Maximum Ratings (Note)
Note: The ‘‘Absolute Maximum Ratings’’ are those values
beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The
parametric values defined in the ‘‘Electrical Characteristics’’
table are not guaranteed at the absolute maximum ratings.
The ‘‘Recommended Operating Conditions’’ table will define
the conditions for actual device operation.
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
7V
Input Voltage
7V
Operating Free Air Temperature Range
b 55§ C to a 125§ C
DM54LS, 54LS
DM74LS
0§ C to a 70§ C
b 65§ C to a 150§ C
Storage Temperature Range
Recommended Operating Conditions
Symbol
DM54LS240, 241
Parameter
VCC
Supply Voltage
VIH
High Level Input Voltage
VIL
Low Level Input Voltage
IOH
High Level Output Current
IOL
Low Level Output Current
TA
Free Air Operating Temperature
DM74LS240, 241
Units
Min
Nom
Max
Min
Nom
Max
4.5
5
5.5
4.75
5
5.25
2
V
2
V
0.7
0.8
V
b 12
b 15
mA
24
mA
70
§C
12
b 55
125
0
Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)
Symbol
Parameter
Conditions
Min
VI
Input Clamp Voltage
VCC e Min, II e b18 mA
HYS
Hysteresis (VT a b VTb)
Data Inputs Only
VCC e Min
VOH
High Level Output Voltage
VCC e Min, VIH e Min
VIL e Max, IOH e b1 mA
DM74
VCC e Min, VIH e Min
VIL e Max, IOH e b3 mA
DM54/DM74
VCC e Min, VIH e Min
VIL e 0.5V, IOH e Max
DM54/DM74
VOL
IOZH
IOZL
Low Level Output Voltage
Typ
Max Units
(Note 1)
b 1.5
0.2
VCC e Min
VIL e Max
VIH e Min
IOL e 12 mA
IOL e Max
Off-State Output Current,
VCC e Max
High Level Voltage Applied VIL e Max
VIH e Min
Off-State Output Current,
V
0.4
V
3.4
V
2.7
2.4
2
DM74
0.4
DM54
0.4
DM74
0.5
V
VO e 2.7V
20
mA
VO e 0.4V
b 20
mA
0.1
mA
Low Level Voltage Applied
II
Input Current at Maximum
Input Voltage
VCC e Max, VI e 7V (DM74)
VI e 10V (DM54)
IIH
High Level Input Current
VCC e Max, VI e 2.7V
20
mA
IIL
Low Level Input Current
VCC e Max, VI e 0.4V
b 0.2
mA
IOS
Short Circuit Output Current VCC e Max (Note 2)
b 225
mA
ICC
Supply Current
b 40
VCC e Max,
Outputs Open
Outputs High
Outputs Low
LS240, LS241
23
LS240
26
44
LS241
27
46
Outputs Disabled LS240
29
50
LS241
32
54
Note 1: All typicals are at VCC e 5V, TA e 25§ C.
Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second.
2
13
mA
Switching Characteristics at VCC e 5V and TA e 25§ C
Symbol
tPLH
tPHL
tPZL
tPZH
tPLZ
tPHZ
tPLH
tPHL
tPZL
tPZH
Parameter
Conditions
DM54LS
DM74LS
Max
Max
Propagation Delay Time
Low to High Level Output
CL e 45 pF
RL e 667X
LS240
18
14
LS241
18
18
Propagation Delay Time
High to Low Level Output
CL e 45 pF
RL e 667X
LS240
18
18
LS241
18
18
Output Enable Time to
Low Level
CL e 45 pF
RL e 667X
LS240
30
30
LS241
30
30
Output Enable Time to
High Level
CL e 45 pF
RL e 667X
LS240
23
23
LS241
23
23
Output Disable Time
from Low Level
CL e 5 pF
RL e 667X
LS240
25
25
LS241
25
25
Output Disable Time
from High Level
CL e 5 pF
RL e 667X
LS240
18
18
LS241
18
18
Propagation Delay Time
Low to High Level Output
CL e 150 pF
RL e 667X
LS240
18
LS241
21
Propagation Delay Time
High to Low Level Output
CL e 150 pF
RL e 667X
LS240
22
LS241
22
Output Enable Time to
Low Level
CL e 150 pF
RL e 667X
LS240
33
LS241
33
Output Enable Time to
High Level
CL e 150 pF
RL e 667X
LS240
26
LS241
26
Note: 54LS Output load is CL e 50 pF for tPLH, tPHL, tPZL and tPZH.
3
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Physical Dimensions inches (millimeters)
Ceramic Leadless Chip Carrier Package (E)
Order Number DM54LS240E or DM54LS241E
NS Package Number E20A
20-Lead Ceramic Dual-In-Line Package (J)
Order Number DM54LS240J or DM54LS241J
NS Package Number J20A
4
Physical Dimensions inches (millimeters) (Continued)
20-Lead Wide Small Outline Molded Package (M)
Order Number DM74LS240WM or DM74LS241WM
NS Package Number M20B
20-Lead Molded Dual-In-Line Package (N)
Order Number DM74LS240N or DM74LS241N
NS Package Number N20A
5
DM54LS240/DM74LS240, DM54LS241/DM74LS241
Octal TRI-STATE Buffers/Line Drivers/Line Receivers
Physical Dimensions inches (millimeters) (Continued)
20-Lead Ceramic Flat Package (W)
Order Number DM54LS240W or DM54LS241W
NS Package Number W20A
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