RICHTEK RT8010GQW

®
RT8010/A
1.5MHz, 1A, High Efficiency PWM Step-Down DC/DC Converter
General Description
Features
The RT8010/A is a high efficiency Pulse-Width-Modulated
(PWM) step-down DC/DC converter. Capable of delivering
1A output current over a wide input voltage range from
2.5V to 5.5V, the RT8010/A is ideally suited for portable
electronic devices that are powered from 1-cell Li-ion
battery or from other power sources such as cellular
phones, PDAs and hand-held devices.
Two operating modes are available including : PWM/LowDropout autoswitch and shutdown modes. The Internal
synchronous rectifier with low RDS(ON) dramatically reduces
conduction loss at PWM mode. No external Schottky
diode is required in practical application.
The RT8010/A enters Low Dropout mode when normal
PWM cannot provide regulated output voltage by
continuously turning on the upper P-MOSFET. RT8010/A
enter shut-down mode and consumes less than 0.1μA
when EN pin is pulled low.
The switching ripple is easily smoothed-out by small
package filtering elements due to a fixed operating
frequency of 1.5MHz. This along with small WDFN-6L 2x2
and WQFN-16L 3x3 package provides small PCB area
application. Other features include soft start, lower internal
reference voltage with 2% accuracy, over temperature
protection, and over current protection.
2.5V to 5.5V Input Range
Output Voltage (Adjustable Output From 0.6V to VIN)
` RT8010 : 1V, 1.2V, 1.5V, 1.6V, 1.8V, 2.5V and 3.3V
Fixed/Adjustable Output Voltage
` RT8010A Adjustable Output Voltage Only
1A Output Current
95% Efficiency
No Schottky Diode Required
1.5MHz Fixed-Frequency PWM Operation
Small 6-Lead WDFN and 16-Lead WQFN Package
RoHS Compliant and 100% Lead (Pb)-Free
Applications
Mobile Phones
Personal Information Appliances
Wireless and DSL Modems
MP3 Players
Portable Instruments
Ordering Information
RT8010/A(-
)
Package Type
QW : WDFN/WQFN (W-Type)
Lead Plating System
P : Pb Free
G : Green (Halogen Free and Pb Free)
Output Voltage
Default : Adjustable (RT8010/A)
Fixed (RT8010)
10 : 1.0V
12 : 1.2V
15 : 1.5V
16 : 1.6V
18 : 1.8V
25 : 2.5V
33 : 3.3V
Pin Configurations
IC
LX
LX
LX
(TOP VIEW)
16 15 14 13
IC
EN
VIN
1
6
2
3
5
7
4
FB/VOUT
GND
LX
GND
GND
GND
FB/VOUT
1
12
2
11
3
10
VIN
VIN
9 VIN
17
4
6
7
8
GND
IC
EN
IC
5
VIN
WDFN-6L 2x2 (RT8010)
WQFN-16L 3x3
WDFN-6L 2x2
WQFN-16L 3x3 (RT8010A)
Note :
Marking Information
For marking information, contact our sales representative
directly or through a Richtek distributor located in your
area.
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
DS8010/A-09
September 2012
Richtek products are :
`
RoHS compliant and compatible with the current require-
`
Suitable for use in SnPb or Pb-free soldering processes.
ments of IPC/JEDEC J-STD-020.
is a registered trademark of Richtek Technology Corporation.
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1
RT8010/A
Typical Application Circuit
VIN
2.5V to 5.5V
3
CIN
4.7µF
VIN
LX
L
2.2µH
4
VOUT
RT8010/A
2
1
EN
VOUT
IC
GND
6
COUT
10µF
5
Figure 1. Fixed Voltage Regulator
VIN
2.5V to 5.5V
3
LX
4
VOUT
CIN
C1
RT8010/A
4.7µF
2
1
VOUT = VREF
VIN
L
2.2µH
EN
FB
IC
GND
R1
COUT
6
10µF
5
IR2
x ⎛⎜ 1 + R1 ⎞⎟
⎝ R2 ⎠
R2
with R2 = 300kΩ to 60kΩ so the IR2 = 2μA to 10μA,
and (R1 x C1) should be in the range between 3x10-6 and 6x10-6 for component selection.
Figure 2. Adjustable Voltage Regulator
Layout Guide
RT8010/A_ADJ
RT8010/A_FIX
IC
1
6 VOUT
EN
2
5 GND
Output capacitor
must be near
RT8010
3
1
6 FB
EN
2
5 GND
VIN
3
4 LX
4 LX
COUT
COUT
CIN
CIN must be placed
to the VIN as close
as possible.
Output
capacitor
must be near
RT8010/A
L1
L1
VIN
IC
CIN
LX should be connected
to Inductor by wide and
short trace, keep
sensitive components
away from this trace.
CIN must be placed
to the VIN as close
as possible.
LX should be
connected to
Inductor by wide
and short trace,
keep sensitive
components away
from this trace.
R1
R2
Figure 3
Layout note :
1. The distance that CIN connects to VIN is as close as possible (Under 2mm).
2. COUT should be placed near RT8010/A.
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DS8010/A-09
September 2012
RT8010/A
Functional Pin Description
Pin No.
Pin Name
Pin Function
RT8010
RT8010A
1
6, 8, 16
IC
Internal Connection. Leave floating and do not make connection
to this pin.
2
7
EN
Chip Enable (Active High).
3
9, 10, 11, 12
VIN
Power Input. (Pin 9 and Pin 10 must be connected with Pin 11).
4
13, 14, 15
LX
Pin for Switching. (Pin 13 must be connected with Pin 14).
5
1, 2, 3, 5
GND
Ground.
6
4
FB/VOUT
Feedback/Output Voltage.
Ground. The exposed pad must be soldered to a large PCB and
7 (Exposed Pad) 17 (Exposed Pad) GND
connected to GND for maximum thermal dissipation.
Function Block Diagram
EN
VIN
RS1
OSC &
Shutdown
Control
Slope
Compensation
FB/VOUT
Error
Amplifier
Current
Limit
Detector
Current
Sense
Control
Logic
PWM
Comparator
Driver
LX
RC
COMP
UVLO &
Power Good
Detector
RS2
VREF
GND
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
DS8010/A-09
September 2012
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RT8010/A
Absolute Maximum Ratings
(Note 1)
Supply Input Voltage ------------------------------------------------------------------------------------------------EN, FB Pin Voltage -------------------------------------------------------------------------------------------------LX Pin Switch Voltage ----------------------------------------------------------------------------------------------<20ns ------------------------------------------------------------------------------------------------------------------LX Pin Switch Current ----------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C
WDFN-6L 2x2 --------------------------------------------------------------------------------------------------------WQFN-16L 3x3 ------------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2)
WDFN-6L 2x2, θJA ---------------------------------------------------------------------------------------------------WDFN-6L 2x2, θJC --------------------------------------------------------------------------------------------------WQFN-16L 3x3, θJA -------------------------------------------------------------------------------------------------WQFN-16L 3x3, θJC ------------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) -------------------------------------------------------------------------Storage Temperature Range --------------------------------------------------------------------------------------Junction Temperature -----------------------------------------------------------------------------------------------ESD Susceptibility (Note 3)
HBM (Human Body Model) -----------------------------------------------------------------------------------------
Recommended Operating Conditions
6.5V
−0.3V to VIN
−0.3V to (VIN + 0.3V)
−4.5V to 7.5V
2A
0.833W
1.47W
120°C/W
20°C/W
68°C/W
7.5°C/W
260°C
−65°C to 150°C
150°C
2kV
(Note 4)
Supply Input Voltage ------------------------------------------------------------------------------------------------- 2.5V to 5.5V
Junction Temperature Range --------------------------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range --------------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VIN = 3.6V, VOUT = 2.5V, L = 2.2μH, CIN = 4.7μF, COUT = 10μF, TA = 25°C, IMAX = 1A unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
2.5
--
5.5
V
Input Voltage Range
VIN
Quiescent Current
IQ
IOUT = 0mA, VFB = VREF + 5%
--
50
70
μA
Shutdown Current
I SHDN
EN = GND
--
0.1
1
μA
Reference Voltage
VREF
For Adjustable Output Voltage
0.588
0.6
0.612
V
Adjustable Output Range
VOUT
(Note 5)
VREF
--
VIN − 0.2V
V
ΔVOUT
VIN = 2.5V to 5.5V, VOUT = 1V
0A < IOUT < 1A
VIN = 2.5V to 5.5V, VOUT = 1.2V
0A < IOUT < 1A
VIN = 2.5V to 5.5V, VOUT = 1.5V
0A < IOUT < 1A
VIN = 2.5V to 5.5V, VOUT = 1.6V
0A < IOUT < 1A
VIN = 2.5V to 5.5V, VOUT = 1.8V
0A < IOUT < 1A
−3
--
3
−3
--
3
−3
--
3
−3
--
3
−3
--
3
ΔVOUT
Output Voltage
Accuracy
Fix
ΔVOUT
ΔVOUT
ΔVOUT
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%
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DS8010/A-09
September 2012
RT8010/A
Parameter
Test Conditions
Min
Typ
Max
ΔVOUT
VIN = VOUT + ΔV to 5.5V (Note 6)
VOUT = 2.5V, 0A < IOUT < 1A
−3
--
3
ΔVOUT
VIN = VOUT + ΔV to 5.5V (Note 6)
VOUT = 3.3V, 0A < IOUT < 1A
−3
--
3
ΔVOUT
VIN = VOUT + ΔV to 5.5V
0A < IOUT < 1A
−3
--
3
%
FB Input Current
IFB
VFB = VIN
−50
--
50
nA
0.28
--
RDS(ON)_P IOUT = 200mA
VIN = 3.6V
--
P-MOSFET RON
VIN = 2.5V
--
0.38
--
0.25
--
RDS(ON)_N IOUT = 200mA
VIN = 3.6V
--
N-MOSFET RON
VIN = 2.5V
--
0.35
--
P-Channel Current Limit
ILIM_P
VIN = 2.5V to 5.5 V
1.4
1.5
--
EN High-Level Input Voltage
VEN_H
VIN = 2.5V to 5.5V
1.5
--
--
EN Low-Level Input Voltage
VEN_L
VIN = 2.5V to 5.5V
--
--
0.4
Under Voltage Lock Out threshold UVLO
--
1.8
--
V
Hysteresis
--
0.1
--
V
1.2
1.5
1.8
MHz
--
160
--
°C
100
--
--
%
−1
--
1
μA
Output Voltage
Accuracy
Symbol
Fix
Adjustable
Oscillator Frequency
fOSC
Thermal Shutdown Temperature
TSD
(Note 6)
VIN = 3.6V, IOUT = 100mA
Max. Duty Cycle
LX Leakage Current
VIN = 3.6V, VLX = 0V or VLX = 3.6V
Unit
%
Ω
Ω
A
V
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. Guarantee by design.
Note 6. ΔV = IOUT x PRDS(ON)
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
DS8010/A-09
September 2012
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RT8010/A
Typical Operating Characteristics
Efficiency vs. Output Current
Efficiency vs. Output Current
100
100
90
80
80
70
Efficiency (%)
Efficiency (%)
90
VIN = 3.6V
VIN = 4.2V
VIN = 5V
60
50
40
30
70
VIN = 5V
VIN = 3.3V
VIN = 2.5V
60
50
40
30
20
20
10
10
VOUT = 3.3V, COUT = 4.7μF, L = 4.7μH
VOUT = 1.2V, COUT = 4.7μF, L = 4.7μH
0
0
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
0
1
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
Output Current (A)
Output Current (A)
Efficiency vs. Output Current
UVLO Voltage vs. Temperature
100
2.0
90
1.9
Rising
70
Input Voltage (V)
Efficiency (%)
80
VIN = 5V
VIN = 3.3V
VIN = 2.5V
60
50
40
30
1.8
1.7
1.6
Falling
1.5
1.4
20
1.3
10
VOUT = 1.2V, IOUT = 0A
VOUT = 1.2V, COUT = 10μF, L = 2.2μH
0
1.2
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
-40 -25 -10
5
1.15
1.5
1.10
1.4
1.05
Rising
0.95
0.90
0.85
35
50
65
80
95 110 125
EN Pin Threshold vs. Temperature
1.6
EN Pin Threshold (V)
EN Pin Threshold (V)
EN Pin Threshold vs. Input Voltage
1.20
1.00
20
Temperature (°C)
Output Current (A)
Falling
0.80
0.75
0.70
1.3
1.2
1.1
1.0
Rising
0.9
0.8
Falling
0.7
0.6
0.65
VOUT = 1.2V, IOUT = 0A
0.60
0.5
VIN = 3.6V, VOUT = 1.2V, IOUT = 0A
0.4
2.5
2.8
3.1
3.4
3.7
4
4.3
4.6
4.9
5.2
Input Voltage (V)
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5.5
-40 -25 -10
5
20
35
50
65
80
95 110 125
Temperature (°C)
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DS8010/A-09
September 2012
RT8010/A
Output Voltage vs. Temperature
1.25
1.225
1.24
1.220
1.23
1.215
Output Voltage (V)
Output Voltage (V)
Output Voltage vs. Load Current
1.230
VIN = 5V
1.210
1.205
VIN = 3.6V
1.200
1.195
1.22
1.21
1.20
1.19
1.18
1.190
1.17
1.185
1.16
1.180
1.15
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
VIN = 3.6V, IOUT = 0A
-40 -25 -10
5
35
50
65
80
95 110 125
Frequency vs. Temperature
1.60
1.60
1.55
1.55
1.50
1.50
Frequency (kHz)1
Frequency (kHz)
Frequency vs. Input Voltage
1.45
1.40
1.35
1.30
1.45
1.40
1.35
1.30
1.25
1.25
VIN = 3.6V, VOUT = 1.2V, IOUT = 300mA
VIN = 3.6V, VOUT = 1.2V, IOUT = 300mA
1.20
1.20
2.5
2.8
3.1
3.4
3.7
4
4.3
4.6
4.9
5.2
-40 -25 -10
5.5
5
Output Current Limit vs. Input Voltage
35
50
65
80
95 110 125
Output Current Limit vs. Temperature
2.6
2.5
2.5
2.4
2.4
Output Current Limit (A)
2.6
2.3
2.2
2.1
2.0
1.9
1.8
1.7
1.6
20
Temperature (°C)
Input Voltage (V)
Output Current Limit (A)
20
Temperature (°C)
Load Current (A)
VOUT = 1.2V @ TA = 20°C
1.5
2.3
VIN = 5V
VIN = 3.6V
2.2
2.1
VIN = 3.3V
2.0
1.9
1.8
1.7
1.6
VOUT = 1.2V
1.5
2.5
2.8
3.1
3.4
3.7
4
4.3
4.6
4.9
5.2
Input Voltage (V)
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DS8010/A-09
September 2012
5.5
-40 -25 -10
5
20
35
50
65
80
95 110 125
Temperature (°C)
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RT8010/A
Power On from EN
Power On from EN
VIN = 3.6V, VOUT = 1.2V, IOUT = 10mA
VIN = 3.6V, VOUT = 1.2V, IOUT = 1A
VEN
(2V/Div)
VEN
(2V/Div)
VOUT
(1V/Div)
VOUT
(1V/Div)
I IN
(500mA/Div)
I IN
(500mA/Div)
Time (100μs/Div)
Time (100μs/Div)
Power On from VIN
Power Off from EN
VIN = 3.6V, VOUT = 1.2V, ILX = 1A
VEN = 3V, VOUT = 1.2V, ILX = 1A
VIN
(2V/Div)
VEN
(2V/Div)
VOUT
(1V/Div)
VOUT
(1V/Div)
ILX
(1A/Div)
ILX
(1A/Div)
Time (250μs/Div)
Time (100μs/Div)
Load Transient Response
Load Transient Response
VIN = 3.6V, VOUT = 1.2V
IOUT = 50mA to 0.5A
VIN = 3.6V, VOUT = 1.2V
IOUT = 50mA to 1A
VOUT ac
(50mV/Div)
VOUT ac
(50mV/Div)
IOUT
(500mA/Div)
IOUT
(500mA/Div)
Time (50μs/Div)
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Time (50μs/Div)
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DS8010/A-09
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RT8010/A
Load Transient Response
Load Transient Response
VIN = 5V, VOUT = 1.2V
IOUT = 50mA to 0.5A
VIN = 5V, VOUT = 1.2V
IOUT = 50mA to 1A
VOUT ac
(50mV/Div)
VOUT ac
(50mV/Div)
IOUT
(500mA/Div)
IOUT
(500mA/Div)
Time (50μs/Div)
Time (50μs/Div)
Output Ripple Voltage
Output Ripple Voltage
VIN = 3.6V, VOUT = 1.2V
IOUT = 1A
VIN = 5V, VOUT = 1.2V
IOUT = 1A
VOUT
(10mV/Div)
VOUT
(10mV/Div)
VLX
(2V/Div)
VLX
(2V/Div)
Time (500ns/Div)
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RT8010/A
Applications Information
The basic RT8010/A application circuit is shown in Typical
Application Circuit. External component selection is
determined by the maximum load current and begins with
the selection of the inductor value and operating frequency
followed by CIN and COUT.
current is exceeded. This results in an abrupt increase in
inductor ripple current and consequent output voltage ripple.
Do not allow the core to saturate!
Inductor Selection
Toroid or shielded pot cores in ferrite or permalloy materials
are small and don't radiate energy but generally cost more
than powdered iron core inductors with similar
characteristics. The choice of which style inductor to use
mainly depends on the price vs size requirements and
any radiated field/EMI requirements.
For a given input and output voltage, the inductor value
and operating frequency determine the ripple current. The
ripple current ΔIL increases with higher VIN and decreases
with higher inductance.
V
V
ΔIL = ⎡⎢ OUT ⎤⎥ × ⎡⎢1− OUT ⎤⎥
VIN ⎦
⎣ f ×L ⎦ ⎣
Having a lower ripple current reduces the ESR losses in
the output capacitors and the output voltage ripple. Highest
efficiency operation is achieved at low frequency with small
ripple current. This, however, requires a large inductor.
A reasonable starting point for selecting the ripple current
is ΔIL = 0.4(IMAX). The largest ripple current occurs at the
highest VIN. To guarantee that the ripple current stays
below a specified maximum, the inductor value should be
chosen according to the following equation :
⎡ VOUT ⎤ ⎡
VOUT ⎤
L= ⎢
⎥ × ⎢1 − VIN(MAX) ⎥
f
I
×
Δ
L(MAX)
⎣
⎦ ⎣
⎦
Inductor Core Selection
Once the value for L is known, the type of inductor must
be selected. High efficiency converters generally cannot
afford the core loss found in low cost powdered iron cores,
forcing the use of more expensive ferrite or mollypermalloy
cores. Actual core loss is independent of core size for a
fixed inductor value but it is very dependent on the
inductance selected. As the inductance increases, core
losses decrease. Unfortunately, increased inductance
requires more turns of wire and therefore copper losses
will increase.
Ferrite designs have very low core losses and are preferred
at high switching frequencies, so design goals can
concentrate on copper loss and preventing saturation.
Ferrite core material saturates “hard”, which means that
Different core materials and shapes will change the size/
current and price/current relationship of an inductor.
CIN and COUT Selection
The input capacitance, C IN, is needed to filter the
trapezoidal current at the source of the top MOSFET. To
prevent large ripple voltage, a low ESR input capacitor
sized for the maximum RMS current should be used. RMS
current is given by :
V
IRMS = IOUT(MAX) OUT
VIN
VIN
−1
VOUT
This formula has a maximum at VIN = 2VOUT, where
I RMS = I OUT/2. This simple worst-case condition is
commonly used for design because even significant
deviations do not offer much relief. Note that ripple current
ratings from capacitor manufacturers are often based on
only 2000 hours of life which makes it advisable to further
derate the capacitor, or choose a capacitor rated at a higher
temperature than required. Several capacitors may also
be paralleled to meet size or height requirements in the
design.
The selection of COUT is determined by the Effective Series
Resistance (ESR) that is required to minimize voltage
ripple and load step transients, as well as the amount of
bulk capacitance that is necessary to ensure that the
control loop is stable. Loop stability can be checked by
viewing the load transient response as described in a later
section. The output ripple, ΔVOUT, is determined by :
1
⎤
ΔVOUT ≤ ΔIL ⎡⎢ESR+
8fCOUT ⎥⎦
⎣
inductance collapses abruptly when the peak design
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RT8010/A
The output ripple is highest at maximum input voltage
since ΔIL increases with input voltage. Multiple capacitors
placed in parallel may be needed to meet the ESR and
RMS current handling requirements. Dry tantalum, special
polymer, aluminum electrolytic and ceramic capacitors are
all available in surface mount packages. Special polymer
capacitors offer very low ESR but have lower capacitance
density than other types. Tantalum capacitors have the
highest capacitance density but it is important to only
use types that have been surge tested for use in switching
power supplies. Aluminum electrolytic capacitors have
significantly higher ESR but can be used in cost-sensitive
applications provided that consideration is given to ripple
current ratings and long term reliability. Ceramic capacitors
have excellent low ESR characteristics but can have a
high voltage coefficient and audible piezoelectric effects.
The high Q of ceramic capacitors with trace inductance
can also lead to significant ringing.
For adjustable voltage mode, the output voltage is set by
an external resistive divider according to the following
equation :
VOUT = VREF ⎛⎜ 1+ R1 ⎞⎟
⎝ R2 ⎠
where VREF is the internal reference voltage (0.6V typ.)
Using Ceramic Input and Output Capacitors
The VIN quiescent current loss dominates the efficiency
loss at very low load currents whereas the I2R loss
dominates the efficiency loss at medium to high load
currents. In a typical efficiency plot, the efficiency curve
at very low load currents can be misleading since the
actual power lost is of no consequence.
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
input, VIN. At best, this ringing can couple to the output
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at VIN large enough to damage the
part.
Output Voltage Programming
The resistive divider allows the FB pin to sense a fraction
of the output voltage as shown in Figure 4.
VOUT
R1
FB
RT8010/A
R2
Efficiency Considerations
The efficiency of a switching regulator is equal to the output
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as :
Efficiency = 100% − (L1+ L2+ L3+ ...)
where L1, L2, etc. are the individual losses as a percentage
of input power. Although all dissipative elements in the
circuit produce losses, two main sources usually account
for most of the losses : VIN quiescent current and I2R
losses.
1. The VIN quiescent current appears due to two factors
including : the DC bias current as given in the electrical
characteristics and the internal main switch and
synchronous switch gate charge currents. The gate charge
current results from switching the gate capacitance of the
internal power MOSFET switches. Each time the gate is
switched from high to low to high again, a packet of charge
ΔQ moves from VIN to ground.
The resulting ΔQ/Δt is the current out of VIN that is typically
larger than the DC bias current. In continuous mode,
IGATECHG = f (QT + QB)
where QT and QB are the gate charges of the internal top
and bottom switches. Both the DC bias and gate charge
losses are proportional to VIN and thus their effects will
be more pronounced at higher supply voltages.
GND
Figure 4. Setting the Output Voltage
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
DS8010/A-09
September 2012
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
11
RT8010/A
The Figure 5 of derating curves allows the designer to
see the effect of rising ambient temperature on the
maximum power allowed.
1.6
Maximum Power Dissipation (W)1
2. I2R losses are calculated from the resistances of the
internal switches, RSW and external inductor RL. In
continuous mode, the average output current flowing
through inductor L is “chopped” between the main switch
and the synchronous switch. Thus, the series resistance
looking into the LX pin is a function of both top and bottom
MOSFET RDS(ON) and the Duty Cycle (DC) as follows :
RSW = RDS(ON)TOP x DC + RDS(ON)BOT x (1 − DC)
The RDS(ON) for both the top and bottom MOSFETs can be
obtained from the Typical Performance Characteristics
curves. Thus, to obtain I2R losses, simply add RSW to RL
and multiply the result by the square of the average output
current.
Four Layers PCB
1.4
1.2
WQFN-16L 3x3
1.0
0.8
WDFN-6L 2x2
0.6
0.4
0.2
0.0
Other losses including CIN and COUT ESR dissipative
losses and inductor core losses generally account for less
than 2% of the total loss.
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 5. Derating Curve of Maximum Power Dissipation
Thermal Considerations
The maximum power dissipation depends on the thermal
resistance of IC package, PCB layout, the rate of
surroundings airflow and temperature difference between
junction to ambient. The maximum power dissipation can
be calculated by following formula :
PD(MAX) = (TJ(MAX) − TA) / θJA
Where T J(MAX) is the maximum operation junction
temperature, TA is the ambient temperature and the θJA is
the junction to ambient thermal resistance.
For recommended operating conditions specification,
where TJ(MAX) is the maximum junction temperature of the
die and TA is the maximum ambient temperature. The
junction to ambient thermal resistance θJA is layout
dependent. For WDFN-6L 2x2 packages, the thermal
resistance θJA is 120°C/W on the standard JEDEC 51-7
four layers thermal test board.
The maximum power dissipation at TA = 25°C can be
calculated by following formula :
PD(MAX) = (125°C − 25°C) / 120°C/W = 0.833W for
WDFN-6L 2x2 packages
The maximum power dissipation depends on operating
ambient temperature for fixed T J(MAX) and thermal
resistance θJA.
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
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12
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to ΔILOAD (ESR), where ESR is the effective series
resistance of COUT. ΔILOAD also begins to charge or
discharge COUT generating a feedback error signal used
by the regulator to return VOUT to its steady-state value.
During this recovery time, VOUT can be monitored for
overshoot or ringing that would indicate a stability problem.
Layout Considerations
Follow the PCB layout guidelines for optimal performance
of RT8010/A.
`
For the main current paths as indicated in bold lines in
Figure 6, keep their traces short and wide.
`
Put the input capacitor as close as possible to the device
pins (VIN and GND).
`
LX node is with high frequency voltage swing and should
be kept small area. Keep analog components away from
LX node to prevent stray capacitive noise pick-up.
is a registered trademark of Richtek Technology Corporation.
DS8010/A-09
September 2012
RT8010/A
`
Connect feedback network behind the output capacitors.
Keep the loop area small. Place the feedback
components near the RT8010/A.
`
An example of 2-layer PCB layout is shown in Figure 7
to Figure 8 for reference.
VIN
RT8010/A
3
4
VIN
LX
1
2
Figure 7. Top Layer
C2
IC
FB/VOUT
C1
VOUT
L1
EN
GND
6
R1
C3
5
R2
VIN
R3
Figure 8. Bottom Layer
Figure 6. EVB Schematic
Table 1. Recommended Inductors
Supplier
Inductance
Current Rating (mA)
(μH)
DCR
(mΩ)
Dimensions
(mm)
Series
TAIYO YUDEN
2.2
1480
60
3.00 x 3.00 x 1.50
NR 3015
GOTREND
2.2
1500
58
3.85 x 3.85 x 1.80
GTSD32
Sumida
2.2
1500
75
4.50 x 3.20 x 1.55
CDRH2D14
Sumida
4.7
1000
135
4.50 x 3.20 x 1.55
CDRH2D14
TAIYO YUDEN
4.7
1020
120
3.00 x 3.00 x 1.50
NR 3015
GOTREND
4.7
1100
146
3.85 x 3.85 x 1.80
GTSD32
Table 2. Recommended Capacitors for CIN and COUT
Supplier
Capacitance
(μF)
Package
Part Number
TDK
4.7
0603
C1608JB0J475M
MURATA
4.7
0603
GRM188R60J475KE19
TAIYO YUDEN
4.7
0603
JMK107BJ475RA
TAIYO YUDEN
10
0603
JMK107BJ106MA
TDK
10
0805
C2012JB0J106M
MURATA
10
0805
GRM219R60J106ME19
MURATA
10
0805
GRM219R60J106KE19
TAIYO YUDEN
10
0805
JMK212BJ106RD
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
DS8010/A-09
September 2012
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
13
RT8010/A
Outline Dimension
D2
D
L
E
E2
1
e
b
A
A1
SEE DETAIL A
2
1
2
1
A3
DETAIL A
Pin #1 ID and Tie Bar Mark Options
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
0.700
0.800
0.028
0.031
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.200
0.350
0.008
0.014
D
1.950
2.050
0.077
0.081
D2
1.000
1.450
0.039
0.057
E
1.950
2.050
0.077
0.081
E2
0.500
0.850
0.020
0.033
e
L
0.650
0.300
0.026
0.400
0.012
0.016
W-Type 6L DFN 2x2 Package
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
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14
is a registered trademark of Richtek Technology Corporation.
DS8010/A-09
September 2012
RT8010/A
D
SEE DETAIL A
D2
L
1
E
E2
e
b
A
A1
1
1
2
2
DETAIL A
Pin #1 ID and Tie Bar Mark Options
A3
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
0.700
0.800
0.028
0.031
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.180
0.300
0.007
0.012
D
2.950
3.050
0.116
0.120
D2
1.300
1.750
0.051
0.069
E
2.950
3.050
0.116
0.120
E2
1.300
1.750
0.051
0.069
e
L
0.500
0.350
0.020
0.450
0.014
0.018
W-Type 16L QFN 3x3 Package
Richtek Technology Corporation
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
DS8010/A-09
September 2012
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