RICHTEK RT8060A

RT8060A
1.5MHz, 1A High Efficiency Step-Down Converter
General Description
Features
The RT8060A is a current mode, high efficiency PWM
step-down DC/DC converter that can support a wide input
voltage range from 2.7V to 5.5V, while delivering up to 1A
output current. The current mode operation provides fast
transient response and eases loop stabilization.
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A 1.5MHz frequency operation allows the use of a smaller
inductor to meet the space and height limitations handheld
applications.
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The RT8060A is available in a SOT-23-5 package.
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2.7V to 5.5V Wide Input Voltage Range
Adjustable Output Voltage
1A Output Current
Up to 95% Efficiency
1.5MHz Fixed Frequency PWM Operation
Power Good Indicator
Over Current Protection
Internal Sort-Start
No Schottky Diode Required
Internal Compensation
RoHS Compliant and Halogen Free
Ordering Information
RT8060A
Applications
Package Type
B : SOT-23-5
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Lead Plating System
G : Green (Halogen Free and Pb Free)
Storage Device : HDD/ODD
Wireless and DSL Modems
Pin Configurations
Note :
(TOP VIEW)
Richtek products are :
`
RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.
`
FB
VIN
5
4
Suitable for use in SnPb or Pb-free soldering processes.
2
PGOOD GND LX
Marking Information
20 = : Product Code
20=DNN
3
SOT-23-5
DNN : Date Code
Typical Application Circuit
4
VIN
CIN
4.7µF
VIN
LX
RT8060A
5
FB
1
PGOOD
GND
DS8060A-00 March 2011
3
L
2.2µH
VOUT
R1
200k
C1
10pF
COUT
10µF
R2
200k
2
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1
RT8060A
Functional Pin Description
Pin No.
Pin Name
Pin Function
1
PGOOD
Power Good Indicator.
2
GND
Ground.
3
LX
Switch Node.
4
VIN
Supply Input.
5
FB
Feedback Input.
Function Block Diagram
VIN
OSC &
Shutdown
Control
Slope
Compensation
Current
Sense
Control
Logic
PWM
Comparator
FB
RS1
Current
Limit
Detector
Driver
LX
Error
Amplifier
RC
CCOMP
UVLO &
Power Good
Detector
RS2
GND
VREF
PGOOD
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DS8060A-00 March 2011
RT8060A
Absolute Maximum Ratings
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(Note 1)
Supply Input Voltage, VIN -----------------------------------------------------------------------------------------LX Pin Voltage -------------------------------------------------------------------------------------------------------Other I/O Pin Voltage ----------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C
SOT-23-5 -------------------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2)
SOT-23-5, θJA --------------------------------------------------------------------------------------------------------Junction Temperature Range -------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------Storage Temperature Range -------------------------------------------------------------------------------------ESD Susceptibility (Note 3)
HBM (Human Body Mode) ---------------------------------------------------------------------------------------MM (Machine Mode) ------------------------------------------------------------------------------------------------
Recommended Operating Conditions
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−0.3V to 6.5V
−0.3V to (VIN + 0.3V)
−0.3V to 6.5V
0.4W
250°C/W
150°C
260°C
−65°C to 150°C
2kV
200V
(Note 4)
Supply Input Voltage ------------------------------------------------------------------------------------------------ 2.7V to 5.5V
Junction Temperature Range -------------------------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range -------------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VIN = 3.6V, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Quiescent Current
IQ
Reference Voltage
VREF
Under Voltage Lockout
Threshold
VUVLO
Switching Frequency
fSW
Test Conditions
VIN Rising
Hysteresis
Min
Typ
Max
Unit
--
78
--
μA
0.588
0.6
0.612
V
2
--
2.3
0.2
2.45
--
V
1.2
1.5
1.8
MHz
PGOOD Low Threshold
VFB Falling
--
85
--
%VREF
PGOOD High Threshold
VFB Rising
--
90
--
%VREF
--
150
--
°C
Thermal Shutdown Temperature TSD
Switch On Resistance, High
RPFET
ILX = 0.2A
--
250
--
mΩ
Switch On Resistance, Low
RNFET
ILX = 0.2A
--
200
--
mΩ
Peak Current Limit
ILIM
1.1
1.5
2
A
Output Voltage Line Regulation
VIN = 2.7V to 5.5V
--
0.1
--
%/V
Output Voltage Load Regulation
0A < ILOAD < 0.6A
--
1
--
%/A
DS8060A-00 March 2011
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3
RT8060A
Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. θJA is measured in natural convection at TA = 25°C on a low effective thermal conductivity test board of JEDEC 51-3
thermal measurement standard.
Note 3. Devices are ESD sensitive. Handling precaution recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
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DS8060A-00 March 2011
RT8060A
Typical Operating Characteristics
Reference Voltage vs. Input Voltage
Efficiency vs. Load Current
0.620
100
0.615
90
Efficiency (%)
80
70
Reference Voltage (V)
VIN = 3.8V
VIN = 5V
VIN = 5.5V
60
50
40
30
20
10
0
0.2
0.4
0.6
0.8
0.605
0.600
0.595
0.590
0.585
0.580
0.575
VOUT = 1.2V
0
0.610
IOUT = 0.6A
0.570
2.8
1
3.3
Reference Voltage vs. Temperature
4.8
5.3
Reference Voltage vs. Output Current
0.620
0.620
0.615
0.615
0.610
0.610
Reference Voltage (V)
Reference Voltage (V)
4.3
Input Voltage (V)
Load Current (A)
0.605
0.600
0.595
0.590
0.585
0.580
0.575
3.8
VIN = 5V, IOUT = 0.6A
0.605
0.600
VIN = 5.5V
VIN = 5V
VIN = 4.2V
0.595
0.590
0.585
0.580
0.575
VBuck = 12V
0.570
0.570
-50
-25
0
25
50
75
100
125
0.0
Temperature (°C)
0.2
0.4
0.6
0.8
1.0
Output Current (A)
Load Transient Response
Frequency vs. Temperature
1.60
Frequency (MHz)1
1.55
1.50
VOUT
(50mV/Div)
VIN = 3.6V
1.45
1.40
VIN = 5.5V
1.35
IOUT
(500mA/Div)
1.30
1.25
IOUT = 0.5A
VIN = 5.5V, IOUT = 50mA to 1A
1.20
-50
-25
0
25
50
75
100
125
Time (250μs/Div)
Temperature (°C)
DS8060A-00 March 2011
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5
RT8060A
Line Transient Response
Switching
VOUT
(20mV/Div)
VIN
(2V/Div)
I Inductor
(500mA/Div)
VOUT
(10mV/Div)
VLX
(5V/Div)
IOUT = 100mA
VIN1 = 5.5V, IOUT = 500mA
Time (100μs/Div)
Time (250ns/Div)
PGOOD Threshold vs. Temperature
Switching
100%
100
Percent of V REF (%)
VOUT
(20mV/Div)
I Inductor
(1A/Div)
VLX
(5V/Div)
VIN1 = 5.5V, IOUT = 1A
Time (250ns/Div)
97
95%
94
Low to High
91
90%
88
85%
85
High to Low
82
80%
79
76
75%
73
70%
70
-50
VIN = 5.5V
-25
0
25
50
75
100
125
Temperature (°C)
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6
DS8060A-00 March 2011
RT8060A
Applications Information
VOUT ⎤
⎡ VOUT ⎤ ⎡
L=⎢
x
1
−
⎢
⎥
⎥
⎣ f × ΔIL(MAX) ⎦ ⎢⎣ VIN(MAX) ⎥⎦
The basic RT8060A application circuit is shown in Typical
Application Circuit. External component selection is
determined by the maximum load current and begins with
the selection of the inductor value and operating frequency
followed by CIN and COUT.
A smaller inductor changes its current more quickly for a
given voltage drive than a larger inductor, resulting in faster
transient response. A larger inductor will reduce output
ripple and current ripple, but at the expense of reduced
transient performance and a physically larger inductor
package size. For this reason, a larger capacitor, C1, will
be required for larger inductor sizes.
Inductor Selection
For a given input and output voltage, the inductor value
and operating frequency determine the ripple current. The
ripple current ΔIL increases with higher VIN and decreases
with higher inductance.
The input regulator has an instantaneous peak current
clamp to prevent the inductor from saturating during
transient load or start-up conditions. The clamp is
designed so that it does not interfere with normal operation
at high loads and reasonable inductor ripple. It is intended
to prevent inductor current runaway in case of a shorted
output.
⎤
⎡V
⎤ ⎡ V
ΔIL = ⎢ OUT ⎥ x ⎢1− OUT ⎥
VIN ⎦
⎣ f ×L ⎦ ⎣
Having a lower ripple current reduces the ESR losses in
the output capacitors and the output voltage ripple. Highest
efficiency operation is achieved at low frequency with small
ripple current. This, however, requires a large inductor.
The DC winding resistance and AC core losses of the
inductor will also affect efficiency, and therefore available
output power. These effects are difficult to characterize
and vary by application. Some inductors and capacitors
that may be suitable for this application are listed in Table
below :
A reasonable starting point for selecting the ripple current
is ΔIL = 0.4(IMAX). The largest ripple current occurs at the
highest VIN. To guarantee that the ripple current stays
below a specified maximum, the inductor value should be
chosen according to the following equation :
Table
Length
Width
Height
Inductance
RDC
IDC
(mm)
(mm)
(mm)
(μH)
(mΩ)
(A)
Max.
Max.
Max.
L
Max.
Max.
5
5
3
4.8
4.8
2.8
1.2
1.4
1
1
2.2
2.2
50
73
120
3.3
3
1
VLF3012A
VLS2010E
VLS2012E
3
2.1
2.1
2.8
2.1
1.2
1
2.2
2.2
100
228
1
1
NR6045T1R0N
CB2016T2R2M
6
2.2
2.1
6
1.8
1.2
4.5
1.8
2.2
1
2.2
153
19
130
1
4.2
1
NR6020T2R2N
NR3015
6
3
6
3
2
1.5
2.2
2.2
34
60
2.7
1.48
LPS4018
3.9
3.9
1.7
3.3
80
2.2
CoilCraft
D53LC
DB318C
5
3.8
5
3.8
3
1.8
3.3
3.3
34
70
2.26
1.55
Toko
WE-TPC Type M1
4.8
4.8
1.8
3.3
65
1.95
Wurth
P/N
VLF5012ST-1R0N2R5
VLF5014ST-2R2M2R3
VLF3010A-1
DS8060A-00 March 2011
Supplier
TDK
TAIYO
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7
RT8060A
CIN and COUT Selection
Using Ceramic Input and Output Capacitors
The input capacitance, C IN, is needed to filter the
trapezoidal current at the source of the top MOSFET. To
prevent large ripple voltage, a low ESR input capacitor
sized for the maximum RMS current should be used. RMS
current is given by :
Higher value, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
input, VIN. At best, this ringing can couple to the output
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at VIN large enough to damage the
part.
IRMS = IOUT(MAX)
VOUT
x
VIN
VIN
−1
VOUT
This formula has a maximum at VIN = 2VOUT, where IRMS
= IOUT/2. This simple worst-case condition is commonly
used for design because even significant deviations do
not result in much difference. Choose a capacitor rated at
a higher temperature than required. Several capacitors may
also be paralleled to meet size or height requirements in
the design.
The selection of COUT is determined by the effective series
resistance (ESR) that is required to minimize voltage ripple
and load step transients, as well as the amount of bulk
capacitance that is necessary to ensure that the control
loop is stable. Loop stability can be checked by viewing
the load transient response as described in a later section.
The output ripple, ΔVOUT, is determined by :
1 ⎤
⎡
ΔVOUT ≤ ΔIL x ⎢ESR +
8fCOUT ⎥⎦
⎣
The output ripple is highest at maximum input voltage
since ΔIL increases with input voltage. Multiple capacitors
placed in parallel may be needed to meet the ESR and
RMS current handling requirements. Dry tantalum,
specialpolymer, aluminum electrolytic and ceramic
capacitors are all available in surface mount packages.
Special polymer capacitors offer very low ESR but have
lower capacitance density than other types. Tantalum
capacitors have the highest capacitance density but it is
important to only use types that have been surge tested
for use in switching power supplies. Aluminum electrolytic
capacitors have significantly higher ESR but can be used
in cost-sensitive applications provided that consideration
is given to ripple current ratings and long term reliability.
Ceramic capacitors have excellent low ESR characteristics
but can have a high voltage coefficient and audible
piezoelectric effects. The high Q of ceramic capacitors
with trace inductance can also lead to significant ringing.
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8
Output Voltage Programming
The resistive voltage divider allows the FB pin to sense a
fraction of the output voltage as shown in Figure 1.
VOUT
LX
RT8060A
R1
FB
R2
GND
Figure 1. Output Voltage Setting
For adjustable voltage mode, the output voltage is set by
an external resistive voltage divider according to the
following equation :
R1
VOUT = VREF × (1 +
)
R2
where VREF is the internal reference voltage (0.6V typ.)
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to ΔILOAD (ESR), where ESR is the effective series
resistance of COUT. ΔILOAD also begins to charge or
discharge COUT, generating a feedback error signal used
by the regulator to return VOUT to its steady-state value.
During this recovery time, VOUT can be monitored for
overshoot or ringing that would indicate a stability problem.
DS8060A-00 March 2011
RT8060A
PGOOD is an open-drain output that indicates whether
the output voltage is ready or not. PGOOD is typically
pulled up to 3.3V or tied with VIN. PGOOD is in high
impedance when the voltage on FB pin exceeds the rising
threshold 90% of VREF 0.6V (typ). PGOOD is in low
impedance when the voltage on FB pin falls below the
falling threshold 85% of VREF.
If the voltage detector feature is not required, connect
PGOOD to ground.
VFB
85% VREF
90% VREF
PGOOD
The maximum power dissipation depends on the operating
ambient temperature for fixed T J(MAX) and thermal
resistance, θJA. For the RT8060A package, the derating
curve in Figure 3 allows the designer to see the effect of
rising ambient temperature on the maximum power
dissipation.
Maximum Power Dissipation (W)1
PGOOD Output
0.45
Single-Layer PCB
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.00
Figure 2. VFB and PGOOD Comparator Waveform
Thermal Considerations
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 3. Derating Curves for RT8060A Package
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
For recommended operating condition specifications of
the RT8060A, the maximum junction temperature is 125°C
and TA is the ambient temperature. The junction to ambient
thermal resistance, θJA, is layout dependent. For SOT23-5 packages, the thermal resistance, θJA, is 250°C/W
on a standard JEDEC 51-3 single-layer thermal test board.
The maximum power dissipation at TA = 25°C can be
calculated by the following formula :
P D(MAX) = (125°C − 25°C) / (250°C/W) = 0.4W for
SOT-23-5 package
DS8060A-00 March 2011
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9
RT8060A
Outline Dimension
H
D
L
B
C
b
A
A1
e
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
0.889
1.295
0.035
0.051
A1
0.000
0.152
0.000
0.006
B
1.397
1.803
0.055
0.071
b
0.356
0.559
0.014
0.022
C
2.591
2.997
0.102
0.118
D
2.692
3.099
0.106
0.122
e
0.838
1.041
0.033
0.041
H
0.080
0.254
0.003
0.010
L
0.300
0.610
0.012
0.024
SOT-23-5 Surface Mount Package
Richtek Technology Corporation
Richtek Technology Corporation
Headquarter
Taipei Office (Marketing)
5F, No. 20, Taiyuen Street, Chupei City
5F, No. 95, Minchiuan Road, Hsintien City
Hsinchu, Taiwan, R.O.C.
Taipei County, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Tel: (8862)86672399 Fax: (8862)86672377
Email: [email protected]
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
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DS8060A-00 March 2011