RICHTEK RT8063

®
RT8063
3A, 2MHz, Synchronous Step-Down Converter
General Description
Features
The RT8063 is a high efficiency synchronous, step-down
DC/DC converter. Its input voltage range is from 2.7V to
5.5V and provides an adjustable regulated output voltage
from 0.8V to 5V while delivering up to 3A of output current.
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High Efficiency : Up to 95%
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Adjustable Frequency : 200kHz to 2MHz
No Schottky Diode Required
0.8V Reference Allows Low Output Voltage
Low Dropout Operation : 100% Duty Cycle
Enable Function
Internal Soft-Start
RoHS Compliant and Halogen Free
The internal synchronous low on resistance power
switches increase efficiency and eliminate the need for
an external Schottky diode. The default switching
frequency is set at 2MHz, if the RT pin is left open. It can
also be varied from 200kHz to 2MHz by adding an external
resistor. Current mode operation with external
compensation allows the transient response to be
optimized over a wide range of loads and output capacitors.
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Applications
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Ordering Information
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LCD TV and Monitor
Notebook Computers
Distributed Power Systems
IP Phones
Digital Cameras
RT8063
Package Type
SP : SOP-8 (Exposed Pad-Option 2)
Pin Configurations
(TOP VIEW)
Lead Plating System
G : Green (Halogen Free and Pb Free)
COMP
Note :
Richtek products are :
`
RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.
`
Suitable for use in SnPb or Pb-free soldering processes.
8
GND
2
EN
3
VIN
7
GND
6
9
4
5
FB
RT
LX
LX
SOP-8 (Exposed Pad)
Marking Information
RT8063GSP : Product Number
RT8063
YMDNN : Date Code
GSPYMDNN
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
DS8063-07
November 2012
is a registered trademark of Richtek Technology Corporation.
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1
RT8063
Typical Application Circuit
RT8063
VIN
2.7V to 5.5V
4
VIN
LX
5, 6
L
VOUT
R1
CIN
10µF
FB
3 EN
ROSC
COMP
8
1
COUT
RCOMP
CCOMP
7 RT
R2
GND 2,
9 (Exposed Pad)
Note : Using all Ceramic Capacitors
Table 1. Recommended Components Selection for fSW = 1MHz
VOUT (V)
R1 (kΩ)
R2 (kΩ)
R COMP (kΩ)
CCOMP (pF)
L (μH)
COUT (μF)
3.3
75
24
33
560
2
22
2.5
51
24
22
560
2
22
1.8
30
24
15
560
1.5
22
1.5
21
24
13
560
1.5
22
1.2
12
24
11
560
1.5
22
1.0
6
24
8.2
560
1.5
22
Functional Pin Description
Pin No.
1
Pin Name
COMP
2,
GND
9 (Exposed Pad)
Pin Function
Error Amplifier Compensation Point. The current comparator threshold increases
with this control voltage. Connect external compensation elements to this pin to
stabilize the control loop.
Ground. The exposed pad must be soldered to a large PCB and connected to GND
for maximum power dissipation.
3
EN
Enable Control Input. Float or connect this pin to logic high for enable. Connect to
GND for disable.
4
VIN
Power Input Supply. Decouple this pin to GND with a capacitor.
5, 6
LX
Internal Power MOSFET Switches Output. Connect these pins to the inductor
together.
7
RT
8
FB
Oscillator Resistor Input. Connecting a resistor from this pin to GND sets the
switching frequency. If this pin is floating, the frequency will be set at 2MHz
internally.
Feedback. Receives the feedback voltage from a resistive divider connected across
the output.
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is a registered trademark of Richtek Technology Corporation.
DS8063-07
November 2012
RT8063
Function Block Diagram
RT
SD
VIN
ISEN
OSC
Slope
Com
COMP
0.8V
EA
FB
Output
Clamp
OC
Limit
Driver
Int-SS
LX
Hiccup
Control
Logic
0.7V
EN
Enable
0.4V
P-G
UV
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
DS8063-07
November 2012
NISEN
OTP
GND
N-MOS ILIM
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3
RT8063
Absolute Maximum Ratings
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(Note 1)
Supply Input Voltage, VIN ---------------------------------------------------------------------------------------LX Pin Switch Voltage --------------------------------------------------------------------------------------------<10ns ----------------------------------------------------------------------------------------------------------------Other I/O Pin Voltages -------------------------------------------------------------------------------------------LX Pin Switch Current --------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C
SOP-8 (Exposed Pad) -------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2)
SOP-8 (Exposed Pad), θJA --------------------------------------------------------------------------------------SOP-8 (Exposed Pad), θJC -------------------------------------------------------------------------------------Junction Temperature ---------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) -----------------------------------------------------------------------Storage Temperature Range ------------------------------------------------------------------------------------ESD Susceptibility (Note 3)
HBM (Human Body Model) ---------------------------------------------------------------------------------------
Recommended Operating Conditions
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−0.3V to 6.5V
−0.3V to (VIN + 0.3V)
−5V to 8.5V
−0.3V to (VIN + 0.3V)
5A
1.33W
75°C/W
15°C/W
150°C
260°C
−65°C to 150°C
2kV
(Note 4)
Supply Input Voltage ----------------------------------------------------------------------------------------------- 2.7V to 5.5V
Junction Temperature Range ------------------------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range ------------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VIN = 3.3V, TA = 25°C, unless otherwise specified)
Parameter
Min
Typ
Max
Unit
0.784
0.8
0.816
V
Active, VFB = 0.78V, Not
Switching
--
460
--
Shutdown
--
--
10
Output Voltage Line Regulation
VIN = 2.7V to 5.5V
--
0.1
--
%/V
Output Voltage Load Regulation
Error Amplifier
gm
Trans-conductance
Current Sense Trans-resistance RT
0A < ILOAD < 3A
--
0.25
--
%
--
400
--
μA/V
--
0.3
--
Ω
R OSC = 300k
0.8
1
1.2
Switching
0.2
--
2
Feedback Reference Voltage
Symbol
VREF
DC Bias Current
Switching Frequency
Test Conditions
fSW
μA
MHz
Logic-High
VIH
1.6
--
--
Logic-Low
VIL
--
--
0.4
Switch On Resistance, High
RDS(ON)_P ILX = 0.5A
--
120
180
mΩ
Switch On Resistance, Low
RDS(ON)_N ILX = 0.5A
--
80
120
mΩ
EN Input Voltage
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V
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DS8063-07
November 2012
RT8063
Parameter
Peak Current Limit
Symbol
Min
Typ
Max
Unit
3.6
4.5
--
A
VIN Rising
--
2.4
--
VIN Falling
--
2.2
--
ILIM
Under Voltage Lockout
Threshold
RT Shutdown Threshold
Test Conditions
VRT
--
VIN − 0.7 VIN − 0.4
V
V
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
DS8063-07
November 2012
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RT8063
Typical Operating Characteristics
Efficiency vs. Output Current
Output Voltage vs. Output Current
100
1.130
90
1.125
1.120
1.115
Output Voltage (V)
Efficiency (%)
80
70
60
50
40
30
1.110
1.105
1.100
1.095
1.090
1.085
20
1.080
10
1.075
VIN = 5V, VOUT = 1.1V, IOUT = 0 to 3A
0
VIN = 5V, VOUT = 1.1V, IOUT = 0 to 3A
1.070
0
0.5
1
1.5
2
2.5
3
0
0.5
1
Output Current (A)
Switching Frequency vs. Temperature
0.84
1.09
0.83
1.08
1.07
1.06
1.05
1.04
1.03
1.02
2.5
3
0.82
0.81
0.80
0.79
0.78
0.77
1.01
VIN = 5V, VOUT = 1.1V
VIN = 5V, VOUT = 1.1V, IOUT = 0.6A
1.00
0.76
-50
-25
0
25
50
75
100
125
-50
-25
0
Temperature (°C)
50
75
100
125
EN Voltage vs. Temperature
1.6
2.7
1.5
2.6
1.4
EN Voltage (V)
2.8
2.5
25
Temperature (°C)
VIN UVLO vs. Temperature
VIN UVLO (V)
2
Reference Voltage vs. Temperature
1.10
Reference Voltage (V)
Switching Frequency (MHz)1
1.5
Output Current (A)
Turn On
2.4
2.3
2.2
Turn Off
2.1
1.3
Turn On
1.2
1.1
Turn Off
1.0
0.9
2.0
0.8
1.9
0.7
0.6
1.8
-50
-25
0
25
50
75
100
Temperature (°C)
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125
-50
-25
0
25
50
75
100
125
Temperature (°C)
is a registered trademark of Richtek Technology Corporation.
DS8063-07
November 2012
RT8063
Load Transient Response
Output Voltage Ripple
VOUT
(200mV/Div)
VLX
(5V/Div)
VOUT
(10mV/Div)
IOUT
(1A/Div)
VIN = 5V, VOUT = 1.1V, IOUT = 1A to 3A,
RCOMP = 10kΩ, CCOMP = 560pF
VIN = 5V, IOUT = 3A
Time (100μs/Div)
Time (500ns/Div)
Power On from EN
Power Off from EN
VEN
(5V/Div)
VLX
(5V/Div)
VEN
(5V/Div)
VLX
(5V/Div)
VOUT
(1V/Div)
VOUT
(1V/Div)
IOUT
(5A/Div)
IOUT
(5A/Div)
VIN = 5V, VOUT = 1.1V, IOUT = 3A
Time (250μs/Div)
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
DS8063-07
November 2012
VIN = 5V, VOUT = 1.1V, IOUT = 3A
Time (250μs/Div)
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RT8063
Application Information
Main Control Loop
During normal operation, the internal high side power
switch (P-MOSFET) is turned on at the beginning of each
clock cycle. The inductor current increases until it reaches
the value defined by the output voltage (VCOMP) of the error
amplifier. The error amplifier adjusts its output voltage by
comparing the feedback signal from a resistive voltage
divider on the FB pin with an internal 0.8V reference. When
the load current increases, it causes a reduction in the
feedback voltage relative to the reference. The error amplifier
increases its output voltage until the average inductor
current matches the new load current. When the high
side power MOSFET shuts off, the synchronous power
switch (N-MOSFET) turns on until the beginning of the
next clock cycle.
Output Voltage Setting
The output voltage is set by an external resistive voltage
divider according to the following equation :
VOUT = VREF × ⎛⎜ 1 + R1 ⎞⎟
R2 ⎠
⎝
where VREF is 0.8V typical. The resistive voltage divider
allows the FB pin to sense a fraction of the output voltage
as shown in Figure 1.
Operating Frequency
Selection of the operating frequency is a tradeoff between
efficiency and component size. High frequency operation
allows the use of smaller inductor and capacitor values,
but at the expense of efficiency. On the other hand,
operation at lower frequency improves efficiency by
reducing internal gate charge and switching losses, but
requires larger inductance and/or capacitance to maintain
low output ripple voltage.
The operating frequency of the IC is determined by an
external resistor, ROSC, that is connected between the RT
pin and ground. The value of the resistor sets the ramp
current that is used to charge and discharge an internal
timing capacitor within the oscillator. The practical switching
frequency ranges from 200kHz to 2MHz. However, when
the RT pin is floating, the internal frequency is set at 2MHz.
Determine the RT resistor value by examining the curve
below. Please notice the minimum on time is about 90ns.
2.4
Switching Frequency (MHz)1
The basic IC application circuit is shown in Typical
Application Circuit. External component selection is
determined by the maximum load current and begins with
the selection of the inductor value and operating frequency
followed by CIN and COUT.
2.0
1.6
1.2
0.8
0.4
0.0
0
300
600
VOUT
900
1200
1500
1800
2100
RRT (k Ω )
Figure 2. Switching Frequency vs. RRT
R1
FB
RT8063
Inductor Selection
R2
GND
Figure 1. Setting the Output Voltage
Soft-Start
The RT8063 includes an internal soft-start function that
gradually raises the clamp on the COMP pin.
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For a given input and output voltage, the inductor value
and operating frequency determine the ripple current. The
ripple current, DIL, increases with higher VIN and decreases
with higher inductance :
V
V
ΔIL = ⎡⎢ OUT ⎤⎥ × ⎛⎜ 1 - OUT ⎞⎟
VIN ⎠
⎣ fxL ⎦ ⎝
is a registered trademark of Richtek Technology Corporation.
DS8063-07
November 2012
RT8063
Having a lower ripple current reduces not only the ESR
losses in the output capacitors but also the output voltage
ripple. Highest efficiency operation is achieved by reducing
ripple current at low frequency, but it requires a large
inductor to attain this goal.
For the ripple current selection, the value of DIL = 0.4(IMAX)
will be a reasonable starting point. The largest ripple current
occurs at the highest VIN. To guarantee that the ripple
current stays below a specified maximum, the inductor
value should be chosen according to the following
equation:
⎡ VOUT ⎤ ⎛
VOUT ⎞
L= ⎢
⎥ × ⎜ 1 − VIN(MAX) ⎟
f
I
×
Δ
L(MAX)
⎣
⎦ ⎝
⎠
Using Ceramic Input and Output Capacitors
Higher value, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
input VIN. At best, this ringing can couple to the output
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at VIN large enough to damage the
part.
Slope Compensation and Inductor Peak Current
Slope compensation provides stability in constant
frequency architectures by preventing sub harmonic
oscillations at duty cycles greater than 50%. It is
accomplished internally by adding a compensating ramp
to the inductor current signal. Normally, the maximum
inductor peak current is reduced when slope compensation
is added. For the RT8063, however, a separate inductor
current signal is used to monitor over current condition,
so this keeps the maximum output current relatively
constant regardless of duty cycle.
Hiccup Mode Under Voltage Protection
A Hiccup Mode Under Voltage Protection (UVP) function
is provided for the IC. When the FB voltage drops below
half of the feedback reference voltage, VREF, the UVP
function will be triggered to auto soft-start the power stage
continuously until this event is cleared. The Hiccup Mode
UVP reduces input current in short-circuit conditions and
prevents false triggering during soft-start process.
Under Voltage Lockout Threshold
The IC features input Under Voltage Lockout protection
(UVLO). If the input voltage exceeds the UVLO rising
threshold voltage, the converter will reset and prepare the
PWM for operation. If the input voltage falls below the
UVLO falling threshold voltage during normal operation,
the device will stop switching. The UVLO rising and falling
threshold voltage has a hysteresis to prevent noise caused
reset.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance, θJA, is layout dependent. For
SOP-8 (Exposed Pad) packages, the thermal resistance,
θJA, is 75°C/W on a standard JEDEC 51-7 four-layer
thermal test board. The maximum power dissipation at
TA = 25°C can be calculated by the following formula :
PD(MAX) = (125°C − 25°C) / (75°C/W) = 1.333W for
SOP-8 (Exposed Pad) package
Copyright © 2012 Richtek Technology Corporation. All rights reserved.
DS8063-07
November 2012
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RT8063
Layout Considerations
Maximum Power Dissipation (W)1
The maximum power dissipation depends on the operating
ambient temperature for fixed T J(MAX) and thermal
resistance, θJA. The derating curve in Figure 3 allows the
designer to see the effect of rising ambient temperature
on the maximum power dissipation.
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
Follow the PCB layout guidelines for optimal performance
of the IC.
`
Connect the terminal of the input capacitor(s), CIN, as
close as possible to the VIN pin. This capacitor provides
the AC current into the internal power MOSFETs.
`
LX node experiences high frequency voltage swing and
should be kept within a small area.
`
Keep all sensitive small-signal nodes away from the LX
node to prevent stray capacitive noise pick up.
`
Connect the FB pin directly to the feedback resistors.
The resistive voltage divider must be connected between
VOUT and GND.
Four-Layer PCB
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 3. Derating Curve of Maximum Power Dissipation
Place the feedback
resistors as close to the
IC as possible
Place the compensation
components as close to
the IC as possible
GND
R2
R1 VOUT
CCOMP
COMP
RCOMP
2
EN
3
VIN
VIN
8
GND
7
GND
6
9
4
5
CIN
FB
RT
ROSC
LX
GND
LX
L1
COUT
VOUT
Place the input and output capacitors
as close to the IC as possible
LX should be connected
to inductor by wide and
short trace, and keep
sensitive components
away from this trace
Figure 4. PCB Layout Guide
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is a registered trademark of Richtek Technology Corporation.
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RT8063
Outline Dimension
H
A
M
EXPOSED THERMAL PAD
(Bottom of Package)
Y
J
X
B
F
C
I
D
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
4.801
5.004
0.189
0.197
B
3.810
4.000
0.150
0.157
C
1.346
1.753
0.053
0.069
D
0.330
0.510
0.013
0.020
F
1.194
1.346
0.047
0.053
H
0.170
0.254
0.007
0.010
I
0.000
0.152
0.000
0.006
J
5.791
6.200
0.228
0.244
M
0.406
1.270
0.016
0.050
X
2.000
2.300
0.079
0.091
Y
2.000
2.300
0.079
0.091
X
2.100
2.500
0.083
0.098
Y
3.000
3.500
0.118
0.138
Option 1
Option 2
8-Lead SOP (Exposed Pad) Plastic Package
Richtek Technology Corporation
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
DS8063-07
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