® RT9187C 600mA, Ultra-Low Dropout, CMOS Regulator General Description The RT9187C is a high-performance, 600mA LDO regulator, offering extremely high PSRR and ultra-low dropout. This chip is ideal for portable RF and wireless applications with demanding performance and space requirements. A noise reduction pin is also available for further reduction of output noise. Regulator ground current increases only slightly in dropout, further prolonging the battery life. The RT9187C also works well with low-ESR ceramic capacitors, reducing the amount of board space necessary for power applications, critical in hand-held wireless devices. The RT9187C consumes less than 0.1μA in shutdown mode. The other features include ultra-low dropout voltage, high output accuracy, current limiting protection, and high ripple rejection ratio. The RT9187C is available in the SOT23-5 package. Ordering Information RT9187C Package Type B : SOT-23-5 Lead Plating System G : Green (Halogen Free and Pb Free) Note : RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. ` Ultra-Low-Noise for RF Application Ultra-Fast Response in Line/Load Transient <0.1μ μA Standby Current When Shutdown Low Dropout : 100mV at 500mA Wide Operating Voltage Ranges : 2.5V to 5.5V TTL-Logic-Controlled Shutdown Input Current Limiting Protection Thermal Shutdown Protection Only 2.2μ μF Output Capacitor Required for Stability High Power Supply Rejection Ratio RoHS Compliant and Halogen Free Applications CDMA/GSM Cellular Handsets Battery-Powered Equipment Laptop, Palmtops, Notebook Computers Hand-Held Instruments Mini PCI & PCI-Express Cards PCMCIA & New Cards Portable Information Appliances Pin Configurations (TOP VIEW) VOUT Richtek products are : ` Features Suitable for use in SnPb or Pb-free soldering processes. ADJ 5 4 2 3 VIN GND EN SOT-23-5 Marking Information 40= : Product Code 40=DNN DNN : Date Code Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS9187C-00 June 2012 is a registered trademark of Richtek Technology Corporation. www.richtek.com 1 RT9187C Typical Application Circuit VIN 1 VIN CIN 2.2µF VOUT 5 RT9187C ADJ Chip Enable R1 VOUT COUT 2.2µF 4 3 EN R2 GND 2 VOUT = VREF x ⎛⎜ 1 + R1 ⎞⎟ (V) R2 ⎠ ⎝ Ω to maintain regulation. Note : The value of R2 should be less than 100kΩ Function Pin Description Pin No. Pin Name Pin Function 1 VIN Voltage Input. 2 GND Ground. 3 EN Chip Enable (Active High). 4 ADJ Output Voltage Feedback. 5 VOUT Voltage Output. Function Block Diagram VIN EN EN OTP POR BIAS - VREF + Current Limit Quick start VOUT ADJ GND Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 2 is a registered trademark of Richtek Technology Corporation. DS9187C-00 June 2012 RT9187C Absolute Maximum Ratings (Note 1) Supply Input Voltage ------------------------------------------------------------------------------------------------------EN Input Voltage -----------------------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C SOT-23-5 --------------------------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2) SOT-23-5, θJA ---------------------------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) -------------------------------------------------------------------------------Junction Temperature -----------------------------------------------------------------------------------------------------Storage Temperature Range --------------------------------------------------------------------------------------------ESD Susceptibility (Note 3) HBM (Human Body Model) ----------------------------------------------------------------------------------------------- Recommended Operating Conditions 6V 6V 0.400W 250°C/W 260°C 150°C −65°C to 150°C 2kV (Note 4) Supply Input Voltage ------------------------------------------------------------------------------------------------------EN Input Voltage -----------------------------------------------------------------------------------------------------------Junction Temperature Range --------------------------------------------------------------------------------------------Ambient Temperature Range --------------------------------------------------------------------------------------------- 2.5V to 5.5V 0V to 5.5V −40°C to 125°C −40°C to 85°C Electrical Characteristics (VIN = VOUT + 1V, VEN = VIN, CIN = COUT = 2.2μF (Ceramic), TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit 0.784 0.8 0.816 V Reference Voltage Tolerance VREF ADJ Pin Current I ADJ VADJ = VREF -- 10 100 nA IQ VEN ≥ VIH, IOUT = 0mA -- 300 400 μA I STBY VEN ≤ VIL,VIN = 3.3V -- 0.1 1 μA I LIM RLOAD = 0.5Ω, VIN = 3.3V 0.9 -- -- A I OUT = 0.3A, VOUT = 5V -- 60 100 IOUT = 0.5A, VOUT = 5V -- 100 200 -- 0.4 -- Quiescent Current Standby Current (Note 5) (Note 6) Current Limit Dropout Voltage (Note 7) VDROP Load Regulation (Note 8) ΔVLOAD VIN = (VOUT + 0.5V) 10mA < I OUT < 0.5A Logic-High VIH VIN = 3.3V 1.8 -- -- Logic-Low VIL VIN = 3.3V -- -- 0.6 EN Current I EN VIN = 3.3V, Enable -- 0.1 1 Power Supply f = 100Hz Rejection Rate f = 10kHz PSRR I OUT = 300mA -- −60 -- -- −50 -- Line Regulation ΔVLINE VIN = (VOUT + 0.5) to 5.5V, I OUT = 1mA -- -- 0.3 % Start-Up Time t Start_Up RLOAD = 3Ω -- 150 -- μs -- 170 -- -- 30 -- EN Threshold Voltage Thermal Shutdown Temperature TSD Thermal Shutdown Hysteresis ΔTSD Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS9187C-00 June 2012 mV %/A V μA dB °C is a registered trademark of Richtek Technology Corporation. www.richtek.com 3 RT9187C Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θJA is measured at TA = 25°C on a low effective thermal conductivity single-layer test board per JEDEC 51-3. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. Quiescent, or ground current, is the difference between input and output currents. It is defined by IQ = IIN - IOUT under no load condition (IOUT = 0mA). The total current drawn from the supply is the sum of the load current plus the ground pin current. Note 6. Standby current is the input current drawn by a regulator when the output voltage is disabled by a shutdown signal (VEN <0.6V). Note 7. The dropout voltage is defined as VIN − VOUT, which is measured when VOUT is VOUT(NORMAL) − 100mV. Note 8. Regulation is measured at constant junction temperature by using a 2ms current pulse. Devices are tested for load regulation in the load range from 10mA to 0.5A. Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 4 is a registered trademark of Richtek Technology Corporation. DS9187C-00 June 2012 RT9187C Typical Operating Characteristics (COUT = 2.2μF/x5R, unless otherwise specified ) Dropout Voltage Voltagevs. vs.Load LoadCurrent Current Dropout Voltage (mV) 200 Current Limit VOUT = 2.8V VIN = 3.3V, VOUT = 2.8V 160 TJ = 25°C 120 80 TJ = 125°C IOUT (500mA/Div) TJ = −40°C 40 0 0.0 0.1 0.2 0.3 0.4 0.5 0.6 Time (1ms/Div) Load Current (A) Quiescent Currentvs. vs.Temperature Temperature Quiescent Current Reference Voltagevs. vs.Temperature Temperature Reference Voltage 0.84 400 Quiescent Current (μA) Reference Voltage (V) 0.83 0.82 0.81 0.80 0.79 0.78 0.77 350 300 250 200 150 VIN = 3.3V 100 0.76 -50 -25 0 25 50 75 100 -50 125 EN EN Threshold Threshold Voltage Voltagevs. vs.Temperature Temperature 0 25 50 75 100 125 EN Pin Shutdown Response 1.0 Threshold Voltage (V) -25 Temperature (°C) Temperature (°C) 0.9 Rising VEN (2V/Div) 0.8 Falling 0.7 VOUT (2V/Div) 0.6 VIN = 3.3V, VOUT = 2.8V, IOUT = 560mA 0.5 -50 -25 0 25 50 75 100 125 Time (500μs/Div) Temperature (°C) Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS9187C-00 June 2012 is a registered trademark of Richtek Technology Corporation. www.richtek.com 5 RT9187C Start Up Line Transient Response 4.3 VIN (V) 3.3 VEN (2V/Div) 10 VOUT (2V/Div) VOUT (mV) 0 -10 VIN = 3.3V to 4.3V, ILOAD : 300mA IOUT = 0mA Time (500μs/Div) Time (10μs/Div) PSRR PSRR Load Transient Response 0 IOUT (200mA/Div) PSRR (dB) -20 VOUT (50mV/Div) -40 ILOAD = 100mA -60 ILOAD = 56mA VIN = 5V, IOUT = 10mA to 0.3A VIN = VEN = 3.3V ± 50mV -80 Time (100μs/Div) 10 0.01 100 0.1 1000 1 10000 10 100000 100 Frequency (kHz) Region of Stable COUT ESR vs. Load Current Regionof ofStable Stable CCOUT ESR (Ω) (Ω) OUT ESR Region 100 VIN = 3.3V Unstable Range 10 1 Stable Range 0.1 0.01 0.001 0 0.1 0.2 0.3 0.4 0.5 Load Current (A) Copyright © 2012 Richtek Technology Corporation. All rights reserved. www.richtek.com 6 is a registered trademark of Richtek Technology Corporation. DS9187C-00 June 2012 RT9187C Applications Information Output Voltage Setting Thermal Considerations The voltage divider resistors can have values up to 100kΩ because of the very high impedance and low bias current of the sense comparator. The output voltage is set according to the following equation : For continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated by the following formula : Chip Enable Operation The RT9187C goes into sleep mode when the EN pin is in a logic low condition. In this condition, the pass transistor, error amplifier, and band gap are all turned off, reducing the supply current to 1μA (max.). The EN pin can be directly tied to VIN to keep the part on. CIN and COUT Selection Like any low dropout regulator, the external capacitors of the RT9187C must be carefully selected for regulator stability and performance. Using a capacitor of at least 2.2μF is suitable. The input capacitor must be located at a distance of not more than 0.5 inch from the input pin of the IC. Any good quality ceramic capacitor can be used. However, a capacitor with larger value and lower ESR (Equivalent Series Resistance) is recommended since it will provide better PSRR and line transient response. The RT9187C is designed specifically to work with low ESR ceramic output capacitor for space saving and performance consideration. Using a ceramic capacitor with value at least 2.2μF and ESR larger than 10mΩ on the RT9187C output ensures stability. Nevertheless, the RT9187C can still work well with other types of output capacitors due to its wide range of stable ESR. “Typical Operating Characteristics” shows the allowable ESR range as a function of load current for various output capacitance. Output capacitors with larger capacitance can reduce noise and improve load transient response, stability, and PSRR. The output capacitor should be located at a distance of not more than 0.5 inch from the output pin of the RT9187C. PD(MAX) = (TJ(MAX) − TA) / θJA where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and θJA is the junction to ambient thermal resistance. For recommended operating condition specifications, the maximum junction temperature is 125°C. The junction to ambient thermal resistance, θJA, is layout dependent. For SOT-23-5 packages, the thermal resistance, θJA, is 250°C/ W on a standard JEDEC 51-3 single-layer thermal test board. The maximum power dissipation at TA = 25°C can be calculated by the following formula : PD(MAX) = (125°C − 25°C) / (250°C/W) = 0.400W for SOT-23-5 package The maximum power dissipation depends on the operating ambient temperature for fixed T J(MAX) and thermal resistance, θJA. The derating curve in Figure 1 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. 0.45 Maximum Power Dissipation (W)1 VOUT = VREF × ⎛⎜ 1+ R1 ⎞⎟ ⎝ R2 ⎠ where VREF is the reference voltage with a typical value of 0.8V. When the ADJ short to VOUT, there must be a resistor (<100kΩ) from ADJ to GND. Single-Layer PCB 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0.00 0 25 50 75 100 125 Ambient Temperature (°C) Figure 1. Derating Curve of Maximum Power Dissipation Copyright © 2012 Richtek Technology Corporation. All rights reserved. DS9187C-00 June 2012 is a registered trademark of Richtek Technology Corporation. www.richtek.com 7 RT9187C Outline Dimension H D L B C b A A1 e Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 0.889 1.295 0.035 0.051 A1 0.000 0.152 0.000 0.006 B 1.397 1.803 0.055 0.071 b 0.356 0.559 0.014 0.022 C 2.591 2.997 0.102 0.118 D 2.692 3.099 0.106 0.122 e 0.838 1.041 0.033 0.041 H 0.080 0.254 0.003 0.010 L 0.300 0.610 0.012 0.024 SOT-23-5 Surface Mount Package Richtek Technology Corporation 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. www.richtek.com 8 DS9187C-00 June 2012