RT9396 I2C Interface PMIC with 6-Channel WLED Driver and 4-LDO General Description Features The RT9396 is a power management IC (PMIC) for backlighting and phone camera applications. The PMIC contains a 6-Channel charge pump white LED driver and four low dropout linear regulators. z Tri-Mode (x1/x1.5/x2) Charge Pump z Maximum 25mA x 6-Channel LED Backlighting Output Current Support Main/Sub (4+2/5+1) LED Function 64 Steps Programmable LED Current Support PWM Dimming Function Fade In/Out Via I2C Control 4 Low Dropout Regulators Maximum 200mA x 4-Channel LDO Output Current 16-Level LDO Output Voltage Setting I 2C Programmable Independent LDO Channel ON/OFF Control Over Temperature Protection Thin 24-Lead WQFN Package RoHS Compliant and Halogen Free is used for backlight brightness control. Users can easily configure up to 64 steps of LED current via the I2C interface z z z z z z z z z z control. The RT9396 also comprises low noise, low dropout regulators, which provide up to 200mA of current for each of the four channels. The four LDOs deliver 3% output accuracy and low dropout voltage of 200mV @ 200mA. Users can easily configure LDO output voltage via the I2C interface control. The LDOs also provide current limiting and over temperature functions. Applications z z Cellular Phones PDAs and Smart Phones Pin Configurations (TOP VIEW) VOUT LED1 LED2 LED3 LED4 LED5 LED6 The charge pump drives up to 6 white LEDs with regulated constant current for uniform intensity. Each channel (LED1 to LED6) supports up to 25mA of current. These 6-Channels can be also programmed as 4 plus 2-Channels or 5 plus 1-Channel with different current setting for auxiliary LED application. The RT9396 maintains highest efficiency by utilizing a x1/ x1.5/ x2 fractional charge pump and low dropout current regulators. An internal 6-bit DAC z The RT9396 is available in a WQFN-24L 3x3 package. 24 23 22 21 20 19 18 RT9396 Package Type QW : WQFN-24L 3x3 (COL) (W-Type) Lead Plating System G : Green (Halogen Free and Pb Free) Note : 6 1 17 2 16 3 15 4 14 5 13 7 8 SCL SDA EN PWM CF 9 10 11 12 AGND VIN LDOIN LDO4 LDO3 LDO2 LDO1 Ordering Information PGND C2N C1N C1P C2P WQFN-24L 3x3 (COL) Richtek products are : RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. Suitable for use in SnPb or Pb-free soldering processes. DS9396-01 April 2011 www.richtek.com 1 RT9396 Marking Information JP= : Product Code JP=YM DNN YMDNN : Date Code Typical Application Circuit CFLY1 1µF 4 C1P VBAT CFLY2 1µF 3 5 2 C1N C2P C2N 7 VIN CIN1 2.2µF 8 LDOIN RT9396 CIN2 2.2µF Chip Enable 2 I C PWM WLED LED1 23 LED2 22 LED3 21 LED4 20 LED5 19 LED6 18 VOUT 24 13 CF CF 1µF 15 EN LDO1 12 LDO2 11 17 SCL 16 SDA CL1 CL2 LDO3 10 LDO4 9 14 PWM AGND 6 CL3 CL4 PGND 1 COUT 1µF 1µF 1µF 1µF 1µF Timing Diagram 2 I C Reg. Addr. 2 I C Reg. Data 010 LED<1:6> On/Off 00000000 Main BL Current Level 00000000 Internal PWMEN Reg. 01011111 6CH PWM Mode 01111101 Fade in/out time = 8ms/step, ILED[1~6] = 62/64 x 25mA PWM control Backlight PWM Dimming TSHD = 16ms Note: PWM signal rise after PWM Pin internal PWMEN is enabled THi > 0.5µs 0.5µs < TLO < 500µs Main ILED[1:6] ILED[1~6] Current = 62/64 x 25mA x PWM Duty Fade in time 0 Time (s) Figure 1. Timing Diagram www.richtek.com 2 DS9396-01 April 2011 RT9396 LDO Address 1 0 1 0 0 0 0 0 16-step Voltage Setting ON/OFF 1 B4 B3 B2 B1 B0 0 0 0 0 C3 C2 C1 C0 Stop LDO1 0 LDO2 1 LDO4 Start Channel Selection LDO3 • I2C Writing Cycles of LDOX • I2C Writing Cycles of Backlighting I (LED1~6) Backlight Address 1 0 0 0 0 0 1 Fade In/Out Setting 0 x B4 x B3 x B2 x B1 x B0 LED1~3 BLON 0 LED4 1 LED5 0 LED6 1 PWMEN Start Channel ON/OFF 64-step Current Setting C7 C6 C5 C4 C3 C2 C1 C0 Stop Fade In/Out Setting: 01: Every Step of Fade In/Out = 8 ms 10: Every Step of Fade In/Out = 16 ms 11: Every Step of Fade In/Out = 32 ms • I2C Writing Cycles of Backlighting II (Main: LED1~5, Sub: LED6) Backlight Address Main 0 1 0 0 0 0 0 1 1 x 0 x B3 x B2 x B1 x B0 Backlight Address Sub 1 0 1 0 1 0 0 0 0 0 1 1 x 1 x Channel ON/OFF 0 x 0 x 0 x B0 LED6 Sub ON Start LED1~3 Main ON 1 LED4 0 LED5 1 PWMEN Start Channel ON/OFF Fade In/Out Setting Main 64-step Current Setting C7 C6 C5 C4 C3 C2 C1 C0 Stop Main Fade In/Out Setting: 01: Every Step of Fade In/Out = 8 ms 10: Every Step of Fade In/Out = 16 ms 11: Every Step of Fade In/Out = 32 ms Fade In/Out Setting Sub 64-step Current Setting C7 C6 C5 C4 C3 C2 C1 C0 Stop Sub Fade In/Out Setting: 01: Every Step of Fade In/Out = 8 ms 10: Every Step of Fade In/Out = 16 ms 11: Every Step of Fade In/Out = 32 ms • I2C Writing Cycles of Backlighting III (Main: LED1~4, Sub: LED5~6) Backlight Address Main 1 0 1 0 0 0 1 0 0 x 0 x B2 x 0 x B1 x B0 Backlight Address Sub 1 0 1 0 1 0 0 0 1 0 0 x 1 x Channel ON/OFF 0 x 0 x 0 x B0 LED5~6 Sub ON Start LED1~3 Main ON 0 LED4 1 PWMEN Start Channel ON/OFF Fade In/Out Setting Main 64-step Current Setting C7 C6 C5 C4 C3 C2 C1 C0 Stop Main Fade In/Out Setting: 01: Every Step of Fade In/Out = 8 ms 10: Every Step of Fade In/Out = 16 ms 11: Every Step of Fade In/Out = 32 ms Fade In/Out Sub 64-step Current Setting Setting C7 C6 C5 C4 C3 C2 C1 C0 Stop Sub Fade In/Out Setting: 01: Every Step of Fade In/Out = 8 ms 10: Every Step of Fade In/Out = 16 ms 11: Every Step of Fade In/Out = 32 ms Figure 2. Control Sequences of LDO Setting and LED Dimming DS9396-01 April 2011 www.richtek.com 3 RT9396 Functional Pin Description Pin No. 1 2 Pin Name PGND C2N Charge Pump Ground. Fly Capacitor 2 Negative Connection. 3 4 C1N C1P Fly Capacitor 1 Negative Connection. Fly Capacitor 1 Positive Connection. 5 6 7 C2P AGND VIN Fly Capacitor 2 Positive Connection. Ground for LDO1 to LDO4. Charge Pump Power Input. Connect this pin to LDOIN pin. 8 9 10 LDOIN LDO4 LDO3 LDO Power Input. Connect this pin to VIN pin. LDO4 Output. LDO3 Output. 11 12 LDO2 LDO1 LDO2 Output. LDO1 Output. 13 14 CF PWM PWM Filter Capacitor Connection. PWM Dimming Control Input. 15 EN Chip Enable (Active High). 16 SDA I C Data Input. 17 SCL I C Clock Input. 18 19 LED6 LED5 Current Sink for LED6. Current Sink for LED5. 20 21 22 LED4 LED3 LED2 Current Sink for LED4. Current Sink for LED3. Current Sink for LED2. 23 24 LED1 VOUT Current Sink for LED1. Charge Pump Output. Connect a 1μF ceramic capacitor between VOUT and GND. www.richtek.com 4 Pin Function 2 2 DS9396-01 April 2011 RT9396 C2N C2P C1N C1P Function Block Diagram x1/x1.5/x2 Charge Pump VIN 1MHz Oscillator OVP Gate Driver Mode Decision Soft Start PWM Dimming CF VOUT LED1 LED2 LED3 LED4 LED5 LED6 Current Setting Shutdown Delay PWM Current Source SDA SCL LED Ctrl. OR Gate 2 LDO Ctrl. I C EN OTP & Current Bias VOUT LDOIN POR LDOIN BandGap Reference + LDO1 to LDO4 AGND RES Divider Voltage Setting PGND x4 Table 1. 16-Step LDO Output Voltage Setting LDO1 & LDO3 & LDO4 LDO2 Output Output Voltage (V) Voltage (V) C3 C2 C1 C0 0 0 0 0 1 0 0 0 1 0 0 1 0 0 0 LDO1 & LDO3 & LDO4 LDO2 Output Output Voltage (V) Voltage (V) C3 C2 C1 C0 1.1 1 0 0 0 2.5 2.2 1.1 1.2 1 0 0 1 2.6 2.3 0 1.2 1.4 1 0 1 0 2.7 2.4 1 1 1.3 1.7 1 0 1 1 2.8 2.5 1 0 0 1.5 1.8 1 1 0 0 2.9 2.8 0 1 0 1 1.6 1.9 1 1 0 1 3 2.85 0 1 1 0 1.8 2 1 1 1 0 3.1 3.2 0 1 1 1 2.1 2.1 1 1 1 1 3.3 3.3 DS9396-01 April 2011 www.richtek.com 5 RT9396 Table 2. 64-Step WLED Current Setting WLED C0 C5 C4 C3 Current (mA) 0 0.39 1 0 0 C2 C1 C0 WLED Current (mA) 0 0 0 12.89 0 0 0 1 13.28 0 0 0 1 1 14.06 0 0 1 0 0 14.45 1 0 0 1 0 1 14.84 2.34 1 0 0 1 1 0 15.23 0 2.73 1 0 0 1 1 1 15.63 1 3.13 1 0 1 0 0 0 16.02 0 0 3.52 1 0 1 0 0 1 16.41 0 0 1 3.91 1 0 1 0 1 0 16.8 1 0 1 0 4.3 1 0 1 0 1 1 17.19 0 1 0 1 1 4.69 1 0 1 1 0 0 17.58 0 0 1 1 0 0 5.08 1 0 1 1 0 1 17.97 0 0 1 1 0 1 5.47 1 0 1 1 1 0 18.36 0 0 1 1 1 0 5.86 1 0 1 1 1 1 18.75 0 0 1 1 1 1 6.25 1 1 0 0 0 0 19.14 0 1 0 0 0 0 6.64 1 1 0 0 0 1 19.53 0 1 0 0 0 1 7.03 1 1 0 0 1 0 19.92 0 1 0 0 1 0 7.42 1 1 0 0 1 1 20.31 0 1 0 0 1 1 7.81 1 1 0 1 0 0 20.7 0 1 0 1 0 0 8.2 1 1 0 1 0 1 21.09 0 1 0 1 0 1 8.59 1 1 0 1 1 0 21.48 0 1 0 1 1 0 8.98 1 1 0 1 1 1 21.88 0 1 0 1 1 1 9.38 1 1 1 0 0 0 22.27 0 1 1 0 0 0 9.77 1 1 1 0 0 1 22.66 0 1 1 0 0 1 10.16 1 1 1 0 1 0 23.05 0 1 1 0 1 0 10.55 1 1 1 0 1 1 23.44 0 1 1 0 1 1 10.94 1 1 1 1 0 0 23.83 0 1 1 1 0 0 11.33 1 1 1 1 0 1 24.22 0 1 1 1 0 1 11.72 1 1 1 1 1 0 24.61 0 1 1 1 1 0 12.11 1 1 1 1 1 1 25 0 1 1 1 1 1 12.5 C5 C4 C3 C2 C1 0 0 0 0 0 0 0 0 0 0 1 0.78 1 0 0 0 0 0 1 0 1.17 1 0 0 0 0 1 1 1.56 1 0 0 0 1 0 0 1.95 0 0 0 1 0 1 0 0 0 1 1 0 0 0 1 1 0 0 1 0 0 0 1 0 0 0 www.richtek.com 6 DS9396-01 April 2011 RT9396 Absolute Maximum Ratings z z z z z z z z z (Note 1) Supply Input Voltage, VIN ---------------------------------------------------------------------------------------------- −0.3V to 6V Output Voltage, VOUT ----------------------------------------------------------------------------------------------------------------------------------------------- −6V to 0.3V Other Pins ----------------------------------------------------------------------------------------------------------------- −0.3V to 6V Power Dissipation, PD @ TA = 25°C WQFN-24L 3x3 ----------------------------------------------------------------------------------------------------------- 1.667W Package Thermal Resistance (Note 2) WQFN-24L 3x3, θJA ----------------------------------------------------------------------------------------------------- 60°C/W Junction Temperature --------------------------------------------------------------------------------------------------- 150°C Lead Temperature (Soldering, 10 sec.) ----------------------------------------------------------------------------- 260°C Storage Temperature Range ------------------------------------------------------------------------------------------- −65°C to 150°C ESD Susceptibility (Note 3) HBM (Human Body Mode) --------------------------------------------------------------------------------------------- 2kV MM (Machine Mode) ---------------------------------------------------------------------------------------------------- 200V Recommended Operating Conditions z z z (Note 4) Supply Input Voltage, VIN, VLDOIN ------------------------------------------------------------------------------------ 2.8V to 5V Junction Temperature Range ------------------------------------------------------------------------------------------ −40°C to 125°C Ambient Temperature Range ------------------------------------------------------------------------------------------ −40°C to 85°C Electrical Characteristics (VIN = VLDOIN = 3.6V, CIN = 2.2μF, COUT = 1μF, CFLY1 = CFLY2 = 1μF, VF = 3.5V, ILEDx = 25mA, TA = 25°C, unless otherwise specification) Parameter Symbol Test Conditions Min Typ Max Unit 1.8 2.1 2.5 V -- 200 -- mV -- 1 2 mA -- 3.5 5 mA -- 0.5 1 μA Backlight ILEDx Accuracy −5 0 5 % Backlight Current Matching −3 0 3 % Dropout Voltage -- 70 -- mV -- 1000 -- kHz Input Power Supply Under-Voltage Lockout Threshold VUVLO VIN Rising. Under-Voltage Lockout Hysteresis ΔVUVLO Quiescent of x1 Mode IQ_x1 Quiescent of x2 Mode IQ_x2 x1 Mode, VIN = 5V, No Load, LDO[1:4] OFF x2 Mode, VIN = 3.5V, No Load, LDO[1:4] OFF Shutdown Current ISHDN VIN = 5V, VEN = 0V Charge Pump WLED Driver Charge Pump Oscillator Frequency x1 Mode to x1.5 Mode Transition Voltage (VIN falling) Vf = 3.5V, IOUT = 150mA -- 3.6 3.75 V Mode Transition Hysteresis Vf = 3.5V, IOUT = 150mA -- 250 -- mV Over Voltage Protection VIN = 4.5V 5.2 5.5 5.8 V To be continued DS9396-01 April 2011 www.richtek.com 7 RT9396 Parameter Symbol Test Conditions Min Typ Max Unit 2.8 -- 5 V -- -- 200 mV By I C Setting 1.1 -- 3.3 V IOUT = 1mA −3 3 % LDO1 to LDO4 Input Voltage VIN = 2.8V to 5V Dropout Voltage VIN ≥ 2.8V, IOUT = 200mA 2 Output voltage Range VOUT Accuracy Line Regulation Load Regulation Current Limit Quiescent Current Shutdown Current Thermal Shutdown Thermal Shutdown Hysteresis 2 I C interface I LIM IQ I SHDN T SD ΔTSD EN, SDA,SCL Pull Low Current Logic-High EN, SDA, SCL Threshold Voltage Logic-Low SDA Output Low Voltage I EN VIH VIL VCL VIN = (VOUT + 0.3V) to 5V or VIN > 2.5V, whichever is larger 1mA < IOUT < 200mA RLOAD = 1Ω 4-Channel All Turn On -- -- 0.2 %/V -230 ----- -350 140 -160 20 0.6 600 200 1 --- % mA μA μA °C °C -1.4 --- 5 ---- 10 -0.4 0.4 μA V V V SCL Clock Frequency f SCL -- -- 400 kHz SCL Clock Low Period t Low 1.3 -- -- μs SCL Clock High Period t High 0.6 -- -- μs Hold Time START Condition t HD_STR 0.6 -- -- μs Setup Time for Repeat START t SU_STR 0.6 -- -- μs SDA Data Setup Time t SU_DAT 100 -- -- ns SDA Data HOLD Time t HD_DAT 0.05 -- 0.9 μs Setup Time for STOP Condition t SU_STO 0.6 -- -- μs t BUF 1.3 -- -- μs PWM Dimming Frequency 1 -- 200 kHz PWM Dimming High Time 0.5 -- -- μs PWM Dimming Low Time 0.5 -- 500 μs Shutdown Delay 16 -- -- ms Bus Free Time Between STOP and START Condition PWM Dimming Control Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. θJA is measured in the natural convection at TA = 25°C on a high effective thermal conductivity four-layer test board of JEDEC 51-7 thermal measurement standard. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. www.richtek.com 8 DS9396-01 April 2011 RT9396 Typical Operating Characteristics For Charge Pump Efficiency vs. Input Voltage LED Current vs. Input Voltage 100 90 LED Current (mA) Efficiency (%) 80 70 60 50 40 30 20 10 Vf = 3.5V, ILEDx = 25mA 0 2.5 3 3.5 4 4.5 5 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 LED1 LED2 LED3 LED4 LED5 LED6 Vf = 3.5V 2.5 5.5 3 Input Voltage (V) 3.5 4 4.5 5 5.5 Input Voltage (V) x2 Mode Quiescent Current vs. Input Voltage x1 Mode Quiescent Current vs. Input Voltage 6.0 3.0 Quiesent Current (mA) Quiesent Current (mA) 5.5 2.5 2.0 1.5 1.0 0.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0.0 2.5 3 3.5 4 4.5 5 3 3.5 4 4.5 5 Input Voltage (V) Input Voltage (V) Shutdown Current vs. Input Voltage x2 Mode Inrush Current Response 0.650 Shutdown Current (μA) 2.5 5.5 5.5 VOUT (1V/Div) 0.625 0.600 C1P (2V/Div) 0.575 IIN (500mA/Div) VIN = 2.8V, Vf = 3.5V, ILEDx = 25mA 0.550 2.5 3 3.5 4 4.5 5 5.5 Time (100μs/Div) Input Voltage (V) DS9396-01 April 2011 www.richtek.com 9 RT9396 Ripple & Spike x1.5 Mode Inrush Current Response VOUT (20mV/Div) VOUT (1V/Div) VIN (20mV/Div) C1P (2V/Div) IIN (200mA/Div) VC1P (2V/Div) VIN = 3V, Vf = 3.5V, ILEDx = 25mA Time (100μs/Div) www.richtek.com 10 VIN = 3.35V, Vf = 3.5V, ILEDx = 25mA Time (500ns/Div) DS9396-01 April 2011 RT9396 For LDO Output Voltage vs. Temperature Dropout Voltage vs. Load Current 3.34 250 Dropout Voltage (V) Output Voltage (V) 3.33 3.32 LDO2 LDO3 LDO1 LDO4 3.31 3.30 3.29 VIN = 4.3V, VLDO = 3.3V 3.28 -50 -25 0 25 50 75 100 200 150 LDO1 LDO3 LDO4 LDO2 100 50 0 125 0 50 100 150 200 Temperature (°C) Load Current (mA) Power On Power On SCL (5V/Div) SCL (5V/Div) VLDO1 (2V/Div) VLDO3 (2V/Div) VLDO2 (2V/Div) VLDO4 (2V/Div) IIN (500mA/Div) IIN (500mA/Div) VIN = 4.3V, VLDO1 = VLDO2 = 3.3V, ILOAD = 200mA VIN = 4.3V, VLDO3 = VLDO4 = 3.3V, ILOAD = 200mA Time (25μs/Div) Time (25μs/Div) Line Transient Response Line Transient Response VIN 4.8 (V) VIN 4.8 (V) VLDO2 (20mV/Div) VLDO4 (20mV/Div) VLDO1 (20mV/Div) VLDO3 (20mV/Div) 3.8 3.8 VIN = 3.8V to 4.8V VLDO1 = VLDO2 = 2.8V, ILOAD = 200mA Time (100μs/Div) DS9396-01 April 2011 250 VIN = 3.8V to 4.8V VLDO3 = VLDO4 = 2.8V, ILOAD = 200mA Time (100μs/Div) www.richtek.com 11 RT9396 Load Transient Response Load Transient Response VLDO1 (100mV/Div) VLDO3 (100mV/Div) I LDO1 (200mA/Div) I LDO3 (200mA/Div) VLDO2 (100mV/Div) VLDO4 (100mV/Div) I LDO2 (200mA/Div) I LDO4 (200mA/Div) VIN = 4.3V, VLDO1 = VLDO2 = 3.3V 20 VIN = 4.3V, VLDO3 = VLDO4 = 3.3V Time (10μs/Div) Time (10μs/Div) PSRR Noise 10 0 PSRR (dBm) -10 -20 -30 (0.2mV/Div) -40 -50 -60 -70 -80 -90 VIN = 4.3V, VLDO = 3.3V, ILOAD = 200mA -100 10 100 1000 10000 100000 1000000 VIN = 4.3V, VLDO = 3.3V, No Load Time (50ms/Div) Frequency (Hz) Noise (0.2mV/Div) VIN = 4.3V, VLDO = 3.3V, ILOAD = 50mA Time (50ms/Div) www.richtek.com 12 DS9396-01 April 2011 RT9396 Applications Information The RT9396 is an I2C interface PMIC with one 6-Channel charge pump white LED driver and four LDOs. The charge pump provides 6-Channel low dropout voltage current source to regulate up to 6 white LEDs. For high efficiency, the RT9396 implements a smart mode transition for charge pump operation. The four LDOs are capable of delivering low dropout voltage of 200mV @ 200mA with 3% output accuracy. The I2C dimming function allows for a 64 steps LED brightness control and 16 steps LDO voltage control. Input UVLO An under voltage lockout (UVLO) function is provided to prevent unstable occurrences during start-up. The UVLO threshold is set at an input rising voltage of 2.1V typically with a hysteresis of 0.2V. The input operating voltage range of the RT9396 is from 2.8V to 5V. An input capacitor should be placed near the VIN pin to reduce ripple voltage. It is recommended to use a ceramic 2.2μF or larger capacitance as the input capacitor. Soft-Start The RT9396 includes a soft-start circuit to limit the inrush current at power on and mode switching. The soft-start circuit limits the input current before the output voltage reaches a desired voltage level. Mode Decision The RT9396 uses a smart mode decision method to choose the working mode for maximum efficiency. The charge pump can operate at x1, x1.5 or x2 mode. The mode decision circuit senses the output voltage and LED voltage to determine the optimum working mode. Power Sequence In order to assure normal operating condition, the input voltage and EN should be active before the RT9396 receives the I2C signal, as shown in Figure 3. The RT9396 can be shut down by pulling EN low. When EN is reset, the I2C signal also needs to be re-applied to resume normal operating condition. DS9396-01 April 2011 EN SDA …………… SCL …………… Figure 3. The Power Sequence I2C Compatible Interface Figure 4 shows the timing diagram of the I2C interface. The RT9396 communicates with a host (master) using the standard I2C 2-wire interface. The two bus lines of SCL and SDA must be pulled high when the bus is not in use. Internal pull-up resistors are installed. After the START condition, the I2C master sends 8-bits data, consisting of seven address bits and a following data direction bit (R/ W). The RT9396 address is 1010100 (54h) and is a receiveonly (slave) device. The second word selects the register to which the data will be written. The third word contains data to write to the selected register. Figure 2 shows the writing information for voltage of the four LDOs and current of the six LEDs. In the second word, the sub-address of the four LDOs is “001” and the sub-address of the LED Driver for different dimming modes are respectively “010”, “011” and “100”. For the LDO output voltage setting, bits B1 to B4 represent each LDO channel respectively where a “1” indicates selected and a “0” means not selected. The B0 bit controls on/off (1/ 0) mode for the selected LDO channel(s). Then, in the third word, bits C0 to C3 control a 16-step setting of LDO1 to LDO4. The voltage values are listed in Table 1. For LED dimming, there are three operating modes (Backlight I, Backlight II and Backlight III) to select from by writing respectively “010”, “011” and “100” into the first three bits of the second word. When Backlight I is selected, all six LEDs have the same behavior. Their 64step dimming currents are set by bits C0 to C5, which are listed in Table 2. The bits C6 and C7 determine the fade in/out time of each step as shown in Figure 2. For Backlight II and Backlight III, two sets of LEDs, called main and Sub, can work separately and turn on solely. It should be noticed that no matter which mode is selected, the B0 bit must be a “1” in order for te LEDs in the main set to be turned on. www.richtek.com 13 RT9396 In Backlight II, the main set consists of LED1 to LED5 and LED6 is the Sub set. In Backlight III, the main set consists of LED1 to LED4, while the Sub set comprises of LED5 and LED6. The RT9396 has another dimming function called PWM dimming, which can be enabled by selecting the B4 bit in Backlight I, B3 bit in Backlight II, The 2nd Word (Sub Address, Data) The 1st Word (Chip Address, R/W) I2C Address Start SCL SDA and B2 bit in Backlight III. Once the function is enabled, a PWM signal is applied to the PWM pin to perform PWM dimming. The LED current value is the current value set by C0 to C5 multiplied by the duty cycle. It is important to note that the PWM dimming function applies only to the main set. The 3rd Word (data) Channel Sub Adress selection ON/OFF Test Mode R/W A6 A5 A4 A3 A2 A1 A0 0 B7 B6 B5 B4 B3 B2 B1 B0 Data II C7C6C5C4C3 C2C1C0 Stop S P 1 0 2 3 4 5 6 7 A6 A5 A4 A3 A2 A1 A0 8 9 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 0 ACK B7 B6 B5 B4 B3 B2 B1 B0 ACK C7 C6 C5 C4 C3 C2 C1 C0 ACK S = Start Condition W = Write (SDA =“0＂) R = Read (SDA =“1＂) ACK = Acknowledge P = Stop Condition Figure 4. I2C Communication Sequence Flying Capacitors Selection To attain better performance of the RT9396, the selection of peripherally appropriate capacitor and value is very important. These capacitors determine some parameters such as input/output ripple voltage, power efficiency and maximum supply current by charge pump. To reduce the input and output ripple effectively, low ESR ceramic capacitors are recommended. For LED driver applications, the input voltage ripple is more important than the output voltage ripple. The input ripple is influenced by the input capacitor, CIN. Increasing the input capacitance can further reduce the ripple. The flying capacitors ,CFLY1 and CFLY2 determine the supply current capability of the charge pump, which in turn influences the overall efficiency of the system. A lower capacitance will improve efficiency, but it will limit the LED's current at low input voltage. For a 6 x 25mA load over the entire input voltage range of 2.8V to 5V, it is recommended to use a 1μF ceramic capacitor for CFLY1, CFLY2 and COUT. LDO Capacitor Selection Like for any low dropout regulator, the external capacitors used for the RT9396 must be carefully selected for regulator stability and performance. A capacitor with www.richtek.com 14 capacitance larger than 1μF is placed close to the RT9396 supply input to reduce ripple. The value of this capacitor can be increased without limit. The input capacitor must be located at a distance of not more than 0.5 inch away from the input pin of the IC and tied to a clean analog ground. Any good quality ceramic or tantalum capacitor can meet the requirement. The capacitor with larger value and lower ESR (equivalent series resistance) provides better PSRR power supply rejection ratio and line-transient response. The output capacitor must meet minimum requirement for both capacitance and ESR in all LDO's applications. For stability consideration, a ceramic capacitor with minimum capacitance of 1μF and minimum ESR of 20mΩ is recommended for the output capacitor. For space-saving and performance consideration, the RT9396 is designed to work with ceramic capacitor of low ESR. However, because of it's wide ESR range tolerance, the RT9396 can work stably with output capacitor of other types as well. Figure 5 shows the stable region for various load current and output capacitor conditions. Large output capacitance can reduce noise and improve load transient response, stability, and PSRR. The capacitor must be located at a distance not more than 0.5 inch away from the VOUT pin and tied to a clean analog ground. DS9396-01 April 2011 RT9396 Region of Stable COUT ESR vs. Load Current VIN = 5V CIN = COUT1 = COUT2 = 1uF/X7R 10 Unstable Range 1 Stable Range 0.1 0.01 Simulation Verify 2.00 Maximum Power Dissipation (W) Region ESR (Ω) (Ω) OUT ESR RegionofofStable StableCCOUT 100 Four- Layer PCB 1.75 1.50 1.25 1.00 0.75 0.50 0.25 0.00 0.001 0 0 50 100 150 200 250 300 Load Current (mA) Figure 5. Stable COUT ESR Range 25 50 75 100 125 Ambient Temperature (°C) Figure 6. Derating Curve for RT9396 Package Thermal Considerations Layout Considerations For continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, rate of surrounding airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following the formula : The RT9396 is a high-frequency switched-capacitor converter. For best performance, careful PCB layout is necessary. Place all peripheral components as close as possible to the IC. Place CIN1, CIN2, COUT, CL1, CL2, CL3, PD(MAX) = (TJ(MAX) − TA ) / θJA Where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature and θJA is the junction to ambient thermal resistance. For recommended operating conditions specification of the RT9396, the maximum junction temperature is 125°C and TA is the ambient temperature. The junction to ambient thermal resistance θ JA is layout dependent. For WQFN-24L 3x3 package, the thermal resistance θJA is 60°C/W on the standard JEDEC 51-7 four-layer thermal test board. The maximum power dissipation at TA = 25°C can be calculated by the following formula : PD(MAX) = (125°C − 25°C) / (60°C/W) = 1.667W for WQFN-24L 3x3 package The maximum power dissipation depends on operating ambient temperature for fixed T J(MAX) and thermal resistance θJA. For RT9396 package, the derating curve in Figure 6 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation allowed. DS9396-01 April 2011 CL4, CFLY1, and CFLY2 near to VIN, LDOIN, VOUT, LDO1, LDO2, LDO3, LDO4, C1P, C1N, C2P, C2N, and GND pin respectively. A short connection is highly recommended. The following guidelines should be strictly followed when designing a PCB layout for the RT9396. The exposed GND pad must be soldered to a large ground plane for heat sinking and noise prevention. The through-hole vias located at the exposed pad is connected to the ground plane of internal layer. VIN traces should be wide enough to minimize inductance and handle high currents. The trace running from the battery to the IC should be placed carefully and shielded strictly. Input and output capacitors must be placed close to the IC. The connection between pins and capacitor pads should be copper traces without any through-hole via connection. The flying capacitors must be placed close to the IC. The traces running from the pins to the capacitor pads should be as wide as possible. Long traces will also produce large noise radiation caused by the large dv/dt on these pins. Short trace is recommended. www.richtek.com 15 RT9396 All the traces of LEDs and VIN running from pins to LCM module should be shielded and isolated by the ground plane. The shielding prevents the interference of high frequency noise coupled from the charge pump. Output capacitor must be placed between GND and VOUT to reduce noise coupling from charge pump to LEDs. GND VOUT LED1 LED2 LED3 LED4 LED5 LED6 GND The flying capacitors must be placed close to the IC. 24 23 22 21 20 19 18 PGND C2N C1N C1P C2P VIN traces should be wide enough. 16 3 15 4 14 13 7 8 SCL SDA EN PWM CF 9 10 11 12 AGND VIN LDOIN LDO4 LDO3 LDO2 LDO1 GND 17 2 5 6 Battery 1 GND Input capacitors must be placed close to the IC. Figure 7. PCB Layout Guide www.richtek.com 16 DS9396-01 April 2011 RT9396 Outline Dimension Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.150 0.250 0.006 0.010 D 2.900 3.100 0.114 0.122 E 2.900 3.100 0.114 0.122 e 0.400 0.016 L 0.350 0.450 0.014 0.018 L1 0.950 1.050 0.037 0.041 W-Type 24L QFN 3x3 (COL) Package Richtek Technology Corporation Richtek Technology Corporation Headquarter Taipei Office (Marketing) 5F, No. 20, Taiyuen Street, Chupei City 5F, No. 95, Minchiuan Road, Hsintien City Hsinchu, Taiwan, R.O.C. Taipei County, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Tel: (8862)86672399 Fax: (8862)86672377 Email: [email protected] Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek. DS9396-01 April 2011 www.richtek.com 17