RT9823 Smart Multi-Voltage Detector General Description Features The RT9823 is an integrated smart multi voltage detector supervising two power supply voltage levels including 5V, and another voltage (such as 3.3V or 12V) , which can be set via an external resistive voltage divider. z Capable of Monitoring Two Inputs Precisely z VCC Connect to 5V or 3.3V Standby Power Detection Threshold Voltages ` V5 : 5V x 80% ` VADJ : 1V (Using Resistor Divider) Accuracy : ±2% CTR (Open Drain Output Active Low) Built-in Recovery Delay 300ms Manual CTR (MR) Function SOT-23-6 Package RoHS Compliant and Halogen Free z z z z z Applications z z z Package Type E : SOT-23-6 Lead Plating System G : Green (Halogen Free and Pb Free) (TOP VIEW) VADJ RT9823 Pin Configurations 6 5 4 2 3 MR Ordering Information V5 The RT9823 is available in a SOT-23-6 package. LCD TV or Monitors Consumer Electronic Products System Voltage Detector GND MR (Manual Reset) controls the CTR signal when the two monitored power supply voltages are at normal voltage levels. When the MR signal is in logic high, the CTR signal will be pulled low immediately. z VCC The RT9823 performs supervisory function by sending out a CTR signal whenever the monitored voltages fall below 80% of the voltage levels. The CTR signal will last the whole period before VCC recovers. Once the supervising voltages are recovered to higher than 80% of the voltage levels, the CTR signal will be released after a 300ms delay time. z Richtek products are : ` RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. ` Suitable for use in SnPb or Pb-free soldering processes. CTR Note : SOT-23-6 Marking Information ES= : Product Code ES=DNN DNN : Date Code DS9823-02 June 2011 www.richtek.com 1 RT9823 Typical Application Circuit VDD RT9823 6 VCC 3.3V or 5V R1 12V 4 VADJ CTR 100k Pull Up 1 µP RESET R2 Manual Reset 3 MR GND 2 5 V5 5V Functional Pin Description Pin No. Pin Name Pin Function Reset Output (Open Drain, Active-Low) . When VCC > POR, V5 > 80%, and VADJ > 1V, CTR will delay 300ms and become high. Once V5 or VADJ is < 80%, the signal will become low. When MR is high, CTR will become low. 1 CTR 2 GND 3 MR 4 VADJ 5 V5 5V Voltage Detection Input. The detection threshold is 5V x 80%. 6 VCC Supply Input. Connect this pin to standby power from system. Ground. Manual Reset Input. Manual reset with internal pull high resister (1MΩ) , H : CTR = Low; L : CTR signal is dependent on voltage detector output. Voltage Detection Input. Connect 12V or other power with external resistive voltage divider to this pin. The VADJ logic-high threshold voltage is 1V. Function Block Diagram VCC VREF Voltage Regulator POR VADJ Voltage Detector (VTH = 1V) V5 Voltage Detector (VTH = 5V x 80%) CTR Delay 300ms GND MR www.richtek.com 2 DS9823-02 June 2011 RT9823 Absolute Maximum Ratings (Note 1) VCC, MR, CTR, V5, VADJ ----------------------------------------------------------------------------------------------- −0.3V to 6.5V Power Dissipation, PD @ TA = 25°C SOT-23-6 --------------------------------------------------------------------------------------------------------------------- 0.4W z Package Thermal Resistance (Note 2) SOT-23-6, θJA --------------------------------------------------------------------------------------------------------------- 250°C/W SOT-23-6, θJC -------------------------------------------------------------------------------------------------------------- 135°C/W z Junction Temperature ----------------------------------------------------------------------------------------------------- 150°C z Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------- 260°C z Storage Temperature Range --------------------------------------------------------------------------------------------- −65°C to 150°C z ESD Susceptibility (Note 3) HBM (Human Body Mode) ----------------------------------------------------------------------------------------------- 2kV MM (Machine Mode) ------------------------------------------------------------------------------------------------------ 200V z z Recommended Operating Conditions z (Note 4) Junction Temperature Range ------------------------------------------------------------------------------------------- −40°C to 125°C Electrical Characteristics (VCC = 5V, TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Without load Min Typ Max Unit -- -- 200 μA 2.97 5 5.94 V VCC Supply Current IVCC VCC Operating Voltage VCC VCC POR Rising VPOR -- 2.8 -- V VCC POR Hysteresis VPOR_Hys -- 0.15 -- V Voltage Detector & MUTE Threshold V5 High Threshold Voltage VV5_TH 3.92 4 4.08 V VADJ High Threshold Voltage VVADJ_TH 0.98 1 1.02 V 2 -- -- V -- -- 0.8 V 200 300 -- ms -- 20 -- μs -- -- 0.3 V Manual Reset Input Logic-High VIH Threshold Voltage Logic-Low VIL Voltage Detector Deglitch and Delay Voltage Detectors Delay Time tDELAY Voltage Detectors Deglitch Time tDEGLITCH Output : Open Drain CTR Output Low Voltage VOL_CTR VCC = 3.3V, 5mA sinking current at CTR output Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device is reliability. Note 2. θJA is measured in natural convection at TA = 25°C on a low-effective thermal conductivity test board of JEDEC 51-3 thermal measurement standard. The measurement case position of θJC is on the lead of the package. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. DS9823-02 June 2011 www.richtek.com 3 RT9823 Typical Operating Characteristics V5 Detector Deglitch Time vs. Temperature V5 Detector Delay Time vs. Temperature 40 425 400 375 350 325 300 VCC = 3.3V 275 VCC = 5V V5 Detector Deglitch Time (μs) V5 Detector Delay Time (ms) 450 35 30 VCC = 5V 25 20 VCC = 3.3V 15 10 250 -50 -25 0 25 50 75 100 -50 125 -25 0 Temperature (°C) VADJ Detector Delay Time vs. Temperature 50 75 100 125 VADJ Detector Deglitch Time vs. Temperature 450 40 425 400 375 350 325 300 VCC = 3.3V 275 VCC = 5V 250 -50 -25 0 25 50 75 100 125 VADJ Detector Deglitch Time (μs) VADJ Detector Delay Time (ms) 25 Temperature (°C) 35 30 VCC = 5V 25 20 VCC = 3.3V 15 10 -50 -25 0 25 50 75 Temperature (°C) Temperature (°C) V5 Pin Response VADJ Pin Response VCC = 5V VADJ (1V/Div) CTR (5V/Div) CTR (5V/Div) www.richtek.com 4 125 VCC = 5V V5 (5V/Div) Time (100ms/Div) 100 Time (100ms/Div) DS9823-02 June 2011 RT9823 Supply Current vs. Temperature MR Pin Response 250 VCC = 5V Supply Current (μA) 225 MR (5V/Div) CTR (5V/Div) 200 175 VCC = 5V 150 VCC = 3.3V 125 100 Time (5ms/Div) -50 -25 0 25 50 75 100 125 Temperature (°C) DS9823-02 June 2011 www.richtek.com 5 RT9823 Application Information 0.45 Maximum Power Dissipation (W)1 The RT9823 smart voltage detector monitors two voltage levels at the same time to ensure that the micro processor is operated within the recommended input voltage range. In conventional reset IC application, to monitor one power rail needs one reset IC. The RT9823 can monitor two power rails simultaneously, by using just one reset IC. The RT9823 also provides a Manual reset (MR) function for easy application. Glitch rejection is implemented in the RT9823 to prevent false operation and eliminate additional de-bouncing circuitry. Single Layer PCB 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0.00 Thermal Considerations For continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated by the following formula : 0 25 50 75 100 125 Ambient Temperature (°C) Figure 1. Derating Curves for RT9823 Package PD(MAX) = (TJ(MAX) − TA) / θJA where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and θJA is the junction to ambient thermal resistance. For recommended operating condition specifications of the RT9823, the maximum junction temperature is 125°C and TA is the ambient temperature. The junction to ambient thermal resistance, θJA, is layout dependent. For SOT23-6 packages, the thermal resistance, θJA, is 250°C/W on a standard JEDEC 51-3 single-layer thermal test board. The maximum power dissipation at TA = 25°C can be calculated by the following formula : P D(MAX) = (125°C − 25°C) / (250°C/W) = 0.4W for SOT-23-6 package The maximum power dissipation depends on the operating ambient temperature for fixed T J (MAX) and thermal resistance, θJA. For the RT9823 package, the derating curve in Figure 1 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. www.richtek.com 6 DS9823-02 June 2011 RT9823 Outline Dimension H D L C B b A A1 e Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.889 1.295 0.031 0.051 A1 0.000 0.152 0.000 0.006 B 1.397 1.803 0.055 0.071 b 0.250 0.560 0.010 0.022 C 2.591 2.997 0.102 0.118 D 2.692 3.099 0.106 0.122 e 0.838 1.041 0.033 0.041 H 0.080 0.254 0.003 0.010 L 0.300 0.610 0.012 0.024 SOT-23-6 Surface Mount Package Richtek Technology Corporation Richtek Technology Corporation Headquarter Taipei Office (Marketing) 5F, No. 20, Taiyuen Street, Chupei City 5F, No. 95, Minchiuan Road, Hsintien City Hsinchu, Taiwan, R.O.C. Taipei County, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Tel: (8862)86672399 Fax: (8862)86672377 Email: [email protected] Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek. DS9823-02 June 2011 www.richtek.com 7