RT9991 Power Management IC for SSD General Description Features The RT9991 is a 3-CH PMIC for SSD (Solid-State Drive). It integrates 3 synchronous buck converters and one voltage detector. z Supply Input Voltage Range : 2.8V to 5.5V z Buck 1 / Buck 2 ` Adjustable Output Voltage for VCORE or DRAM Cache ` Output Current up to 1A ` Switching Frequency : 1.5MHz Buck 3 ` Adjustable Output Version for NAND Flash ` Output Current up to 3A ` Switching Frequency : 2MHz ` Auto Discharge Function Voltage Detector ` Programmable Threshold Voltage ` Open-Drain Reset Output RoHS Compliant and Halogen Free The RT9991 provides 3 independent enable pins for sequence control and auto discharge when powered off on the power line of a NAND Flash. z The frequency can be up to 1.5MHz for Buck 1and Buck 2, and up to 2MHz for Buck 3, hence allowing the use of smaller sized inductors to meet the space and height limit in handheld applications. To maximize power utilization, the RT9991 is designed with extremely low quiescent current. The buck converter can consume down to 70μA when operating in standby mode. z The RT9991 is available in a VQFN-32L 5x5 package. Applications Ordering Information z RT9991 z Lead Plating System G : Green (Halogen Free and Pb Free) z 1.8/2.5 inch Solid-State Drives Portable Devices USB-Based Hand-Held Products Pin Configurations (TOP VIEW) GND NC NC NC FB2 EN2 VIN2 LX2 Note : Richtek products are : ` RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. ` Suitable for use in SnPb or Pb-free soldering processes. Marking Information RT9991GQV : Product Number RT9991 GQV YMDNN YMDNN : Date Code 32 31 30 29 28 27 26 25 GND LX3 LX3 LX3 VIN3 VIN3 EN3 FB3 1 24 2 23 3 22 4 5 21 GND 20 19 6 7 33 18 17 8 LX2 GND GND VIN2 VIN1 GND GND LX1 9 10 11 12 13 14 15 16 NC RESET VDET NC FB1 EN1 VIN1 LX1 Package Type QV : VQFN-32L 5x5 (V-Type) z VQFN-32L 5x5 DS9991-01 April 2011 www.richtek.com 1 RT9991 Typical Application Circuit RT9991 VIN 5V 15, 20 VIN1 C1 LX1 R7 R1 30k VIN3 FB1 R2 64.9k LX2 Chip Enable 10 C2 10µF VOUT1 1.2V/1A 13 11 VDET R8 VDD 3.3V L1 2.2µH 21, 26 VIN2 5, 6 R9 43k 16, 17 24, 25 L2 2.2µH R3 80k RESET FB2 14 EN1 27 EN2 C3 10µF VOUT2 1.8V/1A 28 R4 64.9k 7 EN3 LX3 2, 3, 4 L3 1µH R5 200k 1, 18, 19, 22, 23, 32, 33 (Exposed Pad) GND FB3 C4 10µF x 2 VOUT3 3.3V/3A 8 R6 64.9k Function Block Diagram RESET - VDET 0.7V + VIN1 EN1 Buck Converter 1 LX1 FB1 VIN2 EN2 Buck Converter 2 LX2 FB2 VIN3 EN3 Buck Converter 3 LX3 GND FB3 www.richtek.com 2 DS9991-01 April 2011 RT9991 Functional Pin Description Pin No. 1, 18, 19, 22, 23, 32, 33 (Exposed Pad) 2, 3, 4 5, 6 LX3 VIN3 Pin Function Ground. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. Buck Converter 3 Switch Output (inductor connection point). Buck Converter 3 Power Supply Input. EN3 FB3 NC Buck Converter 3 Chip Enable (Active High). Buck Converter 3 Feedback Input. No Internal Connection. RESET VDET FB1 EN1 Reset Output. Threshold Voltage Detect Setting. Buck Converter 1 Feedback Input. Buck Converter 1 Chip Enable (Active High). 15, 20 16, 17 21, 26 VIN1 LX1 VIN2 Buck Converter 1 Power Supply Input. Buck Converter 1 Switch Output (inductor connection point). Buck Converter 2 Power Supply Input. 24, 25 27 28 LX2 EN2 FB2 Buck Converter 2 Switch Output (inductor connection point). Buck Converter 2 Chip Enable (Active High). Buck Converter 2 Feedback Input. 7 8 9, 12, 29, 30, 31 10 11 13 14 DS9991-01 April 2011 Pin Name GND www.richtek.com 3 RT9991 Absolute Maximum Ratings z z z z z z z z z (Note 1) Supply Input Voltage, VIN ----------------------------------------------------------------------------------------LX Pin Voltage ------------------------------------------------------------------------------------------------------Other Pins Voltage ------------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C VQFN-32L 5x5 -----------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2) VQFN-32L 5x5, θJA ------------------------------------------------------------------------------------------------VQFN-32L 5x5, θJC -----------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) -----------------------------------------------------------------------Junction Temperature ---------------------------------------------------------------------------------------------Storage Temperature Range ------------------------------------------------------------------------------------ESD Susceptibility (Note 3) HBM (Human Body Mode) --------------------------------------------------------------------------------------MM (Machine Mode) ----------------------------------------------------------------------------------------------- Recommended Operating Conditions z z z −0.3V to 6.5V −0.3V to (VIN + 0.3V) −0.3V to 6.5V 2.778W 36°C/W 6°C/W 260°C 150°C −65°C to 150°C 2kV 200V (Note 4) Supply Input Voltage, VIN ----------------------------------------------------------------------------------------- 2.8V to 5.5V Junction Temperature Range ------------------------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range ------------------------------------------------------------------------------------- −40°C to 85°C Electrical Characteristics (VIN = 5V, TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit Buck Converter 1 Quiescent Current IQ No Load, No Switching -- 70 -- μA Shutdown Current ISHDN EN = GND -- 0.2 -- μA Feedback Reference Voltage V FB -- 0.8 -- V UVLO Under Voltage Lockout Threshold V UVLO VIN Rising -- 2.1 -- Hysteresis -- 0.1 -- V Logic-High V IH 1.5 -- VIN V Logic-Low V IL -- -- 0.4 V Peak Current Limit ILIM 1.3 1.7 -- A Oscillator Frequency f OSC 1.2 1.5 1.8 MHz -- 250 -- μs EN1 Threshold Voltage Start-Up Time VIN = 3.6V, IOUT = 300mA IOUT = 0mA. Time from active EN to 90% of VOUT P-MOSFET On Resistance R DS(ON)_P VIN = VGS = 3.6V, PWM Mode -- 250 -- mΩ N-MOSFET On Resistance R DS(ON)_N VIN = VGS = 3.6V, PWM Mode -- 260 -- mΩ Quiescent Current IQ No Load, No Switching -- 70 -- μA Shutdown Current ISHDN EN = GND -- 0.2 -- μA Feedback Reference Voltage V FB -- 0.8 -- V BUCK CONVERTER 2 To be continued www.richtek.com 4 DS9991-01 April 2011 RT9991 Parameter UVLO Under Voltage Lockout threshold Symbol VUVLO Test Conditions Min Typ Max VIN Rising -- 2.1 -- Hysteresis -- 0.1 -- Unit V Logic-High VIH 1.5 -- VIN Logic-Low VIL -- -- 0.4 Peak Current Limit I LIM 1.3 1.7 -- A Oscillator Frequency fOSC VIN = 3.6V, IOUT = 300mA 1.2 1.5 1.8 MHz -- 250 -- μs P-MOSFET On Resistance RDS(ON)_P IOUT = 0mA Time from active EN to 90% of VOUT VIN = VGS = 3.6V, PWM Mode -- 250 -- mΩ N-MOSFET On Resistance RDS(ON)_N VIN = VGS = 3.6V, PWM Mode -- 260 -- mΩ Quiescent Current IQ No Load, No Switching -- 80 -- μA Shutdown Current ISHDN EN = GND -- 0.2 -- μA Feedback Reference Voltage VFB 0.8 -- V UVLO Under Voltage Lockout Threshold VUVLO EN2 Threshold Voltage Start-Up Time V Buck Converter 3 VIN Rising -- 2.4 -- Hysteresis -- 0.1 -- V Logic-High VIH 1.5 -- VIN Logic-Low VIL -- -- 0.4 Peak Current Limit I LIM 3.5 3.9 -- A Oscillator Frequency fOSC 1.6 2 2.4 MHz 2000 -- -- μs -- 110 -- mΩ mΩ EN3 Threshold Voltage Start-Up Time VIN = 3.6V, IOUT = 300mA No Load. Time from active EN to 90% of VOUT VIN = VGS = 3.6V, PWM Mode V P-MOSFET On Resistance RDS(ON)_P N-MOSFET On Resistance RDS(ON)_N VIN = VGS = 3.6V, PWM Mode -- 110 -- VIN Rising (L to H) 0.693 0.7 0.707 VIN Falling (H to L) 0.673 0.68 0.687 VDelay (L to H) 70 100 130 ms VDelay (H to L) 5 10 20 μs Voltage Detector Voltage Detection Threshold Voltage Detection Delay Time V Thermal Protections Thermal Shutdown Threshold TSD -- 160 -- °C Thermal Shutdown Hysteresis ΔTSD -- 25 -- °C DS9991-01 April 2011 www.richtek.com 5 RT9991 Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. θJA is measured in natural convection at TA = 25°C on a high-effective thermal conductivity four-layer test board of JEDEC 51-7 thermal measurement standard. The measurement case position of θJC is on the exposed pad of the package. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. www.richtek.com 6 DS9991-01 April 2011 RT9991 Typical Operating Characteristics Buck1 Output Accuracy vs. Load Current Buck1 Efficiency vs. Load Current 100 Output Voltage Accuracy (%) 0.6% 0.6 Efficiency (%) 90 VIN1 = 2.8V VIN1 = 3.6V VIN1 = 4.2V 80 70 60 50 40 VBUCK1 = 1.2V 30 0.001 0.01 0.1 0.4% 0.4 0.2% 0.2 0.0 0.0% -0.2 -0.2% -0.4 -0.4% -0.6 -0.6% 0.001 0.001 1 0.1 1 Buck2 Output Accuracy vs. Load Current Buck2 Efficiency vs. Load Current 0.6% 0.6 Output Voltage Accuracy (%) 100 90 Efficiency (%) 0.01 Load Current (A) Load Current (A) VIN2 = 2.8V VIN2 = 3.6V VIN2 = 4.2V 80 70 60 50 40 0.01 0.1 0.4% 0.4 0.2 0.2% 0.0 0.0% -0.2 -0.2% -0.4 -0.4% VBUCK2 = 1.8V, VIN2 = 5V -0.6 -0.6% 0.001 0.001 0.01 VBUCK2 = 1.8V 30 0.001 1 Buck 3 Efficiency vs. Load Current Output Voltage Accuracy (%) 0.6% 0.6 100 90 VIN3 = 3.6V VIN3 = 4.2V VIN3 = 5V 70 60 50 40 VBUCK3 = 3.3V 30 0.01 0.1 1 Load Current (A) DS9991-01 April 2011 1 Buck3 Output Accuracy vs. Load Current 110 80 0.1 Load Current (V) Load Current (A) Efficiency (%) VBUCK1 = 1.2V, VIN1 = 5V 10 0.4% 0.4 0.2% 0.2 0.0% 0.0 -0.2% -0.2 -0.4% -0.4 VBUCK3 = 3.3V, VIN3 = 5V -0.6 -0.6% 0.001 0.01 0.1 0.001 1 10 Load Current (A) www.richtek.com 7 RT9991 Buck1 Output Ripple Buck2 Output Ripple VLX1 (5V/Div) VLX2 (5V/Div) VOUT1 (20mV/Div) VOUT2 (20mV/Div) ILX1 (1A/Div) ILX2 (1A/Div) VIN1 = 5V, ILOAD = 1A VIN2 = 5V, ILOAD = 1A Time (500ns/Div) Time (500ns/Div) Buck3 Output Ripple Buck1 Load Transient Response VOUT3 (20mV/Div) VBUCK1 (100mV/Div) VLX3 (5V/Div) ILX3 (1A/Div) IOUT (200mA/Div) VIN3 = 5V, ILOAD = 1A ILOAD = 40mA to 0.7A Time (250ns/Div) Time (50μs/Div) Buck2 Load Transient Response Buck3 Load Transient Response VBUCK2 (100mV/Div) VBUCK3 (200mV/Div) IOUT (200mA/Div) I LDO (1A/Div) ILOAD = 40mA to 0.7A Time (50μs/Div) www.richtek.com 8 ILOAD = 40mA to 2.5A Time (50μs/Div) DS9991-01 April 2011 RT9991 Application Information The basic RT9991 application circuit is shown in the section Typical Application Circuit. External component selection is determined by the maximum load current and begins with the selection of the inductor value and operating frequency followed by CIN and COUT. loop is stable. Loop stability can be checked by viewing the load transient response as described in a later section. Inductor Selection The output ripple is the highest at the maximum input voltage since ΔIL increases with input voltage. Multiple capacitors placed in parallel may be needed to meet the ESR and RMS current handling requirements. Dry tantalum, special polymer, aluminum electrolytic and ceramic capacitors are all available in surface mount packages. Special polymer capacitors offer very low ESR, but have lower capacitance density than other types. Tantalum capacitors have the highest capacitance density, but it is important to only use types that have been surge tested for use in switching power supplies. Aluminum electrolytic capacitors have significantly higher ESR, but can be used in cost-sensitive applications provided that consideration is given to ripple current ratings and long term reliability. Ceramic capacitors have excellent low ESR characteristics but can have a high voltage coefficient and audible piezoelectric effects. The high Q of ceramic capacitors with trace inductance can also lead to significant ringing. For a given input and output voltage, the inductor value and operating frequency determine the ripple current. The ripple current ΔIL increases with higher VIN and decreases with higher inductance, as shown in equation below : ⎤ ⎡V ⎤ ⎡ V ΔIL = ⎢ OUT ⎥ × ⎢1− OUT ⎥ VIN ⎦ ⎣ f ×L ⎦ ⎣ where f is the operating frequency and L is the inductance. Having a lower ripple current reduces not only the ESR losses in the output capacitors, but also the output voltage ripple. Higher operating frequency combined with smaller ripple current is necessary to achieve high efficiency. This, however, requires a large inductor. A reasonable starting point for selecting the ripple current is ΔIL = 0.4I(MAX). The largest ripple current occurs at the highest VIN. To guarantee that the ripple current stays below a specified maximum, the inductor value should be chosen according to the following equation : ⎡ VOUT ⎤ ⎡ VOUT ⎤ L=⎢ ⎥ × ⎢1− ⎥ ⎢⎣ f × ΔIL(MAX) ⎥⎦ ⎢⎣ VIN(MAX) ⎥⎦ CIN and COUT Selection The input capacitance, C IN, is needed to filter the trapezoidal current at the source of the high side MOSFET. To prevent large ripple voltage, a low ESR input capacitor sized for the maximum RMS current should be used. RMS current is given by : V VIN IRMS = IOUT(MAX) × OUT × −1 VIN VOUT This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT(MAX) / 2. Several capacitors may also be paralleled to meet size or height requirements in the design. The selection of COUT is determined by the Effective Series Resistance (ESR) that is required to minimize voltage ripple and load step transients, as well as the amount of bulk capacitance that is necessary to ensure that the control DS9991-01 April 2011 The output ripple, ΔVOUT, is determined by : ⎡ ⎤ 1 ΔVOUT ≤ ΔIL × ⎢ESR + ⎥ 8fC OUT ⎦ ⎣ Using Ceramic Input and Output Capacitors Higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. However, care must be taken when these capacitors are used at the input and output. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, VIN. At best, this ringing can couple to the output and be mistakened as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN large enough to damage the part. Output Voltage Programming The resistive divider allows the FB pin to sense a fraction of the output voltage as shown below www.richtek.com 9 RT9991 Voltage Detector RT9991 LX VOUT R1 FB R2 GND For adjustable voltage mode, the output voltage is set by an external resistive divider according to the following equation : VOUT = VFB × ⎛⎜ 1+ R1 ⎞⎟ ⎝ R2 ⎠ RESET is an open drain output that indicates whether the VDET voltage is higher than 0.7V or not. RESET is typically pulled up to 3.3V. VDET monitors the input voltage and triggers the RESET output (Figure 1). RESET is high impedance when the voltage from VDET exceeds the rising threshold 0.7V (typ.). RESET is low when the voltage from VDET falls below the low-battery falling threshold 0.68V (typ.) (Figure 2). If the voltage detector feature is not required, connect RESET to ground and connect VDET to VIN. 3.3V where VFB is the internal reference voltage 0.8V (typ.). Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to ΔILOAD (ESR), where ESR is the effective series resistance of COUT. ΔILOAD also begins to charge or discharge COUT generating a feedback error signal used by the regulator to return VOUT to its steady-state value. RESET Table 1. The RT9991 Power Terminology EN UVLO Default Output Voltage www.richtek.com 10 VDET 0.7V RESET Delay If the EN pin for the selected buck is pulled high and the input voltage is greater than the under voltage lockout threshold, the selected buck will be turned on. Buck1 can be turned on/off by the external EN1 pin; Buck2 can be turned on/off by the external EN2 pin; Buck3 can be turned on/off by the external EN3 pin. Buck 1 ON VIN1 > EN1 > 1.5V 5.5V > VIN1 > 2.1V - VDET Chip Enable Operation Output State 0.7V Figure 1. VDET and RESET Circuit 0.68V During this recovery time, VOUT can be monitored for overshoot or ringing which would indicate a stability problem. + Buck 2 ON VIN1 > EN2 > 1.5V 5.5V > VIN2 > 2.1V Buck 3 ON VIN1 > EN3 > 1.5V 5.5V > VIN3 > 2.4V R1 ⎞ VOUT = VFB × ⎛⎜ 1+ ⎟ ⎝ R2 ⎠ VFB = 0.8V Figure 2. VDET and RESET Comparator Waveform Choosing the Inductor The RT9991 includes a current-reversal comparator which monitors inductor current and disables the synchronous rectifier as current approaches zero. This comparator will minimize the effect of current reversal for higher efficiency. For some low inductance values, however, the inductor current may still reverse slightly. This value depends on the speed of the comparator in relation to the slope of the current waveform, given by VL / L. VL is the voltage across the inductor (approximately − V OUT ) and L is the inductance value. An inductance value of 2.2μH is a good starting value. As the inductance is reduced from this value, the RT9991 will enter discontinuous conduction mode at progressively DS9991-01 April 2011 RT9991 higher loads. Ripple at VOUT will increase directly proportionally to the magnitude of inductor ripple. Transient response, however, will improve. A smaller inductor changes its current more quickly for a given voltage drive than a larger inductor, resulting in faster transient response. A larger inductor will reduce output ripple and current ripple, but at the expense of reduced transient performance and a physically larger inductor package size. For this reason a larger CVOUT will be required for larger inductor sizes. The input regulator has an instantaneous peak current clamp to prevent the inductor from saturating during transient load or start-up conditions. The clamp is designed so that it does not interfere with normal operation at high loads and reasonable inductor ripple. It is intended to prevent inductor current runaway in case of a shorted output. The DC winding resistance and AC core losses of the inductor will also affect efficiency, and therefore available output power. These effects are difficult to characterize and vary by application. Some inductors and capacitors that may be suitable for this application are listed in Table below : Table 2 Length (mm) Max. VLF5012ST-1R0N2R5 5 VLF5014ST-2R2M2R3 5 VLF3010A-1 3 VLF3012A 3 VLS2010E 2.1 VLS2012E 2.1 NR6045T1R0N 6 CB2016T2R2M 2.2 NR6020T2R2N 6 NR3015 3 LPS4018 3.9 D53LC 5 DB318C 3.8 WE-TPC Type M1 4.8 p/n DS9991-01 April 2011 Width (mm) Max. 4.8 4.8 2.8 2.8 2.1 2.1 6 1.8 6 3 3.9 5 3.8 4.8 Height Inductance (mm) (μH) Max. L 1.2 1 1.4 2.2 1 2.2 1.2 2.2 1 2.2 1.2 2.2 4.5 1 1.8 2.2 2 2.2 1.5 2.2 1.7 3.3 3 3.3 1.8 3.3 1.8 3.3 RDC (mΩ) Max. 50 73 120 100 228 153 19 130 34 60 80 34 70 65 IDC (A) Supplier Max. 3.3 3 1 TDK 1 1 1 4.2 1 TAIYO 2.7 1.48 2.2 CoilCraft 2.26 Toko 1.55 1.95 Wurth www.richtek.com 11 RT9991 Thermal Considerations Layout Considerations For continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated by the following formula : Follow the PCB layout guidelines for optimal performance of RT9991. PD(MAX) = (TJ(MAX) − TA) / θJA where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and θJA is the junction to ambient thermal resistance. For recommended operating condition specifications of the RT9991, the maximum junction temperature is 125°C and TA is the ambient temperature. The junction to ambient thermal resistance, θJA, is layout dependent. For VQFN- ` Place the input capacitor as close as possible to the device pins (VIN and GND). ` LX node is with high frequency voltage swing and should be kept in a small area. ` Connect feedback network behind the output capacitors. ` Keep the switching area small. Place the feedback components near the RT9991. ` Connect all analog grounds to a common node and then connect the common node to the power ground behind the output capacitors. 32L 5x5 packages, the thermal resistance, θJA , is 36°C/ W on a standard JEDEC 51-7 four-layer thermal test board. The maximum power dissipation at TA = 25°C can be calculated by the following formula : PD(MAX) = (125°C − 25°C) / (36°C/W) = 2.778W for VQFN-32L 5x5 package The maximum power dissipation depends on the operating ambient temperature for fixed T J(MAX) and thermal resistance, θJA . For the RT9991 package, the derating curve in Figure 3 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. Maximum Power Dissipation (W)1 3.0 Four-Layer PCB 2.7 2.4 2.1 1.8 1.5 1.2 0.9 0.6 0.3 0.0 0 25 50 75 100 125 Ambient Temperature (°C) Figure 3. Derating Curve for the RT9991 Package www.richtek.com 12 DS9991-01 April 2011 RT9991 The feedback resistor divider must be placed as close to the FB pin as possible. VIN Place CIN between VIN and GND and it should be as close as possible to the IC. VOUT3 GND NC NC NC FB2 EN2 VIN2 LX2 VOUT2 32 31 30 29 28 27 26 25 GND LX3 LX3 LX3 VIN3 VIN3 EN3 FB3 1 24 2 23 3 4 22 21 GND 20 5 19 6 7 18 33 17 8 LX2 GND GND VIN2 VIN1 GND GND LX1 The LX pin should be connected to the inductor by a wide and short trace, Keep sensitive components away from this trace. NC RESET VDET NC FB1 EN1 VIN1 LX1 9 10 11 12 13 14 15 16 VOUT1 The output capacitor must be close to the IC. Figure 4. PCB Layout Guide DS9991-01 April 2011 www.richtek.com 13 RT9991 Outline Dimension D2 D SEE DETAIL A L 1 E E2 e b 1 2 2 DETAIL A Pin #1 ID and Tie Bar Mark Options A A1 1 A3 Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 0.800 1.000 0.031 0.039 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.180 0.300 0.007 0.012 D 4.950 5.050 0.195 0.199 D2 3.400 3.750 0.134 0.148 E 4.950 5.050 0.195 0.199 E2 3.400 3.750 0.134 0.148 e L 0.500 0.350 0.020 0.450 0.014 0.018 V-Type 32L QFN 5x5 Package Richtek Technology Corporation Richtek Technology Corporation Headquarter Taipei Office (Marketing) 5F, No. 20, Taiyuen Street, Chupei City 5F, No. 95, Minchiuan Road, Hsintien City Hsinchu, Taiwan, R.O.C. Taipei County, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Tel: (8862)86672399 Fax: (8862)86672377 Email: [email protected] Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek. www.richtek.com 14 DS9991-01 April 2011