DS7831/DS8831/DS7832/DS8832 Dual TRI-STATEÉ Line Driver General Description Features Through simple logic control, the DS7831/DS8831, DS7832/DS8832 can be used as either a quad single-ended line driver or a dual differential line driver. They are specifically designed for party line (bus-organized) systems. The DS7832/DS8832 does not have the VCC clamp diodes found on the DS7831/DS8831. The DS7831 and DS7832 are specified for operation over the b55§ C to a 125§ C military temperature range. The DS8831 and DS8832 are specified for operation over the 0§ C to a 70§ C temperature range. Y Y Y Y Y Y Series 54/74 compatible 17 ns propagation delay Very low output impedanceÐhigh drive capability 40 mA sink and source currents Gating control to allow either single-ended or differential operation High impedance output state which allows many outputs to be connected to a common bus line Connection and Logic Diagram Dual-In-Line Package Order Number DS8831N, DS8832J or DS8832N See NS Package Number J16A or N16A For Complete Military 883 Specificatons, See RETS Data Sheet. Order Number DS7831J/883, DS7831W/883, DS7832J/883 or DS7832W/883 See NS Package Number J16A or W16A TL/F/5800 – 1 Top View Truth Table (Shown for A Channels Only) ‘‘A’’ Output Disable Differential/ Single-Ended Mode Control Input A1 Output A1 Input A2 Output A2 Same as Input A1 0 0 0 0 Logical ‘‘1’’ or Logical ‘‘0’’ Logical ‘‘1’’ or Logical ‘‘0’’ Same as Input A2 0 0 X 1 1 X Logical ‘‘1’’ or Opposite of Logical ‘‘1’’ or Logical ‘‘0’’ Input A1 Logical ‘‘0’’ Same as Input A2 1 X X 1 X X High Impedance State High Impedance State X X X e Don’t Care TRI-STATEÉ is a registered trademark of National Semiconductor Corp. C1996 National Semiconductor Corporation TL/F/5800 RRD-B30M36/Printed in U. S. A. http://www.national.com DS7831/DS8831/DS7832/DS8832 Dual TRI-STATE Line Driver February 1996 Absolute Maximum Ratings (Note 1) Operating Conditions If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage Input Voltage Output Voltage Storage Temperature Range Supply Voltage (VCC) DS7831/DS7832 DS8831/DS8832 Temperature (TA) DS7831/DS7832 DS8831/DS8832 7V 5.5V 5.5V Min Max Units 4.5 4.75 5.5 5.25 V V b 55 a 125 a 70 §C §C 0 b 65§ C to a 150§ C Lead Temperature (Soldering, 4 sec.) Maximum Power Dissipation* at 25§ C Cavity Package Molded Package 260§ C 1433 mW 1362 mW *Derate cavity package 9.6 mW/§ C above 25§ C; derate molded package 10.9 mW/§ C above 25§ C. Electrical Characteristics (Notes 2 and 3) Symbol Parameter Conditions VIH Logical ‘‘1’’ Input Voltage VCC e Min VIL Logical ‘‘0’’ Input Voltage VCC e Min VOH Logical ‘‘1’’ Output Voltage DS7831/DS7832 DS8831/DS8832 VOL Logical ‘‘0’’ Output Voltage Typ IIH Logical ‘‘1’’ Input Current 0.8 V VCC e Min IO e b40 mA 1.8 2.3 V IO e b2 mA 2.4 2.7 V IO e b40 mA 1.8 2.5 V IO e b5.2 mA 2.4 2.9 V IO e 40 mA 0.50 V 0.40 V 0.50 V 0.40 V DS7831/DS7832, VIN e 5.5V 1 mA DS8831/DS8832, VIN e 2.4V 40 mA b 1.0 b 1.6 mA 40 mA b 100 b 120 mA VCC e Min 0.29 IO e 32 mA IO e 40 mA 0.29 IIL Logical ‘‘0’’ Input Current VCC e Max, VIN e 0.4V IOD Output Disable Current VCC e Max, VO e 2.4V or 0.4V b 40 ISC Output Short Circuit Current VCC e Max, (Note 4) b 40 ICC Supply Current VCC e Max in TRI-STATE VCLI Input Diode Clamp Voltage VCC e 5.0V, TA e 25§ C, IIN e b12 mA VCLO Output Diode Clamp Voltage VCC e 5.0V, TA e 25§ C 65 IOUT e b12 mA DS7831/DS8831 DS7832/DS8832 IOUT e 12 mA http://www.national.com Units V IO e 32 mA VCC e Max Max 2.0 DS7831/DS7832 DS8831/DS8832 Min 2 DS7831/DS8831 90 mA b 1.5 V b 1.5 V VCC a 1.5 V Switching Characteristics TA e 25§ C, VCC e 5V, unless otherwise noted Symbol tpd0 tpd1 t1H t0H tH1 tH0 Typ Max Units Propagation Delay to a Logical ‘‘0’’ from Inputs A1, A2, B1, B2 Differential Single-ended Mode Control to Outputs Parameter 13 25 ns Propagation Delay to a Logical ‘‘1’’ from Inputs A1, A2, B1, B2 Differential Single-ended Mode Control to Outputs 13 25 ns 6 12 ns Delay from Disable Inputs to High Impedance State (from Logical ‘‘0’’ Level) 14 22 ns Propagation Delay from Disable Inputs to Logical ‘‘1’’ Level (from High Impedance State) 14 22 ns Propagation Delay from Disable Inputs to Logical ‘‘0’’ Level (from High Impedance State) 18 27 ns Delay from Disable Inputs to High Impedance State (from Logical ‘‘1’’ Level) Conditions (See Figures 4 and 5 ) Min Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’ they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation. Note 2: Unless otherwise specified min/max limits apply across the b 55§ C to a 125§ C temperature range for the DS7831 and DS7832 and across the 0§ C to a 70§ C range for the DS8831 and DS8832. All typical values are for TA e 25§ C and VCC e 5V. Note 3: All currents into device pins shown as positive, out of device pins as negative, all voltage referenced to ground unless otherwise noted. All values shown as max or min on absolute value basis. Note 4: Applies for TA e 125§ C only. Only one output should be shorted at a time. Mode of Operation in the ‘‘high impedance’’ state. This is accomplished by ensuring that a logical ‘‘1’’ is applied to at least one of the Output Disable pins of each device which is to be in the ‘‘high impedance’’ state. A NOR gate was purposely chosen for this function since it is possible with only two DM5442/ DM7442, BCD-to-decimal decoders, to decode as many as 100 DS7831/DS8831’s, DS7832/DS8832’s (Figure 2). To operate as a quad single-ended line driver apply logical ‘‘0’’s to the output disable pins (to keep the outputs in the normal low impedance mode) and apply logical ‘‘0’’s to both Differential/Single-ended Mode Control inputs. All four channels will then operate independently and no signal inversion will occur between inputs and outputs. To operate as a dual differential line driver apply logical ‘‘0’’s to the Output Disable pins and apply at least one logical ‘‘1’’ to the Differential/Single-ended Mode Control inputs. The inputs to the A channels should be connected together and the inputs to the B channels should be connected together. In this mode the signals applied to the resulting inputs will pass non-inverted on the A2 and B2 outputs and inverted on the A1 and B1 outputs. When operating in a bus-organized system with outputs tied directly to outputs of other DS7831/DS8831’s, DS7832/ DS8832’s (Figure 1), all devices except one must be placed The unique device whose Disable inputs receive two logical ‘‘0’’ levels assumes the normal low impedance output state, providing good capacitive drive capability and waveform integrity especially during the transition from the logical ‘‘0’’ to logical ’’1’’ state. The other outputsÐin the high impedance stateÐtake only a small amount of leakage current from the low impedance outputs. Since the logical ‘‘1’’ output current from the selected device is 100 times that of a conventional Series 54/74 device (40 mA vs. 400 mA), the output is easily able to supply that leakage current for several hundred other DS7831/DS8831’s, DS7832/DS8832’s and still have available drive for the bus line (Figure 3). 3 http://www.national.com TL/F/5800–2 FIGURE 1 TL/F/5800 – 3 FIGURE 2 TL/F/5800 – 4 FIGURE 3 http://www.national.com 4 Typical Performance Characteristics Propagation Delay from Input to Output (Channel 1) Propagation Delay from Input to Output (Channel 1) Propagation Delay from Input to Output (Channel 2) Delay from Disable to High Impedance State Delay from Disable to Low Impedance State Propagation Delay vs Load Capacitance Total Supply Current vs Frequency Logical ‘‘1’’ Output Voltage vs Source Current Logical ‘‘0’’ Output Voltage vs Sink Current IOUT vs VOUT High Impedance Output State Propagation Delay in Differential Mode TL/F/5800 – 5 5 http://www.national.com Typical Performance Characteristics (Continued) TL/F/5800 – 6 Switching Time Waveforms Input characteristic: Amplitude e 3.0V Frequency e 1.0 MHz, 50% duty cycle tr e tf s ns (10% to 90%) TL/F/5800 – 7 TL/F/5800 – 8 FIGURE 4 http://www.national.com 6 AC Load Circuit Symbol Switch S1 Switch S2 tpd1 tpd0 t0H t1H tH0 tH1 closed closed closed closed closed open closed closed closed closed open closed CL 50 pF 50 pF *5 pF *5 pF 50 pF 50 pF *Jig capacitance TL/F/5800 – 9 FIGURE 5 Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number DS7831J, DS8831J, DS7832J or DS8832J NS Package Number J16A 7 http://www.national.com DS7831/DS8831/DS7832/DS8832 Dual TRI-STATE Line Driver Physical Dimensions inches (millimeters) (Continued) Molded Dual-In-Line Package (N) Order Number DS8831N or DS8832N NS Package Number N16A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation 1111 West Bardin Road Arlington, TX 76017 Tel: 1(800) 272-9959 Fax: 1(800) 737-7018 http://www.national.com 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 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