SHENZHENFREESCALE AOB240L

AOT240L/AOB240L/AOTF240L
40V N-Channel MOSFET
General Description
The AOT240L & AOB240L & AOTF240L uses Trench MOSFET technology that is uniquely optimized to provide
the most efficient high frequency switching performance. Power losses are minimized due to an extremely low
combination of R DS(ON) and Crss.
Features
VDS
ID (at VGS=10V)
40V
105A/85A
RDS(ON) (at VGS=10V)
< 2.9mΩ (< 2.6mΩ∗)
RDS(ON) (at VGS=4.5V)
< 3.7mΩ (< 3.5mΩ∗)
D
G
S
Absolute Maximum Ratings TA=25°C unless otherwise noted
Symbol
Parameter
AOT240L/AOB240L
VDS
Drain-Source Voltage
40
Gate-Source Voltage
VGS
TC=25°C
Continuous Drain
Current G
Pulsed Drain Current
Avalanche Current
C
Avalanche energy L=0.1mH C
TC=25°C
Power Dissipation B
TC=100°C
Power Dissipation A
TA=70°C
20
Steady-State
Steady-State
A
16
68
A
231
mJ
TJ, TSTG
Symbol
t ≤ 10s
A
EAS
PDSM
Junction and Storage Temperature Range
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient A
Maximum Junction-to-Ambient A D
Maximum Junction-to-Case
60
IAS
PD
TA=25°C
V
400
IDSM
TA=70°C
Units
V
85
82
IDM
TA=25°C
Continuous Drain
Current
±20
105
ID
TC=100°C
C
AOTF240L
RθJA
RθJC
176
41
88
20
1.9
W
1.2
-55 to 175
AOT240L/AOB240L
15
65
0.85
W
°C
AOTF240L
15
65
3.6
Units
°C/W
°C/W
°C/W
* Surface mount package TO263
1/7
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AOT240L/AOB240L/AOTF240L
40V N-Channel MOSFET
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
STATIC PARAMETERS
Drain-Source Breakdown Voltage
BVDSS
IDSS
Zero Gate Voltage Drain Current
Conditions
Min
ID=250µA, VGS=0V
40
Gate-Body leakage current
VDS=0V, VGS=±20V
Gate Threshold Voltage
VDS=VGS,ID=250µA
ID(ON)
On state drain current
VGS=10V, VDS=5V
5
1
TO220/TO220F
TJ=125°C
VGS=4.5V, ID=20A
TO220/TO220F
VGS=10V, ID=20A
TO263
VGS=4.5V, ID=20A
gFS
Forward Transconductance
TO263
VDS=5V, ID=20A
VSD
Diode Forward Voltage
IS=1A,VGS=0V
IS
Maximum Body-Diode Continuous Current G
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
±100
nA
2.2
V
2.4
2.9
3.7
4.7
3
3.7
mΩ
2.1
2.6
mΩ
2.7
3.5
mΩ
A
78
1
V
105
A
3510
VGS=0V, VDS=20V, f=1MHz
mΩ
S
0.65
DYNAMIC PARAMETERS
Ciss
Input Capacitance
µA
1.7
400
VGS=10V, ID=20A
Units
V
1
TJ=55°C
VGS(th)
Static Drain-Source On-Resistance
Max
VDS=40V, VGS=0V
IGSS
RDS(ON)
Typ
pF
1070
pF
68
pF
1
1.5
Ω
SWITCHING PARAMETERS
Qg(10V) Total Gate Charge
49
72
nC
Qg(4.5V) Total Gate Charge
22
32
nC
VGS=0V, VDS=0V, f=1MHz
VGS=10V, VDS=20V, ID=20A
0.5
Qgs
Gate Source Charge
9
nC
Qgd
Gate Drain Charge
7
nC
tD(on)
Turn-On DelayTime
11
ns
tr
Turn-On Rise Time
10
ns
tD(off)
Turn-Off DelayTime
38
ns
tf
Turn-Off Fall Time
11
ns
ns
nC
VGS=10V, VDS=20V, RL=1Ω,
RGEN=3Ω
trr
Body Diode Reverse Recovery Time
IF=20A, dI/dt=500A/µs
21
Qrr
Body Diode Reverse Recovery Charge IF=20A, dI/dt=500A/µs
58
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application
depends on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.
B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C. Ratings are based on low frequency and duty cycles to keep
initial TJ =25°C.
D. The RθJA is the sum of the thermal impedance from junction to case RθJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedance which is measured with the device mounted to a large heatsink,
assuming a maximum junction temperature of TJ(MAX)=175°C. The SOA curve provides a single pulse rating.
G. The maximum current limited by package.
H. These tests are performed with the device mounted on 1 in2 FR-4 board with 2oz. Copper, in a still air environment with TA=25°C.
2/7
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AOT240L/AOB240L/AOTF240L
40V N-Channel MOSFET
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
100
100
3.5V
VDS=5V
7V
80
3V
80
10V
60
ID(A)
ID (A)
60
125°C
40
40
20
20
25°C
Vgs=2.5V
0
0
0
1
2
3
4
1
5
VDS (Volts)
Fig 1: On-Region Characteristics (Note E)
8
2
2.5
3
3.5
VGS(Volts)
Figure 2: Transfer Characteristics (Note E)
4
Normalized On-Resistance
2
6
RDS(ON) (mΩ
Ω)
1.5
VGS=4.5V
4
2
VGS=10V
1.8
VGS=10V
ID=20A
1.6
17
5
2
VGS=4.5V
10
1.4
1.2
ID=20A
1
0.8
0
0
5
0
10
15
20
25
30
ID (A)
Figure 3: On-Resistance vs. Drain Current and Gate
Voltage (Note E)
25
50
75
100
125
150
175
200
0
Temperature (°C)
Figure 4: On-Resistance vs. Junction
18Temperature
(Note E)
8
1.0E+02
ID=20A
1.0E+01
40
1.0E+00
125°C
4
IS (A)
RDS(ON) (mΩ
Ω)
6
125°C
1.0E-01
1.0E-02
25°C
1.0E-03
2
25°C
1.0E-05
0
2
3/7
1.0E-04
4
6
8
10
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)
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AOT240L/AOB240L/AOTF240L
40V N-Channel MOSFET
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
10
5000
VDS=20V
ID=20A
Ciss
4000
Capacitance (pF)
VGS (Volts)
8
6
4
2
3000
2000
Coss
1000
Crss
0
0
0
10
20
30
40
Qg (nC)
Figure 7: Gate-Charge Characteristics
50
0
10
20
30
VDS (Volts)
Figure 8: Capacitance Characteristics
600
1000.0
TJ(Max)=175°C
TC=25°C
10µs
RDS(ON)
10µs
500
100µs
1ms
10ms
10.0
DC
1.0
TJ(Max)=175°C
TC=25°C
0.1
Power (W)
ID (Amps)
100.0
40
17
5
2
10
400
300
200
0.0
100
0.01
0.1
1
10
100
VDS (Volts)
Figure 9: Maximum Forward Biased Safe Operating
Area for AOT240L and AOB240L (Note F)
0.001
0.01
0.1
1
0
10
Pulse Width (s)
18
Figure 10: Single Pulse Power Rating Junction-to-Case
for AOT240L and AOB240L (Note F)
Zθ JC Normalized Transient
Thermal Resistance
10
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
40
RθJC=0.85°C/W
1
PD
0.1
Single Pulse
Ton
T
0.01
0.00001
0.0001
0.001
0.01
0.1
1
10
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance for AOT240L and AOB240L (Note F)
4/7
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AOT240L/AOB240L/AOTF240L
40V N-Channel MOSFET
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
600
1000.0
10µs
RDS(ON)
100.0
TJ(Max)=175°C
TC=25°C
500
10.0
1.0
DC
TJ(Max)=175°C
TC=25°C
0.1
Power (W)
ID (Amps)
100µs
1ms
10ms
400
300
200
100
0.0
0
0.01
0.1
1
VDS (Volts)
10
100
0.001
0.01
0.1
1
10
100
1000
17
Pulse Width (s)
Figure 13: Single Pulse Power Rating Junction-to-Case
5
for AOTF240L (Note F)
Figure 12: Maximum Forward Biased
Safe Operating Area for AOTF240L
2
10
Zθ JC Normalized Transient
Thermal Resistance
10
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
RθJC=3.6°C/W
1
0
18
0.1
PD
Single Pulse
Ton
0.01
0.00001
T
40
0.0001
0.001
0.01
0.1
1
10
100
1000
Pulse Width (s)
Figure 14: Normalized Maximum Transient Thermal Impedance for AOTF240L (Note F)
5/7
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AOT240L/AOB240L/AOTF240L
40V N-Channel MOSFET
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
200
TA=25°C
Power Dissipation (W)
IAR (A) Peak Avalanche Current
1000
TA=100°C
100
TA=150°C
TA=125°C
10
150
100
50
0
1
10
100
1000
Time in avalanche, tA (µ
µs)
Figure 15: Single Pulse Avalanche capability
(Note C)
0
25
50
75
100
125
150
TCASE (°
°C)
Figure 16: Power De-rating (Note F)
175
1000
120
TA=25°C
80
100
Power (W)
Current rating ID(A)
100
60
40
17
5
2
10
10
20
0
1
0
25
50
75
100
125
150
TCASE (°
°C)
Figure 17: Current De-rating (Note F)
175
0.001
0.1
10 0
1000
18
Pulse Width (s)
Figure 18: Single Pulse Power Rating Junction-toAmbient (Note H)
0.00001
Zθ JA Normalized Transient
Thermal Resistance
10
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
1
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
40
RθJA=65°C/W
0.1
PD
0.01
Single Pulse
Ton
T
0.001
0.01
0.1
1
10
100
1000
Pulse Width (s)
Figure 19: Normalized Maximum Transient Thermal Impedance (Note H)
6/7
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AOT240L/AOB240L/AOTF240L
40V N-Channel MOSFET
Gate Charge Test Circuit & Waveform
Vgs
Qg
10V
+
+ Vds
VDC
-
Qgs
Qgd
VDC
-
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
90%
+ Vdd
DUT
Vgs
VDC
-
Rg
10%
Vgs
Vgs
t d(on)
tr
t d(off)
t on
tf
toff
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
2
E AR = 1/2 LIAR
Vds
BVDSS
Vds
Id
+ Vdd
Vgs
Vgs
I AR
VDC
-
Rg
Id
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q rr = - Idt
Vds +
DUT
Vds Isd
Vgs
Ig
7/7
Vgs
L
Isd
+ Vdd
t rr
dI/dt
I RM
Vdd
VDC
-
IF
Vds
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