SHENZHENFREESCALE TJ15P04M3

TJ15P04M3
MOSFETs Silicon P-Channel MOS (U-MOS-H)
1. Applications
•
DC-DC Converters
•
Desktop Computers
2. Features
(1)
Low drain-source on-resistance: RDS(ON) = 28 mΩ (typ.) (VGS = -10 V)
(2)
Low leakage current: IDSS = -10 µA (max) (VDS = -40 V)
(3)
Enhancement mode: Vth = -0.8 to -2.0 V (VDS = -10 V, ID = -0.1 mA)
3. Packaging and Internal Circuit
1: Gate
2: Drain (heatsink)
3: Source
DPAK
 unless otherwise specified)
4. Absolute Maximum Ratings (Note) (Ta = 25
25
Characteristics
Drain-source voltage
Gate-source voltage
Drain current (DC)
Drain current (pulsed)
Power dissipation
Single-pulse avalanche energy
Avalanche current
Symbol
Rating
Unit
VDSS
-40
V
VGSS
±20
(Note 1)
ID
-15
(Note 1)
IDP
-45
PD
29
W
EAS
29
mJ
IAR
-15
A

(Tc = 25)
(Note 2)
Channel temperature
Tch
150
Storage temperature
Tstg
-55 to 150
Note:
1/8
A
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
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5. Thermal Characteristics
Characteristics
Symbol
Max
Unit
/W
Channel-to-case thermal resistance
Rth(ch-c)
4.3
Channel-to-ambient thermal resistance
Rth(ch-a)
125
Note 1: Ensure that the channel temperature does not exceed 150.
Note 2: VDD = -32 V, Tch = 25 (initial), L = 100 µH, RG = 25 Ω, IAR = -15 A
Note:
2/8
This transistor is sensitive to electrostatic discharge and should be handled with care.
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6. Electrical Characteristics
 unless otherwise specified)
6.1. Static Characteristics (Ta = 25
25
Characteristics
Symbol
Gate leakage current
IGSS
Drain-source breakdown voltage
(Note 3)
Typ.
Max
Unit


±0.1
µA
IDSS
VDS = -40 V, VGS = 0 V


-10
ID = -10 mA, VGS = 0 V
-40


V(BR)DSX
ID = -10 mA, VGS = 10 V
-30


Vth
VDS = -10 V, ID = -0.1 mA
-0.8

-2.0
RDS(ON)
VGS = -4.5 V, ID = -7.5 A

37
48
VGS = -10 V, ID = -7.5 A

28
36
Gate threshold voltage
Drain-source on-resistance
VGS = ±20 V, VDS = 0 V
Min
V(BR)DSS
Drain cut-off current
Drain-source breakdown voltage
Test Condition
V
mΩ
Note 3: If a reverse bias is applied between gate and source, this device enters V(BR)DSX mode. Note that the drainsource breakdown voltage is lowered in this mode.
 unless otherwise specified)
6.2. Dynamic Characteristics (Ta = 25
25
Characteristics
Symbol
Input capacitance
Ciss
Test Condition
VDS = -10 V, VGS = 0 V, f = 1 MHz
Min
Typ.
Max
Unit

1100

pF
Reverse transfer capacitance
Crss

130

Output capacitance
Coss

170

Switching time (rise time)
tr

11

Switching time (turn-on time)
ton

19

tf

42

toff

170

Switching time (fall time)
Switching time (turn-off time)
See Figure 6.2.1.
ns
Fig. 6.2.1 Switching Time Test Circuit
 unless otherwise specified)
6.3. Gate Charge Characteristics (Ta = 25
25
Characteristics
Symbol
Total gate charge (gate-source plus
gate-drain)
Qg
Test Condition
VDD ≈ -32 V, VGS = -10 V, ID = -15 A
Min
Typ.
Max
Unit

26

nC
Gate-source charge 1
Qgs1

6.7

Gate-drain charge
Qgd

2.5

 unless otherwise specified)
25
6.4. Source-Drain Characteristics (Ta = 25
Characteristics
Reverse drain current (pulsed)
Diode forward voltage
Symbol
(Note 4)
Test Condition
Min
Typ.
Max
Unit
IDRP



-45
A
VDSF
IDR = -15 A, VGS = 0 V


1.2
V
Note 4: Ensure that the channel temperature does not exceed 150.
3/8
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7. Marking
Fig. 7.1 Marking
4/8
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8. Characteristics Curves (Note)
5/8
Fig. 8.1 ID - VDS
Fig. 8.2 ID - VDS
Fig. 8.3 ID - VGS
Fig. 8.4 VDS - VGS
Fig. 8.5 RDS(ON) - ID
Fig. 8.6 RDS(ON) - Ta
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Fig. 8.7 IDR - VDS
Fig. 8.8 Capacitance - VDS
Fig. 8.9 Vth - Ta
Fig. 8.10 Dynamic Input/Output Characteristics
Fig. 8.11 PD - Tc
(Guaranteed Maximum)
6/8
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Fig. 8.12 rth/Rth(ch-c) - tw
(Guaranteed Maximum)
Fig. 8.13 Safe Operating Area
(Guaranteed Maximum)
Fig. 8.14 EAS - Tch
(Guaranteed Maximum)
Fig. 8.15 Test Circuit/Waveform
Note:
7/8
The above characteristics curves are presented for reference only and not guaranteed by production test,
unless otherwise noted.
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Package Dimensions
8/8
Unit: mm
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