SILABS SI4012

Si4012
Si4012 C RYSTAL - LESS FSK/OOK RF T RANSMITTER
Features







Frequency range
27–960 MHz
Output power range
–13 to +10 dBm
Low Power Consumption
OOK
14.2 mA @ +10 dBm
FSK
19.8 mA @ +10 dBm
Data rate:
Up to 100 kbaud FSK
Up to 50 kbaud OOK
FSK and OOK modulation
Power supply = 1.8 to 3.6 V
Automatic antenna tuning










Programmable ramp rate
Crystal-less operation
±150 ppm: 0 to 70° C
±250 ppm: –40 to 85° C
Optional crystal input for
applications requiring tighter
tolerances
Ultra low standby current <10 nA
Integrated voltage regulator
255 byte FIFO
Low battery detector
SMBus Interface
–40 to +85 °C temperature range
10-Pin MSOP Package,
RoHs compliant
Low BOM
Applications






Wireless MBus T1-mode
Remote control
Home security & alarm
Personal data logging
Toy control
Wireless PC peripherals






Remote meter reading
Remote keyless entry
Home automation
Industrial control
Sensor networks
Health monitors
Description
Ordering Information:
See page 43.
Pin Assignments
Si4012
XTAL 1
10 SDA
GND 2
9 SCL
TXM 3
Si4012
8 SDN
TXP 4
7 nIRQ
VDD 5
6 LED
Patents pending
Silicon Laboratories’ Si4012 is a fully-integrated crystalless CMOS high-data-rate
RF transmitter designed for the sub-GHz ISM band. This chip is optimized for
battery powered applications requiring low standby currents and high output
transmit power.
The device offers advanced radio features including continuous frequency
coverage from 27–960 MHz, adjustable output power of up to +10 dBm, and data
rates up to 100 kbaud in FSK mode. The Si4012’s high level of integration offers
reduced BOM cost while simplifying overall system design.
Functional Block Diagram
Si4012
Digital Logic
RF Analog Core
Antenna Tune
OOK
SMBus
Interface
Host
MCU
TX
255 Byte
Data FIFO
LED
XTAL
PA
Auto
Tune
TXP
TXM
LCOSC
LPOSC
VA
Digital
Controller
VD
Register
Bank
Rev 1.1 3/13
Divider
FSK
Modulator
XTAL
OSC
LDO
POR
BANDGAP
VDD
GND
Battery
Monitor
Copyright © 2013 by Silicon Laboratories
Si4012
Si4012
2
Rev 1.1
Si4012
TABLE O F C ONTENTS
Section
Page
1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
1.1. Definition of Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
2. Typical Application Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
3. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
4. Host MCU Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.1. SMBus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
4.2. SMBus Flow Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
4.3. Host Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.4. Operating Mode Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
5. Command Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.1. Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.2. Properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.3. Error Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
6. Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
7. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
8. Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
9. Land Pattern: 10-Pin MSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
10. Top Marking: 10-Pin MSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50
Rev 1.1
3
Si4012
1. Electrical Specifications
Table 1. Recommended Operating Conditions1
Parameter
Supply Voltage
Symbol
Test Condition
VDD
Supply Voltage Slew Rate
Input Voltage
Min
Typ
Max
Unit
1.8
—
3.6
V
Initial Battery Insertion2
20
—
650
mV/
us
Digital Input Signals
–0.3
—
VDD +
0.3
V
Notes:
1. All specifications guaranteed by production test unless otherwise noted. Production test conditions and max limits are
listed in "1.1. Definition of Test Conditions" on page 7.
2. Recommend bypass capacitor = 1 µF; slew rate measured 1 V < VDD ,< 1.7 V.
Table 2. DC Characteristics*
Parameter
Symbol
Conditions
Min
Typ
Max
Units
Power Saving Modes
IShutdown
Lowest current mode
—
10
—
nA
IIdle
Register values retained,
lowest current consumption idle mode
—
600
—
µA
ITX_OOK
OOK, Manchester encoded
—
14.2
—
mA
ITX_FSK
FSK
—
19.8
—
mA
TX Mode Current @ 10 dBm
*Note: All specifications guaranteed by production test unless otherwise noted. Production test conditions and max limits are
listed in "1.1. Definition of Test Conditions" on page 7.
4
Rev 1.1
Si4012
Table 3. Si4012 RF Transmitter Characteristics1
(TA = 25 °C, VDD = 3.3 V, RL = 550 , unless otherwise noted)
Parameter
Test Condition
Min
Typ
Max
Unit
27
—
960
MHz
—
0.3
—
ppm
—
—
—
—
–150
–250
–70
–100
–105
5
—
—
—
—
+150
+250
dBc/Hz
dBc/Hz
dBc/Hz
ms
ppm
ppm
–10
—
+10
ppm
—
10
—
dBm
—
–13
—
dBm
–1.0
—
0.5
dB
Power variation vs temp and supply,
with optimum differential load,
VDD > 1.8 V
–2.5
—
0.5
dB
Transmit power step size
from –13 to 6.5 dBm
—
0.25
—
dB
OOK mode
0.34
—
10.7
us
2
Frequency Range (FRF)
Frequency Noise (rms)3
Phase Noise @ 915 MHz
Frequency Tuning Time
Carrier Frequency Accuracy
Frequency Error Contribution
with External Crystal
Transmit Power4
PA Edge Ramp Rate
Programmable Range
Data Rate
FSK Deviation
OOK Modulation Depth
Antenna Tuning Capacitive
Range (Differential)
Allen deviation, measured across
1 ms interval
10 kHz offset
100 kHz offset
1 MHz offset
0 °C ≤ TA ≤ 70 °C
–40 °C ≤ TA ≤ 85 °C
Maximum programmed Tx power,
with optimum differential load, VDD
> 2.2 V
Minimum programmed TX power,
with optimum differential load,
VDD > 2.2 V
Power variation vs temp and supply,
with optimum differential load,
VDD > 2.2 V
OOK
FSK
Max frequency deviation
Deviation resolution
Deviation accuracy
315 MHz
0.1
—
50
0.1
—
100
—
275
—
—
2
—
±(4 ppm + 2% pk-pk target FSK
deviation in ppm)
60
—
—
2.4
—
12.5
kbaud
kbaud
ppm
ppm
ppm
dB
pF
Notes:
1. All specifications guaranteed by production test unless otherwise noted. Production test conditions and max limits are
listed in "1.1. Definition of Test Conditions" on page 7.
2. The frequency range is continuous over the specified range.
3. The frequency step size is limited by the frequency noise.
4. Optimum differential load is equal to 4 V/(11.5 mA/2 x 4/PI) = 550 Therefore the antenna load resistance in parallel
with the Si4012 differential output resistance should equal 600 
Rev 1.1
5
Si4012
Table 4. Low Battery Detector Characteristics*
(TA = 25° C, VDD = 3.3 V, RL = 550 , unless otherwise noted)
Parameter
Test Condition
Min
Typ
Max
Unit
—
2
—
%
Battery Voltage Measurement Accuracy
*Note: All specifications guaranteed by production test unless otherwise noted. Production test conditions and max limits are
listed in "1.1. Definition of Test Conditions" on page 7.
Table 5. Optional Crystal Oscillator Characteristics*
(TA = 25° C, VDD = 3.3 V, RL = 600 , unless otherwise noted)
Parameter
Crystal Frequency Range
Input Capacitance (GPIO0)
Crystal ESR
Start-Up Time
Test Condition
GPIO0 configured as a crystal oscillator;
XO_LOWCAP=1
GPIO0 configured as a crystal oscillator;
XO_LOWCAP=0
GPIO0 configured as a crystal oscillator;
XO_LOWCAP=1
GPIO0 configured as a crystal oscillator;
XO_LOWCAP=0
Crystal oscillator only,
60 mH motional arm inductance
Min
10
—
Typ
—
3
Max
13
—
—
5.5
—
—
—
120
—
—
80
—
9
50
Unit
MHz
pF
pF


ms
*Note: All specifications guaranteed by production test unless otherwise noted. Production test conditions and max limits are
listed in "1.1. Definition of Test Conditions" on page 7.
Table 6. Thermal Conditions
Parameter
Symbol
Value
Unit
Ambient Temperature
TA
–40 to 85
C
Junction Temperature
TOP
–40 to 90
C
Storage Temperature
TSTG
–55 to 125
C
Symbol
Value
Unit
VDD
–0.5 to 3.9
V
IIN
10
mA
VIN
–0.3 to (VDD + 0.3)
V
Table 7. Absolute Maximum Ratings1,2
Parameter
Supply Voltage
Input Current3
Input Voltage4
Notes:
1. Permanent device damage may occur if the absolute maximum ratings are exceeded. Functional operation should be
restricted to the conditions as specified in the operational sections of this data sheet. Exposure beyond recommended
operating conditions for extended periods may affect device reliability.
2. Handling and assembly of these devices should only be done at ESD-protected workstations.
3. All input pins besides VDD.
4. For GPIO pins configured as inputs.
6
Rev 1.1
Si4012
1.1. Definition of Test Conditions
Production Test Conditions:

TA = +25 °C.

VDD = +3.3 VDC.
TX output power measured at 100 MHz.
 All RF output levels referred to the pins of the Si4012 (not the RF module).

Qualification Test Conditions:

TA = –40 to +85 °C.

VDD = +1.8 to +3.6 VDC.

All RF output levels referred to the pins of the Si4012 (not the RF module).
Rev 1.1
7
Si4012
2. Typical Application Schematic
See Note 1
Optional
CR2032
Coin Cell
1.8 to 3.6 V
See Note 2
C3
D1
X1
1 XTAL
SDA 10
2 GND
SCL 9
3 TXM
C2
Si4012
SDN 8
4 TXP
nIRQ 7
5 VDD
LED 6
R2
R1
Host MCU
C1
1 µF
Loop Antenna
Notes:
1. The Si4012 has internal 50 k pull-up resistors. Additional optional external pull-up resistors may be added should the
board design required it.
2. See note about how to choose the value of C3 in "5.2.10. PROPERTY: XO_CONFIG" on page 39.
8
Rev 1.1
Si4012
3. Functional Description
Si4012
Digital Logic
RF Analog Core
Antenna Tune
OOK
SMBus
Interface
Host
MCU
FSK
Modulator
Divider
PA
LPOSC
VA
TXP
TXM
LCOSC
TX
255 Byte
Data FIFO
LED
XTAL
Auto
Tune
Digital
Controller
VD
Register
Bank
XTAL
OSC
LDO
POR
BANDGAP
VDD
GND
Battery
Monitor
Figure 1. Si4012 Functional Block Diagram
The Si4012 is a fully-integrated, crystal-less, sub-GHz CMOS RF transmitter offering industry-leading RF
performance, high integration, flexibility, low BOM, small board area, and ease of design.
The device is designed to operate with any host MCU via a serial interface while optimized for battery-powered
applications. The Si4012 operates from voltages ranging from 1.8 to 3.6 V and offers an ultra-low standby current
consumption of less than 10 nA.
The embedded power amplifier can be programmed to supply from –13 dBm up to +10 dBm, while the patented
automatic antenna tuning circuit ensures that the resonant frequency and impedance matching between the PA
output and the connected antenna are configured for optimum transmit efficiency and low harmonic content.
Users may configure the device for either FSK or OOK modulation with supported symbol rates of up to 100 kbps.
To ensure the lowest system cost, the Si4012 can be used without an external crystal or frequency reference by
leveraging Silicon Labs' patented and proven crystal-less oscillator technology. This technology offers better than
±150 ppm carrier frequency stability over the temperature range of 0 to +70 °C and ±250 ppm carrier frequency
stability over the industrial temperature range of –40 to + 85 °C. No production alignments are necessary since all
RF functions are integrated into the device.
Rev 1.1
9
Si4012
4. Host MCU Interface
4.1. SMBus Interface
The SMBus interface is implemented as a bidirectional 2-wire interface (SCL, SDA) with the host configured as
master and the Si4012 configured as slave. Both standard (100 kbps) and fast (400 kbps) modes are supported
with 7-bit addressing. The default device address is 1110000x, where x is the R/W bit.
4.1.1. Design Recommendation
In designs with multiple SMBus devices, it is recommended to use separate SMBus buses where possible since all
attached SMBus devices will wake on bus traffic to confirm address. This process can lead to better battery life
compared to systems with single-bus designs.
4.2. SMBus Flow Control
The SCL and SDA pins are configured as open drain requiring external pull-up resistors. Flow control is
implemented using the open drain configuration as shown below.
Figure 2. WRITE Operation from Master to Slave
The data (SDA) pin never changes when SCL = 1 during bit data transfers. If it changes, it indicates a START or
STOP condition generated by the master/host. After the START condition, a 7-bit address is sent to the
Si4012/slave by the host/master, followed by a single bit determining what is going to drive SDA (i.e., a write or
read operation). For a WRITE operation, the master drives the following SDA bits, and the slave sends ACK/NAK
bits. For a READ operation, the slave drives the data bits, and the master responds with ACK/NACK.
Figure 2 shows a write operation from MASTER to SLAVE. Shortly after the R/W bit is received, the SLAVE device
holds the SCL line low (blue line), thus stalling the master. The master will detect when SCL is released by the
slave and will clock in the ACK/NACK bit from the slave (ACK shown above). By this, the slave (Si4012) can
service each incoming byte and manage flow control to the host.
4.3. Host Interrupts
An nIRQ line from the Si4012 to the host is used to issue interrupts to the host. The host can then read the interrupt
status and clear interrupts from the Si4012 via the SMBus interface.
10
Rev 1.1
Si4012
4.4. Operating Mode Control
NOTE1, 2
TUNE with XO
5
TX_START
NOTE1
Yes
Yes
No
SHUTDOWN
1
SDN=1?
STANDBY
2
CHANGE_STATE /
Tx_START
SMBus or
SDN
(NOTE 4)
TX
6
XO in CHIP_CONFIG?
No
CHANGE_STATE
NOTE1, 3
TX_START
TUNE without
XO
4
SENSOR
3
NOTE1
NOTE1
Figure 3. State Machine Diagram
Transition Notes
1. Transition to any state (including SHUTDOWN) using the CHANGE_STATE command. Alternatively, transition to
SHUTDOWN using the SDN pin.
2. If a CHANGE_STATE command to the XO TUNE state is issued (even if already in the XO TUNE state), then an XO
TUNE operation is carried out immediately. This enables close control of timing (fastest execution) for a subsequent
TX_START command. In the TUNE state, a tune operation is carried out in the interval specified in TUNE_INTERVAL.
3. Transition to end state specified in the TX_START command or TX_STOP command.
4. If coming out of the SHUTDOWN via SMBus, an SMBus “wake-up” byte is required. This byte is discarded, and normal
SMBus communication can proceed after the power on reset (ipor) is asserted to the host.
State Descriptions
The Si4012 has six power modes, which are summarized below. Further details on the IC configuration in these
modes can be found in "5.1.5. COMMAND: CHANGE_STATE" on page 22.





SHUTDOWN—Lowest current consumption; the majority of hardware blocks are powered down.
STANDBY—Low power state with fast SMBus response.
SENSOR—Same as STANDBY, but the battery is measured periodically.
TUNE—Periodic tuning state. A tune is performed on any CHANGE_STATE to TUNE command and then
periodically based on the interval defined in TUNE_INTERVAL. This provides faster transition to TX. If XO is
enabled, XO will be used during tune operation.
TX—Transmission state.
Rev 1.1
11
Si4012
Table 8. Power Modes
IVDD
Response
Time to TX
(without XO)
Response Time
to TX
(with XO Early
Enable)
10 nA
22.2 ms
22.2 ms
Circuit Blocks
Mode
Shutdown
Digital
SMBUS
LDO
OFF
OFF
SYS
CLK
LBD
OFF
OFF OFF OFF OFF OFF
LC
XTAL DIV
PA
Standby
ON
SLOW OFF OFF OFF OFF OFF 600 µA3
6.6 ms
6.6 ms4
Sensor
ON
FAST
ON OFF OFF OFF OFF 610 µA3
6.6 ms
6.6 ms4
ON
FAST
OFF ON1 OFF ON1 ON1
Note2
370 µs
—
ON
FAST
OFF ON1
Note2
—
370 µs
Tune
without
XO
Tune
with XO
ON
ON
ON1 ON1
Notes:
1. The LC, DIV, and PA are turned on as needed during the Tune operation.
2. See the tune section from Tune Start to PA Tune in the charts below for current consumption in Tune with XO and Tune
without XO.
3. The current consumption at Standby and Sensor does not include the power consumed by the internal XO circuitry. XO
should be turned off with SET_PROPERTY/CHIP_CONFIG to save power if external XO is not used or if tuning is not
happening soon when external XO is present.
4. The response time assumes external XO stays enabled prior to TX.
12
Rev 1.1
Si4012
Figure 4. Current Consumption with XO
Figure 5. Current Consumption with XO (Upscaled between 30 and 80 ms)
Rev 1.1
13
Si4012
Figure 6. Current Consumption without XO
Figure 7. Current Consumption without XO (Upscaled between 30 and 80 ms)
14
Rev 1.1
Si4012
5. Command Structure
The Si4012 has been designed to complete commands in the shortest time possible and to support both polled or
event driven (interrupt based) modes. For longer operations, commands are implemented as launch commands.
When the result of the launched command is completed, status is returned to the host via host polling or as an
interrupt (if enabled). The status is obtained over the SMBus.
For example, when a TX_START command is launched, the Si4012 will parse the command, check it for errors,
and return the status to the host immediately; it will also start the TX process. The host can then either poll for an
error or “packet sent” or receive an interrupt on nIRQ.
All host commands consist of a 1-byte opcode followed by 0 or more arguments. All responses from the Si4012
consist of a 1-byte top level status followed by 0 or more data values.
Command Structure:
Bit
7
6
5
4
3
2
1
0
5
4
3
2
1
0
CMD
ARG1
ARG2
…
ARGn
Response Structure:
Bit
STATUS
7
6
CTS
Err[6:0]
DATA1
DATA2
…
DATAn
A CTS (Clear to Send) indicates that the Si4012 has received the command and that the host can send another
command. The CTS does not necessarily mean the command has been processed. The host should poll interrupt
status or use interrupts (nIRQ) to get execution status for deferred operations.
Err[6:0] indicates an error has occurred if it is non-zero. See the “error codes” section for a full list of available error
codes.
Rev 1.1
15
Si4012
GET_INT_STATUS Command
S
SLA
WA
CMD
A P S
SLA
R A
STATUS
A
DATA1
N P
TX_STOP Command
S
SLA
WA
CMD
A
ARG1
Underlined items are sent from the Si4012 (slave)
A
ARG2
A P S
S = Start
W = Write (1bit)
R = Read (1bit)
A = Acknowledge
N = Not-Acknowledge
P = Stop
SLA
Figure 8 above demonstrates two examples using the SMBus command sequence.
Rev 1.1
STATUS
SLA = Slave Address (7 bits)
CMD = Command opcode (8bit)
ARG = Command Argument (8bit)
DATA = Data Value (8bit)
STATUS = Top Level Status (8bit)
Figure 8. SMBus Sequence Example
16
R A
N P
Si4012
5.1. Commands
Table 9 lists the commands available via the SMBus and described in the following sections.
Table 9. Commands Available via SMBus
Section
Command
Description
5.1.1
Get_Rev
Device revision information
5.1.2
Set_Property
Sets device properties
5.1.3
Get_Property
Gets device properties
5.1.4
LED_CTRL
LED Control
5.1.5
Change_State
Configures device mode
5.1.6
Get_State
Get device mode
5.1.7
TX_Start
Start data transmission
5.1.8
Set_Int
Enable interrupts
5.1.9
Get_Int_Status
Read & clear interrupts
5.1.10
Init_FIFO
Clears Tx FIFO
5.1.11
Set_FIFO
Stores data in FIFO for Tx
5.1.12
TX_Stop
Stops transmission
5.1.13
Get_Bat_Status
Gets battery status
Rev 1.1
17
Si4012
5.1.1. COMMAND: GET_REV
Purpose:
Return product and revision information for the device.
ARG:
None
DATA:
Product ID, Revision ID.
Command:
GET_REV
Command
7
6
5
4
CMD
3
2
1
0
0x10
Response:
18
GET_REV
Reply
7
STATUS
CTS
6
5
4
3
2
Err
DATA1
ProdId[31:24]
DATA2
ProdId[23:16]
DATA3
ProdId[15:8]
DATA4
ProdId[7:0]
DATA5
RevisionID_RMIDU[47:40]
DATA6
RevisionID_RMIDU[39:32]
DATA7
RevisionID_RMIDL[31:24]
DATA8
RevisionID_RVID[23:16]
DATA9
RevisionID_FWIDU[15:8]
DATA10
RevisionID_FWIDL[7:0]
Rev 1.1
1
0
Si4012
5.1.2. COMMAND: SET_PROPERTY
Purpose:
ARG:
DATA:
Command:
Set a property common to one or more commands. These are similar to parameters for a
command but are not expected to change frequently and may be controlled by the higher
software layers. Setting properties may not cause the device to take immediate action,
however the property will take effect once a command which uses it is issued. See the
“Properties” section of this document for details on properties.
PROP_ID[7:0]— Selects the property to set.
DATA[n:0]—Value of the property. The length varies depending on the PROP_ID, up to 6-byte
in big Endian can be specified.
None
SET_PROPERTY
Command
7
6
5
4
3
2
1
0
CMD
0x11
ARG1
PROP_ID[7:0]
ARG2
PROP_DATA1, MSB of Property 's value
ARG3
PROP_DATA 2
ARG4
PROP_DATA 3
ARG5
PROP_DATA 4
ARG6
PROP_DATA5
ARG7
PROP_DATA6
Response:
SET_PROPERTY
Reply
7
STATUS
CTS
6
5
4
3
2
1
0
Err
Rev 1.1
19
Si4012
5.1.3. COMMAND: GET_PROPERTY
Purpose:
ARG:
DATA:
Return the value of a specified property. See "5.2. Properties" on page 32 for details on
properties.
PROP_ID[7:0]—Selects the property to retrieve.
DATA[n:0] —Value of the specified property, the length varies depending on the PROP_ID, up
to 6 bytes
Command:
GET_PROPERTY
Command
7
6
5
4
3
2
CMD
0x12
ARG1
PROP_ID[7:0]
1
0
1
0
Response:
20
GET_PROPERTY
Reply
7
STATUS
CTS
6
5
4
3
2
Err
DATA1
PROP_DATA1, MSB of Property's value
DATA2
PROP_DATA 2
DATA3
PROP_DATA 3
DATA4
PROP_DATA 4
DATA5
PROP_DATA5
DATA6
PROP_DATA6
Rev 1.1
Si4012
5.1.4. COMMAND: LED_CTRL
Purpose:Turn on/off LED if LED driver is enabled.
ARG:
LedOn—If LED driver is enabled, turn LED on if set, otherwise, turn LED off. If LED driver is
not enabled, LedOn is ignored if set.
DATA:
None
Command:
LED_CTRL
Command
7
6
5
4
CMD
3
2
1
0
0x13
ARG1
LedOn
Response:
LED_CTRL
Reply
7
STATUS
CTS
6
5
4
3
2
1
0
Err
Notes: If LEDOn is set, the Si4012 checks the LedIntensity setting set by the host in SET_PROPERTY/LED_INTENSITY. If the
LedIntensity is 0, LED driver will be disabled. Err is set to 0x0A to report this condition.
Rev 1.1
21
Si4012
5.1.5. COMMAND: CHANGE_STATE
Change state to IDLE or SHUTDOWN. The device will change to the specified state at the
earliest time possible. If changing into IDLE state, ARG2 specifies the idle mode.
Purpose:
Table 10.
IVDD
Response
Time to TX
(without XO)
Response Time
to TX
(with XO Early
Enable)
15 nA
22.2 ms
22.2 ms
Circuit Blocks
Mode
Shutdown
Digital
SMBUS
LDO
OFF
OFF
SYS
CLK
LBD
OFF
OFF OFF OFF OFF OFF
LC
XTAL DIV
PA
Standby
ON
SLOW OFF OFF OFF OFF OFF 600 µA3
6.6 ms
6.6 ms4
Sensor
ON
FAST
ON OFF OFF OFF OFF 610 µA3
6.6 ms
6.6 ms4
ON
FAST
OFF ON1 OFF ON1 ON1
Note2
370 µs
—
ON
FAST
OFF ON1
Note2
—
370 µs
Tune
without
XO
ON
Tune
with XO
ON
ON1 ON1
Notes:
1. The LC, DIV and PA are turned on as needed during the Tune operation.
2. See the tune section from Tune Start to PA Tune in the charts below for current consumption in Tune with XO and Tune
without XO.
3. The current consumption at Standby and Sensor does not include the power consumed by the internal XO circuitry. XO
should be turned off with SET_PROPERTY/CHIP_CONFIG to save power if external XO is not used or if tuning is not
happening soon when external XO is present.
4. The response time assumes external XO stays enabled prior to TX.
ARG:


DATA:
22
State[1:0]—state to transition to.
00 IDLE
– Go to idle mode state using the idle mode specified.
01 SHUTDOWN
– Go to shutdown state.
10–11
– Reserved.
IdleMode[2:0]—IDLE mode if changing to idle state.
000 Standby – Low Power State
001 Sensor
– Enable Low Battery Detector
010 Tune
– Periodic tuning
011–111
– Reserved
None
Rev 1.1
Si4012
Command:
CHANGE_STATE
Command
7
6
5
4
3
CMD
2
1
0
0x60
ARG1
State[1:0]
ARG2
Response::
IdleMode[2:0]
None if changing to SHUTDOWN, otherwise
CHANGE_STATE
Reply
7
STATUS
CTS
6
5
4
3
2
1
0
Err
Notes:
1. Changing state among different idle modes is allowed.
2. State can also be changed via TX_START/TX_STOP.
3. An alternative way to transition to SHUTDOWN is by setting SDN pin to high.
4. SMBus activity or setting SDN pin to low will take the device out of shut down state.
Rev 1.1
23
Si4012
5.1.6. COMMAND: GET_STATE
Get chip state and status.
None
Purpose:
ARG:
DATA:

State[1:0]—current state
00 Idle
01 Reserved
10 TX





AutoTX—current AutoTX setting
IdleMode[2:0]. If State is Idle
000 Standby
– Low power state
001 Sensor
– Enable Low Battery Detector
010 Tune
– Periodic tuning
DTMod[1:0] if State is TX
00
– FIFO Mode
01
– CW Mode
10
– PN9-0 Mode
11
– PN9-1 Mode
ActTxPktSize—actual packet sent in the last transmission
PrevError —error code if error occurred in the previous operation
Command:
GET_STATE
Command
7
6
5
4
CMD
3
2
1
0
0x61
Response:
GET_STATE
7
STATUS
CTS
6
5
4
2
1
0
Err
DATA1
AutoTX
DATA2
24
3
State[1:0]
IdleMode[2:0]/DTMod[1:0]
DATA3
ActTxPktSize[15:8]
DATA4
ActTxPktSize[7:0]
DATA5
PrevError
Rev 1.1
Si4012
5.1.7. COMMAND: TX_START
Start transmission and go to a designated state after the packet is transmitted. This is an
asynchronous operation. Transmission may not have been started when response is sent
back the host.
Purpose:
ARG:
Packet Size[15:0] to be transmitted
State to transition to when transmission is completed.
AutoTX—Enable/Disable FIFO Auto-TX
1: Auto-Transmit Enabled.
Transmission will start when the FIFO level reaches the auto transmit threshold
specified in ffautotxthr in FIFO_THRESHOLD. If ffautotxthr=0, transmission will start
immediately.



0:Auto-Transmit Disabled.
Transmit will start immediately until the data specified in the PacketSize is
transmitted, or all the data in the FIFO is exhausted, whichever occurs first. If the
FIFO becomes empty before the specified packet length is transmitted a FIFO
underflow error will occur.
State[1:0]—State to transition to when transmission is completed.
00: IDLE—Go to idle state when the packet transmission completes based on the idle
mode.

01: SHUTDOWN—Go to shutdown state when the packet transmission completes.
10–11: Reserved.
IdleMode[2:0] if State is Idle; DTmod[1:0] if State is TX.
Idle Mode
000 Standby
– Low power state

001 Sensor
– Enable Low Battery Detector
010 Tune
– Periodic tuning
DTMod[1:0] 00
01

DATA:
Command:
– FIFO Mode
– CW Mode
10
– PN9-0 Mode
11
– PN9-1 Mode
Current data size in the FIFO when TX_START is received.
TX_START
Command
7
6
5
4
3
2
CMD
0x62
ARG1
PacketSize[15:8]
ARG2
PacketSize[7:0]
ARG3
AutoTX
ARG4
1
0
State[1:0]
IdleMode[2:0]
ARG5
DTMod[1:0]
Rev 1.1
25
Si4012
Response:
TX_START
Reply
STATUS
DATA1
Notes:
7
6
5
4
CTS
3
2
1
0
Err
ActualDataSize[7:0]
Si4012 allows larger packet sizes than the FIFO. It also allows the packet size to be greater than the data
available in the FIFO.
If the packet size is less than the data stored in the FIFO, the data specified in packet size will be
transmitted in one transmission leaving leftover data in the FIFO. The size to be transmitted will be
specified in the DATA field.
 If the packet size is larger than the data stored in the FIFO size, when TX_START is received, all
the data in the FIFO will be transmitted. The size of the data currently available in the FIFO will be
specified in the DATA field. If auto transmit is enabled, the Si4012 will automatically transmit data
when the TX FIFO level reaches the auto transmit level dictated by ffautotxthr without another
explicit TX_START until the data specified in PacketSize is all transmitted. An interrupt is triggered
with pksent set in the interrupt status. AutoTX state will be cleared when packet is successfully
transmitted or FIFO underflow has happened. If auto transmit is not enabled, the Si4012 will start
transmitting what’s available in the FIFO until FIFO becomes empty. The host is responsible for
keeping FIFO from underflow by supplying the balance of the data needed for the packet size.
 If the packet size equals to the data stored in the FIFO size, all the data in the FIFO will be
transmitted, ActualDataSize will be equal to the packet size.
The host should poll ipksent using GET_INT_STATUS to check when the packet has been sent, or
monitor the pksent interrupt.

26
Rev 1.1
Si4012
5.1.8. COMMAND: SET_INT
Purpose:
Enable interrupts.
ARG:
 enffunder—Enable FIFO Underflow
 entxffafull—Enable TX FIFO Almost Full
 entxffaem—Enable TX FIFO Almost Empty

enffover—Enable FIFO Overflow
 enpksent—Enable Packet Sent
 enlbd—Enable Low Battery Detect
DATA:
None
Command:
SET_INT
Command
7
6
5
4
CMD
ARG1
3
2
1
0
0x63
enffunder
entxffafull
entxffaem
enffover
enpksent
enlbd
entune
reserved
6
5
4
3
2
1
0
Response:
SET_INT
Reply
7
STATUS
CTS
Err
Rev 1.1
27
Si4012
5.1.9. COMMAND: GET_INT_STATUS
Read the interrupt status and clear interrupts.
None
Purpose:
ARG:
DATA:

iffunder—FIFO Underflow
itxffafull—TX FIFO Almost Full

itxffaem—TX FIFO Almost Empty

iffover—FIFO Overflow
ipksent—Packet Sent




ilbd—Low Battery Detect
itune—tune complete
ipor—Power On Reset
Command:

GET_INT_STATUS
Command
7
6
5
CMD
4
3
2
1
0
3
2
1
0
itune
ipor
0x64
Response:
GET_INT_STATUS
Reply
7
STATUS
CTS
DATA1
iffunder
6
5
4
Err
itxffafull
itxffaem
iffover ipksent
ilbd
Notes: Calling the GET_INT_STATUS command will clear all interrupts and reset the nIRQ pin. Therefore, the host must note
any interrupt bits that are set and take the necessary actions to service these interrupts.
TX FIFO Almost Full and TX FIFO Almost Empty Interrupts
These interrupts are triggered upon transition at the respective thresholds. Therefore, if an interrupt is generated for
FIFO Almost Empty and then cleared by a call to GET_INT_STATUS, another interrupt will NOT be generated if the FIFO
remains below the Almost Empty threshold. The FIFO must go above the threshold and then fall back to the threshold
before another Almost Empty threshold is generated and sent to the host.
Low Battery Detect (LBD) Interrupt
The LBD is cleared when the host calls GET_INT_STATUS. The Si4012 regenerates lbd interrupts periodically when the
LBD timer expires.
28
Rev 1.1
Si4012
5.1.10. COMMAND: INIT_FIFO
Purpose:
Clear the TX FIFO by clearing the FIFO with 0s and initializing the FIFO head and tail pointer
ARG:
None
DATA:
None
Command:
INIT_FIFO
Command
7
6
5
4
CMD
3
2
1
0
0x65
Response:
INIT_FIFO
Reply
7
STATUS
CTS
6
5
4
3
2
1
0
Err
5.1.11. COMMAND: SET_FIFO
Purpose:
Store data from the command interface into FIFO for transmission.
ARG:
Up to 255 bytes
DATA:
None
Command:
SET_FIFO
Command
7
6
5
4
3
2
CMD
0x66
ARG1
FIFO_DATA1[7:0]
ARG2
FIFO_DATA2[7:0]
1
0
…
ARGn
FIFO_DATAn[7:0]
Response:
SET_FIFO
Reply
7
STATUS
CTS
6
5
4
3
2
1
0
Err
If ARG exceeds the FIFO size of 255 bytes, Err is set to 0x08 (Too many arguments).
The Si4012 raises the ‘FIFO Almost Full’ or ‘FIFO Almost Empty’ interrupt when appropriate. If auto
transmit is enabled and the FIFO level is above the auto transmit threshold, the Si4012 will start transmit
automatically.
Rev 1.1
29
Si4012
5.1.12. COMMAND: TX_STOP
Purpose:
Stop transmission and go to designated state (this command can also be used to abort
existing transmissions)
ARG:

State[1:0]—State to transition to when transmission is stopped.
00 IDLE
– Go to idle state when the packet transmission is stopped based
on the idle mode.
01 SHUTDOWN – Go to shutdown state when the packet transmission is stopped.
10-11

– Reserved.
IdleMode[2:0] —IDLE mode if changing to idle state.
000 Standby – Low power state
001 Sensor
– Enable Low Battery Detector
010 Tune
– Periodic tuning
011–111
– Reserved
DATA:
None
Command:
TX_STOP
Command
7
6
5
4
3
CMD
2
1
0x67
ARG1
State[1:0]
ARG2
Response:
30
0
IdleMode[2:0]
None if changing to SHUTDOWN, otherwise
TX_STOP
Reply
7
STATUS
CTS
6
5
4
3
2
1
Err
Rev 1.1
0
Si4012
5.1.13. COMMAND: GET_BAT_STATUS
Purpose:
Get the battery status such as current VDD voltage.
ARG: Load Option—0: Battery voltage is measured immediately without any load.
>0: battery voltage is measured after major power hungry parts of the device are temporarily
turned on. These parts are turned off when measurement is done after LoadWaitTime x 17 µs
of wait time.
DATA:
BTV[15:0]—Battery voltage in mV
Command:
GET_BAT_STATUS
Command
7
6
5
4
3
CMD
0x68
ARG
Load/Wait Time
2
1
0
Response:
GET_BAT_STATUS
Reply
7
STATUS
CTS
6
5
4
3
2
1
0
Err
DATA1
BTV[15:8]
DATA2
BTV[7:0]
Notes:
1. If tuning is in progress when this API is received, Err is set to 0x11 (Device busy).
2. In sensor mode, Si4012 reads battery voltage periodically with no load based on the interval set in
SET_PROPERTY/LBD_CONFIG.
Rev 1.1
31
Si4012
5.2. Properties
5.2.1. Properties Summary
Section
Property
ID
Property
Description
5.2.2
0x10
CHIP_CONFIG
5.2.3
0x11
LED_INTENSITY
5.2.4
0x20
5.2.5
0x21
TUNE_INTERVAL
5.2.6
0x30
FIFO_THRESHOLD
FIFO almost full, almost empty and auto
transmit threshold
5.2.7
0x31
BITRATE_CONFIG
Data rate and ramp rate if OOK
5.2.8
0x40
TX_FREQ
Carrier frequency for transmission if OOK,
upper frequency for transmission if FSK
5.2.9
0x41
LBD_CONFIG
Low battery voltage threshold that triggers
interrupt, battery voltage sampling interval
5.2.10
0x50
XO_CONFIG
XO frequency and low capacitance control
5.2.11
0x60
PA_CONFIG
PA maximum current driver, PA level, cap,
alpha and beta steps
FSK Dev polarity, LSB first, XO
LED current drive strength
MODULATION_FSKDEV MOD type and FSK deviation if FSK
Tuning interval in seconds
The format table in this section applies to the ARG field of SET_PROPERTY after PROP_ID and DATA field of
GET_PROPERTY. I.e., PROP_ID corresponds to ARG1, PROP_DATA1 corresponds to ARG2 or DATA1,
PROP_DATA2 corresponds to ARG3 or DATA 2, etc.
Default is the value of a property the Si4012 defaults to if the host does not set the property via SET_PROPERTY.
Fields correspond to the PROP_DATA.
32
Rev 1.1
Si4012
5.2.2. PROPERTY: CHIP_CONFIG
Purpose:
Property:
Default:
Fields:

Select FSK deviation polarity, LSB first and external crystal.
0x10
0x08
FskDevPola—FSK deviation polarity.
0:
1:


+deviation when modulation data is 1 and –dev for Din = 0
+dev for Din = 0 and –dev for Din = 1
LsbFirst—When set, LSB is transmitted first. Otherwise, MSB is transmitted first.
UseXo—Use external crystal if set
Format:
CHIP_CONFIG
Property
7
6
5
4
PROP_ID
3
2
UseXo
LsbFirst
1
0
0x10
PROP_DATA1
FskDevPola
Note: If the crystal is not populated on the board, there will still be a 1.4 mA current draw penalty for the XO circuitry on the
Si4012. The host should send SET_PROPERTY/CHIP_CONFIG with bit 3 cleared to turn off the XO circuitry.
Rev 1.1
33
Si4012
5.2.3. PROPERTY: LED_INTENSITY
Purpose:
Property:
Default:
Fields:




LED current drive strength
0x11
0x00
LedIntensity [1:0]—LED intensity
00: LED off
01: 0.37 mA
10: 0.60 mA
11: 0.97 mA.
Format:
LED_INTENSITY
Property
7
6
5
4
PROP_ID
3
2
1
0
0x11
PROP_DATA1
LedIntensity[1:0]
5.2.4. PROPERTY: MODULATION_FSKDEV
Modulation type and FSK deviation.
0x20
0x013F
Purpose:
Property:
Default:
Fields:

modutype—Modulation type, default 1.
0:
1:

OOK
FSK
biFskDev[6:0] –biFSKDev if FSK, default 63.
Format:
MODULATION_FSKDEV
Property
7
6
5
PROP_ID
4
3
2
1
0
0x20
PROP_DATA1
ModuType
PROP_DATA2
biFskDev[6:0]
Note: If SET_PROPERTY\DATA_RATE is sent and data rate is set to a value above 500, but modulation is set to OOK, Err will
be set in the response with ‘Data rate out of range’ error code. The biFSKDev parameter is attained either via the WDS
Chip Configurator utility or by using the Si4012 calculation spreadsheet.
34
Rev 1.1
Si4012
5.2.5. PROPERTY: TUNE_INTERVAL
Tune interval used for periodic tuning.
0x21
0x000A
Purpose:
Property:
Default:
Fields:

TuningItv[15:0]—tuning interval in seconds
Format:
TUNE_INTERVAL Property
7
6
5
4
3
2
PROP_ID
0x21
PROP_DATA1
TuningItv[15:8]
PROP_DATA2
TuningItv[7:0]
1
0
Note: The tuning interval specifies the frequency in which the device performs periodic tuning in tune state and in CW Mode.
In CW or PN9 mode, if TuningItv is 0, no tuning will be performed. In FIFO mode, if Si4012 is in tune state but TuningItv
is set to 0 by the host, tuning will be performed every 10 seconds.
5.2.6. PROPERTY: FIFO_THRESHOLD
FIFO threshold settings—FIFO Almost Empty, FIFO Almost Full and auto transmit level.
0x30
Purpose:
Property:
Fields:

ffafullthr[7:0]—FIFO Almost Full Threshold in bytes, default 0xF0

ffaemthr[7:0]—FIFO Almost Empty Threshold in bytes, default 0x10

ffautotxthr[7:0]—FIFO Threshold controlling when to start auto transmit, default 0x20 bytes.
Format:
FIFO_THRESHOLD
Property
7
6
5
4
3
PROP_HI
0x30
PROP_DATA1
ffafullthr[7:0]
PROP_DATA2
ffaemthr[7:0]
PROP_DATA3
ffautotxthr[7:0]
2
1
0
Notes:Ffautotxthr applies only when auto transmit is enabled. If ffautotxthr is set to 0, the Si4012 transmits whenever data
becomes available in the FIFO. This field is ignored when auto transmit is disabled.
Rev 1.1
35
Si4012
5.2.7. PROPERTY: BITRATE_CONFIG
Purpose:
Property:
Fields:


Data rate and ramp rate if OOK.
0x31
DataRate[9:0]—Data rate in units of 100 bps, ranging from 1 to 1000 for FSK and 1 to 500 for
OOK. Default 0x60.
RampRate[3:0]—Ramp rate in µs. 1, 2, 4, or 8 is supported. Default 2.
Format:
DATA_RATE
Property
7
6
5
PROP_ID
4
3
2
1
0
0x31
PROP_DATA1
DataRate[9:8]
PROP_DATA2
DataRate[7:0]
PROP_DATA3
RampRate[3:0]
Notes:The data rate won’t take into effect until transmission time.
If SET_PROPERTY\MODULATION_CONFIG is sent and modulation is set to OOK by the host, but DataRate is set to
> 500, Err will be set in the response.
The default modulation type is FSK. If SET_PROPERTY \MODULATION_FSKDEV is not sent, any value above 1000
will result in Err being set in the response—0x0D (Data Rate out of Range).
RampRate is ignored if ModuType in MODULATION_FSKDEV is FSK.
In OOK mode, any value except 1, 2, 4, or 8 will result in Err 0x04—bad parameter in ARG4.
In FSK mode, the minimum data rate is 200 bps.
The ramp rate parameter dictates the minimum data rate. The Si4012 will set Err to 0x10 (data rate not supported) if the
value is smaller than the minimum data rate on the specified Ramp Rate.
36
Ramp Rate
1
2
4
8
Min Data Rate (bps)
300
200
200
100
Rev 1.1
Si4012
5.2.8. PROPERTY: TX_FREQ
Purpose:
Property:
Default:
Fields:
Carrier frequency for transmission if OOK, upper frequency if FSK and center frequency in CW
mode.
0x40
0x19ddc7c8 for 433.965 MHz (433.92 MHz+90 kHz/2)
TxFreq[31:0]—Ranging from 27 MHz to 960 MHz.
OOK: Carrier Frequency (Hz)
FSK: Upper Frequency (Hz)
CW Mode: Center Frequency (Hz)
Format:
TX_FREQ
Property
7
6
5
4
3
PROP_ID
0x40
PROP_DATA1
TxFreq[31:24]
PROP_DATA2
TxFreq[23:16]
PROP_DATA3
TxFreq[15:8]
PROP_DATA4
TxFreq[7:0]
2
1
0
Note: Frequency out of range in SET_PROPERTY will result in Err = 0x0E (Frequency out of Range) in the response.
Rev 1.1
37
Si4012
5.2.9. PROPERTY: LBD_CONFIG
Purpose:
Property:
Fields:
Default:
Format:
Battery voltage threshold used to determine when to raise Low Battery Detector Interrupt,
battery voltage sampling interval.
0x41
LbdThr[15:0]—Battery voltage threshold in mV. Default 0x09C4 or 2500 mV.
SampleInterval[15:0]—Battery voltage sampling interval in seconds.
0x3C or 60 seconds.
LBD_CONFIG Property
38
7
6
5
4
3
PROP_ID
0x41
PROP_DATA1
LbdThr[15:8]
PROP_DATA2
LbdThr[7:0]
PROP_DATA3
SampleInterval[15:8]
PROP_DATA4
SampleInterval[7:0]
Rev 1.1
2
1
0
Si4012
5.2.10. PROPERTY: XO_CONFIG
Purpose:
Property:
Fields:


Frequency of external crystal and low cap configuration if using external crystal.
0x50
XoFreq[31:0]—Crystal frequency, unit in Hz. Default 0x00989680 or 10 MHz.
XoLowCap —This bit should be set for crystal that require less than 14 pF of Cload
capacitance. Default 0. See note below.
Format:
XO_CONFIG
Property
7
6
5
4
3
2
PROP_ID
0x50
PROP_DATA1
XoFreq[31:24]
PROP_DATA2
XoFreq[23:16]
PROP_DATA3
XoFreq[15:8]
PROP_DATA4
XoFreq[7:0]
PROP_DATA5
1
0
XoLowCap
Note: For correct operation of the oscillator, the user must do the following:
Check the crystal data sheet for the “Cload” capacitor value that should be placed across the crystal’s terminals to
oscillate at the correct frequency
If Cload > 14 pF, XO_LOWCAP bit of the XO_CONFIG property has to be set to 0. In this case, the input capacitance
of the XTAL pin of the Si4012 is approximately 5.5 pF, so a (Cload – 5.5)pF capacitor should be placed externally
across the crystal terminals.
If Cload < 14 pF XO_LOWCAP bit of the XO_CONFIG property have to be set to 1. In this case, the input
capacitance of the XTAL pin of the Si4012 is approximately 3 pF, so the external capacitor placed across the crystal
has to be (Cload – 3)pF.
Rev 1.1
39
Si4012
5.2.11. PROPERTY: PA_CONFIG
Purpose:
Property:
Fields:





PA max current driver, PA level, PA cap, alpha steps and beta steps.
0x60
PaMaxDrv—Allows for maximum current drive, calculated from Spreadsheet. Default 1.
PaLevel[6:0]—PA level calculated from Spreadsheet. Default 70.
PaCap[8:0]—PA cap. Default 128.
fAlphaSteps[7:0]—PA Alpha steps, default 125
fBetaSteps[7:0]—PA Beta steps, default 127
Format:
PA_CONFIG
Property
7
6
5
4
3
PROP_ID
2
1
0
0x60
PROP_DATA1
PaMaxDrv
PROP_DATA2
PaLevel[6:0]
PROP_DATA3
PaCap[8]
PROP_DATA4
PaCap[7:0]
PROP_DATA5
fAlphaSteps[7:0]
PROP_DATA6
fBetaSteps[7:0]
Note: fAlphaSteps and fBetaSteps should be calculated by the Si4012 calculator spreadsheet. See AN564 for details. fAlphaSteps specifies the number of steps advancing from the minimum supported value –0.075 with 0.0006 per step. The
maximum fAlpha is +0.075. fAlpha is computed using the formula below:
 Alpha + 0.075 
f ALPHASTEPS = ------------------------------------------0.0006
fBetaSteps specifies the number of steps advancing from the minimum supported value –0.254 with 0.002 per
step. The maximum fBeta is +0.254. fBeta is computed using the formula below:
 Beta + 0.254 
f BETASTEPS = --------------------------------------0.002
40
Rev 1.1
Si4012
5.3. Error Codes
If the Si4012 detects an error upon receipt of a command, such as a bad parameter, the error is reported in the
Response.
If the Si4012 detects an error while executing a command after the response has sent back to the host, the error is
stored. The host can retrieve an actual error code via the GET_STATE command.
The table below provides the list of error codes.
Error Code
Description
0x7f
Bad parameter in CMD
0x01
Bad parameter in ARG1
0x02
Bad parameter in ARG2
0x03
Bad parameter in ARG3
0x04
Bad parameter in ARG4
0x05
Bad parameter in ARG5
0x06
Bad parameter in ARG6
0x07
Bad parameter in ARG7
0x08
Too many arguments
0x09
Too few arguments
0x0A
LED on requested but LED driver is disabled
0x0B
State change failed
0x0C
LBD is disabled
0x0D
Data rate is out of range
0x0E
Frequency out of range
0x0F
Internal error
0x10
Data rate not supported
0x11
Device busy
0x12
FIFO overflow
0x13
FIFO underflow
Rev 1.1
41
Si4012
6. Pin Descriptions
42
XTAL
1
10 SDA
GND
2
9
SCL
TXM
3
8
SDN
TXP
4
7
nIRQ
VDD
5
6
LED
Si4012
Pin Number
Name
Description
1
XTAL
Crystal input
2
GND
Ground
3,4
TXM, TXP
5
VDD
Supply input
9
LED
LED driver output
7
nIRQ
Interrupt status output, active low, open collector
8
SDN
Shutdown input pin, active high
9
SCL
SMB (SMBus) Clock input/output, open collector
10
SDA
SMB (SMBus) Data input/output, open collector
RF transmitter differential outputs
Rev 1.1
Si4012
7. Ordering Guide
Part
Number*
Description
Package
Type
Operating
Temperature
Si4012-C1001GT Crystal-less RF Transmitter
MSOP-10
–40 to 85 °C
Si4012-C1001AT
MSOP-10
–40 to 85 °C
Crystal-less RF Transmitter (Automotive Grade)
*Note: Add an “(R)” at the end of the device part number to denote tape and reel option.
Rev 1.1
43
Si4012
8. Package Outline
Figure 9 illustrates the package details for the Si4012. Table 11 lists the values for the dimensions shown in the
illustration.
Figure 9. 10-Pin MSOP Package
Table 11. Package Dimensions
Symbol
A
A1
A2
b
c
D
E
E1
Millimeters
Symbol
Min
Nom
Max
—
0.00
0.75
0.17
0.08
—
—
0.85
—
—
3.00 BSC
4.90 BSC
3.00 BSC
1.10
0.15
0.95
0.33
0.23
Millimeters
Min
e
L
L2
q
aaa
bbb
ccc
ddd
0.40
0°
—
—
—
—
Nom
0.50 BSC
0.60
0.25 BSC
—
—
—
—
—
Notes:
1. All dimensions are shown in millimeters (mm).
2. Dimensioning and tolerancing per ASME Y14.5M-1994.
3. This drawing conforms to JEDEC Outline MO-187, Variation “BA.”
4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body
Components.
44
Rev 1.1
Max
0.80
8°
0.20
0.25
0.10
0.08
Si4012
9. Land Pattern: 10-Pin MSOP
Figure 10 shows the recommended land pattern details for the Si4012 in a 10-Pin MSOP package. Table 12 lists
the values for the dimensions shown in the illustration.
Figure 10. 10-Pin MSOP Land Pattern
Rev 1.1
45
Si4012
Table 12. 10-Pin MSOP Land Pattern Dimensions
Dimension
MIN
MAX
C1
4.40 REF
E
0.50 BSC
G1
3.00
—
X1
—
0.30
Y1
Z1
1.40 REF
—
5.80
Notes:
General
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ASME Y14.5M-1994.
3. This Land Pattern Design is based on the IPC-7351 guidelines.
4. All dimensions shown are at Maximum Material Condition (MMC).
Least Material Condition (LMC) is calculated based on a Fabrication
Allowance of 0.05 mm.
Solder Mask Design
1. All metal pads are to be non-solder mask defined (NSMD). Clearance
between the solder mask and the metal pad is to be 60 µm minimum,
all the way around the pad.
Stencil Design
1. A stainless steel, laser-cut and electro-polished stencil with
trapezoidal walls should be used to assure good solder paste release.
2. The stencil thickness should be 0.125 mm (5 mils).
3. The ratio of stencil aperture to land pad size should be 1:1.
Card Assembly
1. A No-Clean, Type-3 solder paste is recommended.
2. The recommended card reflow profile is per the JEDEC/IPC J-STD020 specification for Small Body Components.
46
Rev 1.1
Si4012
10. Top Marking: 10-Pin MSOP
Figure 11. 10-Pin MSOP Top Marking
Table 13. Top Marking Explanation
Line 1 Marking:
Base Part Number
Ordering Options
(See "7. Ordering Guide" on
page 43).
12 = Si4012
C1 = Revision
Line 2 Marking:
TTTT = Manufacturing Code
Manufacturing code from assembly house.
Line 3 Marking:
Y = Year
WW = Workweek
Assigned by assembly subcontractor. Corresponds to the
year and workweek of the mold date.
Rev 1.1
47
Si4012
DOCUMENT CHANGE LIST
Revision 0.1 to Revision 1.0


Added API.
Updated "1. Electrical Specifications" on page 4.
Revision 1.0 to Revision 1.1

48
Added automotive grade version to ordering guide.
Rev 1.1
Si4012
NOTES:
Rev 1.1
49
Si4012
CONTACT INFORMATION
Silicon Laboratories Inc.
400 West Cesar Chavez
Austin, TX 78701
Tel: 1+(512) 416-8500
Fax: 1+(512) 416-9669
Toll Free: 1+(877) 444-3032
Please visit the Silicon Labs Technical Support web page:
https://www.silabs.com/support/pages/contacttechnicalsupport.aspx
and register to submit a technical support request.
Patent Notice
Silicon Labs invests in research and development to help our customers differentiate in the market with innovative low-power, small size, analogintensive mixed-signal solutions. Silicon Labs' extensive patent portfolio is a testament to our unique approach and world-class engineering team.
The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice.
Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from
the use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features
or parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to
support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where personal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized application, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages.
Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc.
Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders.
50
Rev 1.1