SILAN SC72131S

SC72131
PLL FOR DIGITAL TUNING SYSTEM(DTS)
DESCRIPTION
The SC72131 is phase-locked loop (PLL) LSI for digital turning
systems (DTS).
The LSI is use to configure high-performance digital tuning
systems,such as radio/cassette players. They allow high-performance
SDIP-22-300-1.778
AM/FM tuners to be implemented easily.
FEATURES
* Built-in prescalers. Operate at input frequency ranging from
SOP-20-300-1.27
10~160MHz during FMIN input and at 0.5~40MHz during AMIN
input.
* 12 possible reference frequencies (with 4.5 or 7.2 MHz crystal) 1, 3,
5, 9, 10, 3.125, 6.25, 12.5, 15, 25, 50 and 100 kHz
* Built-in 20bit general-purpose counter for such as measuring
intermediate frequency (IF), IF input frequency ranging from
0.4M~12MHz.
* Has an unlock detector circuit an dead zone control circuit and an
ORDERING INFORMATION
Part No.
Package
SC72131
SDIP-22-300-1.778
SC72131S
SOP-20-300-1.27
deadlock clear circuit
* Built-in MOS transistor for forming an active low-pass filter
APPLICATIONS
* 4 N-channel open-drain output ports (OFF withstanding Voltage:
13V) and 2 input or output ports.
* Digital Tuning Systems
* Serial data I/O
— All functions controlled through 4 serial bus lines
* Operating ranges
— Supply voltage.....................… 5.0±0.5 V
— Operating temperature........–40 to +85° C
* Packages
— SDIP-22-300-1.78
— SOP-20-300-1.27
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SC72131
BLOCK DIAGRAM
ABSOLUTE MAXIMUM RATINGS (Tamb=25°C, VSS=0V)
Characteristics
Symbol
Ratings
Unit
VDDmax
-0.3 to 7.0
V
Allowable Power Dissipation
Pdmax
350
mW
N-ch Open-Drain OFF Withstanding Voltage
VOFF
13
V
Operating Temperature
Topr
-40 to +85
°C
Supply Voltage
ELECTRICAL CHARACTERISTICS (Tamb=-40 to 85°C, VSS=0V)
Characteristics
Built-in Feedback Resistance
Symbol
Test Condition
Min.
Typ.
Max.
Unit
Rf1
1.0
MΩ
Rf2
500
kΩ
Rf3
500
kΩ
Rf4
250
kΩ
Rpd1
200
kΩ
Rpd2
200
kΩ
Hysteresis
VHIS
0.1VDD
V
Output High Level Voltage
VOH1
Built-in Pull-down Resistor
IO=-1mA
VDD-1.0
V
(To be continued)
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SC72131
(Continued)
Characteristics
Symbol
VOL1
Input Low Level Current
Output Off Leakage Current
High Level Three-state Off Leakage
Current
Low Level Three-state Off Leakage
Current
Input Capacitance
Max.
Unit
1.0
V
IO=1mA
0.5
V
1.0
V
IO=1mA
0.2
V
IO=5mA
1.0
V
IO=1mA
0.2
V
IO=5mA
1.0
V
IO=8mA
1.6
V
IO=1mA, AIN=1.3V
0.5
V
IIH1
VI=6.5V
5.0
µA
IIH2
VI=13V
5.0
µA
IIH3
VI=VDD
2.0
11
µA
IIH4
VI=VDD
4.0
22
µA
IIH5
VI=VDD
8.0
44
µA
IIH6
VI=6.5V
200
nA
IIL1
VI=0
5.0
µA
IIL2
VI=0
5.0
µA
IIL3
VI=0
2.0
11
µA
IIL4
VI=0
4.0
22
µA
IIL5
VI=0
8.0
44
µA
IIL6
VI=0
200
µA
IOFF1
VO=13
5.0
µA
IOFF2
VO=6.5V
5.0
µA
IOFFH
VO=VDD
0.01
200
nA
IOFFL
VO=0V
0.01
200
nA
VOL3
VOL5
Input Low Level Current
Typ.
IO=0.5mA
VOL4
Input High Level Current
Min.
IO=1mA
VOL2
Output Low Level Voltage
Test Condition
CIN
6
pF
Xtal=7.2MHz,
IDD1
fIN2=130MHz,
5
10
mA
VIN2=40mVrms
Current Drain
PLL block stopped (PLL
IDD2
INHIBIT), Xtal oscillator
0.5
mA
operating (Xtal=7.2MHz)
IDD3
PLL block stopped, Xtal
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SC72131
PIN CONFIGURATION (SDIP22, SOP20)
PIN DESCRIPTION
Pin NO.
Pin Name
Description
1
OSCIN
Connects 4.5M or 7.2M crystal oscillator to supply reference
20
OSCOUT
SDIP-22
SOP-20
1
22
2
NC
frequency and internal clock.
--
3
2
PERIOD
Serial I/O ports, These pins transfer data to and from the controller
4
3
DIN
5
4
CLOCK
6
5
DOUT
7
6
OT1
•N channel open drain port pins.
8
7
OT2
•The output states are determined by OT1 to OT4 bits in the serial
9
8
OT3
to set divisors and dividing modes, and to control the generalpurpose counter and general-purpose I/O ports.
data.
•If the serial data TBC bit is set to 1, a time base signal (8Hz) can
be output from the OT1 pin.
10
9
OT4
11
10
IO1
•CMOS structure allows free use of these ports for input or output.
13
12
IO2
•Ports are set for input when the power is turned on.
•These pins are set to the OFF state when power is turn on.
•Input pin for measure general-purpose counter frequencies. The
frequency measurement function has such uses as measuring
12
11
IFIN
intermediate frequencies (IF)
•These pin feature built-in amps, Data are input by capacitor
coupling.
(To be continued)
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SC72131
(Continued)
Pin NO.
SDIP-22
Pin Name
SOP-20
14
NC
Description
--
15
13
AMIN
• These pins input AM and FM band local oscillator signals by
16
14
FMIN
17
15
VDD
•power supply pin (Applies 5.0V±10%)
18
16
DO
•This pin is for phase comparator tristate output.
19
17
LFIN
20
18
LFOUT
21
19
GND
capacitor coupling.
•These pins feature built-in amps.
•These pins for low-pass filter input pin and output pin.
•The SC72131 ground.
FUNCTION DESCRIPTION
Serial Data I/O Methods
The SC72131 inputs and outputs data using the 4 serial bus lines, the serial data I/O methods are selected by
an 8bit address
Register assignments
R3
R2
R1
R0
OSC
CTE
FM
MODE
P15
P14
P13
P12
P11
P10
P9
P8
P7
P6
P5
P4
P3
P2
P1
P0
Address = 82H(IN)
Address = 92H(IN)
IO
IO
C1 C2
OT3
IO1
IO 2
OT1
OT2
OT4
*
DO DO DO UL UL DZ DZ
C0 C1 C2
0
1
0
1
D
G0 G1 TO
O
C
IF
S
T0 T1 T2
Address = A2H (OUT)
I1
I2
* UL
IF1 IF1 IF1 IF1 IF1 IF1 IF1 IF1 IF1 IF1
9
8
7
6
5
4
3
2
1
0
IF9 IF8 IF7 IF6 IF5 IF4 IF3 IF2 IF1 IF0
Programmable divider structure
Swallow counter and programmable counter circuit configuration
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SC72131
FM
MODE
Input pin
Set divisor
Actual divisor: N
Input frequency range (MHz)
1
*
FMIN
272 to 65535
Twice the set value
10 to 160
0
1
AMIN
272 to 65535
The set value
2 to 40
0
0
AMIN
4 to 4095
The set value
0.5 to 10
Note: * Don’
t care.
1.IF Counter Structure
The SC72131 IF counter section consists of input amp, a gate time control circuit and a 20bit binary counter.
The result, i.e., the counter’
s msb, can be read serially from the Dout pin.
G1
G0
Gate time (GT) (ms)
Wait time (ms)
0
0
4
3~4
0
1
8
3~4
1
0
32
7~8
1
1
64
7~8
2. IF Counter Operation
Note: 1. IFIN input have built-in amp. Data are input by capacitor coupling.
2. Before starting the IF count, the IF counter must be reset in advance by setting CTE in the serial data to 0.
3. The IF count is started by changing the CTE bit in the serial data from 0 to 1. The serial data is latched
by the SC72131 when the CE pin is dropped from high to low.
4.The IF signal must be supplied to the IFIN pin in the period between the point the CE pin goes low and
the end of the wait time at the latest.
5. The value of the IF counter at the end of the Gate-Time must be read out during the period that CTE is
1. This is because the IF counter is reset when CTE is set to 0.
6. When operating the IF counter, the control microprocessor must first check the state of the IF-IC SD
(station detect) signal and only after determining that the SD signal is present turn on IF buffer output
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SC72131
and execute an IF count operation. Auto search techniques that use only the IF counter are not
recommended, since it is possible for IF buffer leakage output to cause incorrect stops at points where
there is no station.
3. Power Supply Pins
A capacitor of at least 2000 pF must be inserted between the power supply VDD and GND pins for noise
exclusion. This capacitor must be placed as close as possible to the VDD and GND pins.
PIN STATES AFTER THE POWER ON RESET
After power-on reset, the pins (DOUT OT1 OT2 OT3 OT4 ) are set to OPEN state and the pins ( IO1 , IO2 ) set
to INPUT state.
Note: this circuit according to SDIP-22 package, and the circuit of SOP-20 removed two NC pins, and others are
the same as the above circuit.
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SC72131
TYPICAL APPLICATION CIRCUIT
This section is susceptible to noise
due to its high impedance. Therefore,
the pattern lines should be kept as
short as possible and this area should
be covered with a ground pattern.
1 OSCIN
2 NC
OSCOUT 22
GND 21
VCC
µ -com
CE
3 PERIOD
LFOUT 20
DI
4 DIN
CL
5 CLOCK
DO 18
DO
6 DOUT
VDD 17
LFIN 19
7 OT1
FMIN 16
8 OT2
AMIN 15
9 OT3
NC 14
10 OT4
IO2 1
11 IO1
IFIN 12
FMVCO
AMVCO
TUNERSystem
tune
FM/AM-IF
IF-Request
FM/AM
MONO/BT
ST-Indicate
Note: this circuit according to SDIP-22 package, and the circuit of SOP-20 removed two NC pins, and others are
the same as the above circuit.
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SC72131
PACKAGE OUTLINE
SDIP-22-300-1.778
UNIT: mm
SOP-20-300-1.27
UNIT: mm
0.15±0.05
1.27
0.45
2.25MAX
12.70±0.25
11.43
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SC72131
HANDLING MOS DEVICES:
Electrostatic charges can exist in many things. All of our MOS devices are internally protected against
electrostatic discharge but they can be damaged if the following precautions are not taken:
• Persons at a work bench should be earthed via a wrist strap.
• Equipment cases should be earthed.
• All tools used during assembly, including soldering tools and solder baths, must be earthed.
• MOS devices should be packed for dispatch in antistatic/conductive containers.
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