NSC LMH6628MA

LMH6628
Dual Wideband, Low Noise, Voltage Feedback Op Amp
General Description
The National LMH6628 is a high speed dual op amp that
offers a traditional voltage feedback topology featuring unity
gain stability and slew enhanced circuitry. The LMH6628’s
low noise and very low harmonic distortion combine to form
a wide dynamic range op amp that operates from a single
(5V to 12V) or dual ( ± 5V) power supply.
Each of the LMH6628’s closely matched channels provides
a 300MHz unity gain bandwidth and low input voltage noise
). Low 2nd/3rd harmonic distortion (−65/
density (2nV/
−74dBc at 10MHz) make the LMH6628 a perfect wide dynamic range amplifier for matched I/Q channels.
With its fast and accurate settling (12ns to 0.1%), the
LMH6628 is also an excellent choice for wide dynamic
range, anti-aliasing filters to buffer the inputs of hi resolution
analog-to-digital converters. Combining the LMH6628’s two
tightly matched amplifiers in a single 8-pin SOIC package
reduces cost and board space for many composite amplifier
applications such as active filters, differential line drivers/
receivers, fast peak detectors and instrumentation amplifiers.
The LMH6628 is fabricated using National’s VIP10™ complimentary bipolar process.
Connection Diagram
To reduce design times and assist in board layout, the
LMH6628 is supported by an evaluation board
(CLC730036).
Features
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Wide unity gain bandwidth: 300MHz
Low noise: 2nV/
Low Distortion: −65/−74dBc (10MHz)
Settling time: 12ns to 0.1%
Wide supply voltage range: ± 2.5V to ± 6V
High output current: ± 85mA
Improved replacement for CLC428
Applications
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High speed dual op amp
Low noise integrators
Low noise active filters
Driver/receiver for transmission systems
High speed detectors
I/Q channel amplifiers
Inverting Frequency Response
8-Pin SOIC
20038535
Top View
20038515
© 2003 National Semiconductor Corporation
DS200385
www.national.com
LMH6628 Dual Wideband, Low Noise, Voltage Feedback Op Amp
January 2003
LMH6628
Absolute Maximum Ratings
(Note 1)
Maximum Junction Temperature
Storage Temperature Range
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Thermal Resistance (Note 5)
200V
Supply Voltage
13.5
Short Circuit Current
+300˚C
Operating Ratings (Note 1)
2kV
Machine Model
−65˚C to +150˚C
Lead Temperature (soldering 10 sec)
ESD Tolerance (Note 4)
Human Body Model
+150˚C
Package
(θJC)
(θJA)
SOIC
65˚C/W
145˚C/W
(Note 3)
Common-Mode Input Voltage
V + - V−
Temperature Range
Differential Input Voltage
V + - V−
Nominal Supply Voltage
−40˚C to +85˚C
± 2.5V to ± 6V
Electrical Characteristics (Note 2)
VCC = ± 5V, AV = +2V/V, RF = 100Ω, RG = 100Ω, RL = 100Ω; unless otherwise specified. Boldface limits apply at the
temperature extremes.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Frequency Domain Response
GB
Gain Bandwidth Product
VO < 0.5VPP
SSBW
-3dB Bandwidth, AV = +1
VO < 0.5VPP
SSBW
-3dB Bandwidth, AV = +2
VO < 0.5VPP
GFL
Gain Flatness
VO < 0.5VPP
GFP
GFR
LPD
Peaking
Rolloff
Linear Phase Deviation
180
DC to 200MHz
200
MHz
300
MHz
100
MHz
0.0
dB
DC to 20MHz
.1
dB
DC to 20MHz
.1
deg
Time Domain Response
TR
Rise and Fall Time
1V Step
4
ns
TS
Settling Time
2V Step to 0.1%
12
ns
OS
Overshoot
1V Step
1
%
SR
Slew Rate
4V Step
550
V/µs
300
Distortion And Noise Response
HD2
2nd Harmonic Distortion
1VPP, 10MHz
−65
dBc
HD3
3rd Harmonic Distortion
1VPP, 10MHz
−74
dBc
Equivalent Input Noise
VN
Voltage
1MHz to 100MHz
2
nV/
IN
Current
1MHz to 100MHz
2
pA/
XTLKA
Crosstalk
Input Referred, 10MHz
−62
dB
63
dB
Static, DC Performance
GOL
Open-Loop Gain
VIO
Input Offset Voltage
DVIO
IBN
DIBN
IOS
IOSD
56
53
± .5
Average Drift
5
Input Bias Current
± .7
Average Drift
150
Input Offset Current
0.3
mV
µV/˚C
± 20
± 30
µA
nA/˚C
±6
µA
5
nA/˚C
PSRR
Power Supply Rejection Ratio
60
46
70
dB
CMRR
Common-Mode Rejection Ratio
57
54
62
dB
ICC
Supply Current
7.5
7.0
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Average Drift
±2
± 2.6
Per Channel, RL = ∞
2
12
12.5
mA
LMH6628
Electrical Characteristics (Note 2)
(Continued)
VCC = ± 5V, AV = +2V/V, RF = 100Ω, RG = 100Ω, RL = 100Ω; unless otherwise specified. Boldface limits apply at the
temperature extremes.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Miscellaneous Performance
RIN
Input Resistance
Common-Mode
500
kΩ
Differential-Mode
200
kΩ
CIN
Input Capacitance
Common-Mode
1.5
pF
Differential-Mode
1.5
pF
ROUT
Output Resistance
Closed-Loop
.1
Ω
VO
Output Voltage Range
RL = ∞
± 3.8
± 3.5
V
VOL
± 3.2
± 3.1
RL = 100Ω
CMIR
Input Voltage Range
IO
Output Current
Common- Mode
± 50
V
± 3.7
± 85
V
mA
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications, see the Electrical Characteristics tables.
Note 2: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of
the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self heating where TJ > TA.
See Note 6 for information on temperature de-rating of this device." Min/Max ratings are based on product characterization and simulation. Individual parameters
are tested as noted.
Note 3: Output is short circuit protected to ground, however maximum reliability is obtained if output current does not exceed 160mA.
Note 4: Human body model, 1.5kΩ in series with 100pF. Machine model, 0Ω In series with 200pF.
Note 5: The maximum power dissipation is a function of TJ(MAX), θJA and TA. The maximum allowable power dissipation at any ambient temperature is
PD = (TJ(MAX)-TA)/ θJA. All numbers apply for packages soldered directly onto a PC board.
Ordering Information
Package
8-pin SOIC
Part Number
Package Marking
LMH6628MA
LMH6628MA
LMH6628MAX
Transport Media
NSC Drawing
Rails
M08A
2.5k Units Tape and Reel
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LMH6628
Typical Performance Characteristics
(TA = +25˚, AV = +2, VCC = ± 5V, Rf =100Ω, RL = 100Ω, un-
less specified)
Non-Inverting Frequency Response
Inverting Frequency Response
20038515
20038513
Frequency Response vs. Load Resistance
Frequency Response vs. Output Amplitude
20038510
20038525
Frequency Response vs. Capacitive Load
Gain Flatness & Linear Phase
20038516
20038524
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4
Channel Matching
Channel to Channel Crosstalk
20038514
20038509
Pulse Response (VO = 2V)
Pulse Response (VO = 100mV)
20038511
20038512
2nd Harmonic Distortion vs. Output Voltage
3rd Harmonic Distortion vs. Output Voltage
20038507
20038508
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LMH6628
Typical Performance Characteristics (TA = +25˚, AV = +2, VCC = ±5V, Rf =100Ω, RL = 100Ω,
unless specified) (Continued)
LMH6628
Typical Performance Characteristics (TA = +25˚, AV = +2, VCC = ±5V, Rf =100Ω, RL = 100Ω,
unless specified) (Continued)
PSRR and CMRR ( ± 5V)
2nd & 3rd Harmonic Distortion vs. Frequency
20038522
20038517
PSRR and CMRR ( ± 2.5V)
Closed Loop Output Resistance ( ± 2.5V)
20038523
20038518
Closed Loop Output Resistance ( ± 5V)
Open Loop Gain & Phase ( ± 2.5V)
20038519
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20038521
6
Open Loop Gain & Phase ( ± 5V)
Recommended RS vs. CL
20038520
20038526
DC Errors vs. Temperature
Maximum VO vs. RL
20038545
20038546
2-Tone, 3rd Order Intermodulation Intercept
Voltage & Current Noise vs. Frequency
20038544
20038547
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LMH6628
Typical Performance Characteristics (TA = +25˚, AV = +2, VCC = ±5V, Rf =100Ω, RL = 100Ω,
unless specified) (Continued)
LMH6628
Typical Performance Characteristics (TA = +25˚, AV = +2, VCC = ±5V, Rf =100Ω, RL = 100Ω,
unless specified) (Continued)
Settling Time vs. Accuracy
20038548
See OA-15 for more information. National suggests the
730036 (SOIC) dual op amp evaluation board as a guide for
high frequency layout and as an aid in device evaluation.
Application Section
LOW NOISE DESIGN
Ultimate low noise performance from circuit designs using
the LMH6628 requires the proper selection of external resistors. By selecting appropriate low valued resistors for RF and
RG, amplifier circuits using the LMH6628 can achieve output
noise that is approximately the equivalent voltage input
multiplied by the desired gain (AV).
noise of 2nV/
ANALOG DELAY CIRCUIT (ALL-PASS NETWORK)
The circuit in Figure 1 implements an all-pass network using
the LMH6628. A wide bandwidth buffer (LM7121) drives the
circuit and provides a high input impedance for the source.
As shown in Figure 2, the circuit provides a 13.1ns delay
(with R = 40.2Ω, C = 47pF). RF and RG should be of equal
and low value for parasitic insensitive operation.
DC BIAS CURRENTS AND OFFSET VOLTAGES
Cancellation of the output offset voltage due to input bias
currents is possible with the LMH6628. This is done by
making the resistance seen from the inverting and noninverting inputs equal. Once done, the residual output offset
voltage will be the input offset voltage (VOS) multiplied by the
desired gain (AV). National Application Note OA-7 offers
several solutions to further reduce the output offset.
OUTPUT AND SUPPLY CONSIDERATIONS
With ± 5V supplies, the LMH6628 is capable of a typical
output swing of ± 3.8V under a no-load condition. Additional
output swing is possible with slightly higher supply voltages.
For loads of less than 50Ω, the output swing will be limited by
the LMH6628’s output current capability, typically 85mA.
Output settling time when driving capacitive loads can be
improved by the use of a series output resistor. See the plot
labeled "RS vs. CL" in the Typical Performance section.
20038501
FIGURE 1.
LAYOUT
Proper power supply bypassing is critical to insure good high
frequency performance and low noise. De-coupling capacitors of 0.1µF should be placed as close as possible to the
power supply pins. The use of surface mounted capacitors is
recommended due to their low series inductance.
A good high frequency layout will keep power supply and
ground traces away from the inverting input and output pins.
Parasitic capacitance from these nodes to ground causes
frequency response peaking and possible circuit oscillation.
20038502
FIGURE 2. Delay Circuit Response to 0.5V Pulse
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LMH6628
Application Section
(Continued)
The circuit gain is +1 and the delay is determined by the
following equations.
(1)
Td =
1 dφ
360 df
;
(2)
where Td is the delay of the op amp at AV = +1.
The LMH6628 provides a typical delay of 2.8ns at its −3dB
point.
20038531
FULL DUPLEX DIGITAL OR ANALOG TRANSMISSION
FIGURE 4.
Simultaneous transmission and reception of analog or digital
signals over a single coaxial cable or twisted-pair line can
reduce cabling requirements. The LMH6628’s wide bandwidth and high common-mode rejection in a differential amplifier configuration allows full duplex transmission of video,
telephone, control and audio signals.
In the circuit shown in Figure 3, one of the LMH6628’s amps
is used as a "driver" and the other as a difference "receiver"
amplifier. The output impedance of the "driver" is essentially
zero. The two R’s are chosen to match the characteristic
impedance of the transmission line. The "driver" op amp gain
can be selected for unity or greater.
Receiver amplifier A2 (B2) is connected across R and forms
differential amplifier for the signals transmitted by driver A2
(B2). If RF equals RG, receiver A2 (B1) will then reject the
signals from driver A1 (B1) and pass the signals from driver
B1 (A1).
POSITIVE PEAK DETECTOR
The LMH6628’s dual amplifiers can be used to implement a
unity-gain peak detector circuit as shown in Figure 5.
20038505
FIGURE 5.
The acquisition speed of this circuit is limited by the dynamic
resistance of the diode when charging Chold. A plot of the
circuit’s performance is shown in Figure 6 with a 1MHz
sinusoidal input.
20038503
FIGURE 3.
The output of the receiver amplifier will be:
(3)
Care must be given to layout and component placement to
maintain a high frequency common-mode rejection. The plot
of Figure 4 shows the simultaneous reception of signals
transmitted at 1MHz and 10MHz.
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LMH6628
Application Section
(Continued)
(4)
To build a boost circuit, use the design equations Eq. 6 and
Eq. 7.
(5)
(6)
Select R2 and C using Eq. 6. Use reasonable values for high
frequency circuits - R2 between 10Ω and 5kΩ, C between
10pF and 2000pF. Use Eq. 7 to determine the parallel combination of Ra and Rb. Select Ra and Rb by either the 10Ω to
5kΩ criteria or by other requirements based on the impedance Vin is capable of driving. Finish the design by determining the value of K from Eq. 8.
20038537
FIGURE 6.
A current source, built around Q1, provides the necessary
bias current for the second amplifier and prevents saturation
when power is applied. The resistor, R, closes the loop while
diode D2 prevents negative saturation when VIN is less than
VC. A MOS-type switch (not shown) can be used to reset the
capacitor’s voltage.
The maximum speed of detection is limited by the delay of
the op amps and the diodes. The use of Schottky diodes will
provide faster response.
(7)
Figure 8 shows an example of the response of the circuit of
Figure 9, where fo is 2.3MHz. The component values are as
follows: Ra =2.1kΩ, Rb = 68.5Ω, R2 = 4.22kΩ, R = 500Ω, KR
= 50Ω, C = 120pF.
ADJUSTABLE OR BANDPASS EQUALIZER
A "boost" equalizer can be made with the LMH6628 by
summing a bandpass response with the input signal, as
shown in Figure 7.
20038506
20038543
FIGURE 7.
FIGURE 8.
The overall transfer function is shown in Eq. 5.
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LMH6628 Dual Wideband, Low Noise, Voltage Feedback Op Amp
Physical Dimensions
inches (millimeters)
unless otherwise noted
8-Pin SOIC
NS Package Number M08A
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