SPC6605 N & P Pair Enhancement Mode MOSFET DESCRIPTION The SPC6605 is the N- and P-Channel enhancement mode power field effect transistors are produced using high cell density DMOS trench technology. This high density process is especially tailored to minimize on-state resistance and provide superior switching performance. These devices are particularly suited for low voltage applications such as notebook computer power management and other battery powered circuits where high-side switching, low in-line power loss, and resistance to transients are needed. APPLICATIONS z Power Management in Note book z Portable Equipment z Battery Powered System z DC/DC Converter z Load Switch z DSC z LCD Display inverter FEATURES N-Channel 20V/3.6A,RDS(ON)=97mΩ@VGS=4.5V 20V/3.1A,RDS(ON)=113mΩ@VGS=2.5V P-Channel -20V/-2.4A,RDS(ON)= 128mΩ@VGS=-4.5V -20V/-2.0A,RDS(ON)=188mΩ@VGS=-2.5V Super high density cell design for extremely low RDS (ON) TSOP– 6P package design PIN CONFIGURATION( TSOP– 6P ) PART MARKING 2011/8/1 Preliminary Page 1 SPC6605 N & P Pair Enhancement Mode MOSFET PIN DESCRIPTION Pin Symbol Description 1 G1 Gate 1 2 S2 Source 2 3 G2 4 D2 Gate 2 Drain 2 5 S1 6 D1 Source 1 Drain1 ORDERING INFORMATION Part Number Package Part Marking SPC6605ST6RG TSOP- 6P 05YW SPC6605ST6RGB TSOP- 6P 05YW ※ Week Code : A ~ Z( 1 ~ 26 ) ; a ~ z( 27 ~ 52 ) ※ SPC6605ST6RG : Tape Reel ; Pb – Free ※ SPC6605ST6RGB : Tape Reel ; Pb – Free ; Halogen -Free ABSOULTE MAXIMUM RATINGS (TA=25℃ Unless otherwise noted) Typical Parameter Symbol Unit N-Channel P-Channel Drain-Source Voltage VDSS 20 -20 V Gate –Source Voltage VGSS ±12 ±12 V 3.2 -2.4 2.6 -1.8 IDM 10 -8 A IS 1.6 -1.4 A Continuous Drain Current(TJ=150℃) TA=25℃ TA=70℃ Pulsed Drain Current Continuous Source Current(Diode Conduction) Power Dissipation TA=25℃ TA=70℃ Operating Junction Temperature Storage Temperature Range Thermal Resistance-Junction to Ambient 2011/8/1 Preliminary ID 1.15 PD T ≤ 10sec Steady State RθJA W 0.75 TJ TSTG -55/150 -55/150 50 90 A ℃ ℃ 52 95 ℃/W Page 2 SPC6605 N & P Pair Enhancement Mode MOSFET ELECTRICAL CHARACTERISTICS (TA=25℃ Unless otherwise noted) Parameter Static Drain-Source Breakdown Voltage Gate Threshold Voltage Symbol V(BR)DSS VGS(th) Gate Leakage Current IGSS Zero Gate Voltage Drain Current IDSS On-State Drain Current ID(on) Drain-Source On-Resistance RDS(on) Forward Transconductance gfs Diode Forward Voltage VSD Conditions VGS=0V,ID= 250uA VGS=0V,ID=-250uA VDS=VGS,ID=250uA VDS=VGS,ID=-250uA VDS=0V,VGS=±12V VDS=0V,VGS=±12V VDS= 20V,VGS=0V VDS=-20V,VGS=0V VDS= 20V,VGS=0V TJ=55℃ VDS=-20V,VGS=0V TJ=55℃ VDS≥ 4.5V,VGS = 4.5V VDS≤ -4.5V,VGS =-4.5V VGS=4.5V,ID=3.6A VGS=-4.5V,ID=-2.4A VGS=2.5V,ID=3.1A VGS=-2.5V,ID=-2.0A VDS=5V,ID=-3.4A VDS=-5V,ID=-2.4A IS=1.6A,VGS=0V IS=-1.6A,VGS=0V Min. N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch Typ 20 -20 0.45 -0.45 Max. Unit 1.2 -1.2 ±100 ±100 1 -1 10 -10 6 -6 V nA uA A 0.085 0.115 0.100 0.165 10 6.5 0.85 -0.8 0.097 0.128 0.113 0.188 Ω S 1.2 -1.2 V Dynamic Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss td(on) Turn-On Time tr td(off) Turn-Off Time tf 2011/8/1 Preliminary N-Channel VDS=10V,VGS=4.5V, ID=3.6A P-Channel VDS=-16V,VGS=-4.5V ,ID=-2.A N-Channel VDS=10V,VGS=0V, f=1.0MHz P-Channel VDS=-20V,VGS=0V,f=1.0MHz N-Channel VDD=10V,RL=2.8Ω ,ID=3.6A VGEN=4.5V ,RG=6Ω P-Channel VDD=-10V,RL=10Ω ,ID=-1.0A VGEN=-4.5V ,RG=3.3Ω N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch 4.4 7.5 0.6 1 1.9 3 145 7.5 100 550 50 55 5.2 8.5 37 18 15 22 5.7 10 nC pF nS Page 3 SPC6605 N & P Pair Enhancement Mode MOSFET TYPICAL CHARACTERISTICS ( P-Channel ) 2011/8/1 Preliminary Page 4 SPC6605 N & P Pair Enhancement Mode MOSFET 2011/8/1 Preliminary Page 5 SPC6605 N & P Pair Enhancement Mode MOSFET TYPICAL CHARACTERISTICS ( N-Channel ) 2011/8/1 Preliminary Page 6 SPC6605 N & P Pair Enhancement Mode MOSFET 2011/8/1 Preliminary Page 7 SPC6605 N & P Pair Enhancement Mode MOSFET 2011/8/1 Preliminary Page 8 SPC6605 N & P Pair Enhancement Mode MOSFET TSOP- 6P PACKAGE OUTLINE 2011/8/1 Preliminary Page 9 SPC6605 N & P Pair Enhancement Mode MOSFET Information provided is alleged to be exact and consistent. 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