SMD Type Product specification FDN357N General Description Features SuperSOTTM-3 N-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications in notebook computers, portable phones, PCMCIA cards, and other battery powered circuits where fast switching, and low in-line power loss are needed in a very small outline surface mount package. SuperSOTTM-8 SuperSOTTM-6 SOT-23 1.9 A, 30 V, RDS(ON) = 0.090 Ω @ VGS = 4.5 V RDS(ON) = 0.060 Ω @ VGS = 10 V. Industry standard outline SOT-23 surface mount package using proprietary SuperSOTTM-3 design for superior thermal and electrical capabilities. High density cell design for extremely low RDS(ON). Exceptional on-resistance and maximum DC current capability. SO-8 SOIC-16 SOT-223 D D 7 35 S G TM SuperSOT -3 Absolute Maximum Ratings S G TA = 25oC unless other wise noted Symbol Parameter FDN357N Units VDSS Drain-Source Voltage 30 V VGSS Gate-Source Voltage - Continuous ±20 V ID Drain/Output Current - Continuous 1.9 A - Pulsed PD TJ,TSTG Maximum Power Dissipation 10 (Note 1a) 0.5 (Note 1b) 0.46 Operating and Storage Temperature Range W -55 to 150 °C THERMAL CHARACTERISTICS RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 250 °C/W RθJC Thermal Resistance, Junction-to-Case (Note 1) 75 °C/W http://www.twtysemi.com 4008-318-123 1 of 2 SMD Type Product specification FDN357N Electrical Characteristics (TA = 25 OC unless otherwise noted ) Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA 30 ∆BVDSS/∆TJ Breakdown Voltage Temp. Coefficient ID = 250 µA, Referenced to 25 C IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V o V mV/ oC 36 TJ = 55°C 1 µA 10 µA IGSSF Gate - Body Leakage, Forward VGS = 20 V,VDS = 0 V 100 nA IGSSR Gate - Body Leakage, Reverse VGS = -20 V, VDS = 0 V -100 nA 2 V ON CHARACTERISTICS VGS(th) (Note) Gate Threshold Voltage VDS = VGS, ID = 250 µA 1 ∆VGS(th)/∆TJ Gate Threshold Voltage Temp. Coefficient ID = 250 µA, Referenced to 25 C RDS(ON) Static Drain-Source On-Resistance VGS = 4.5 V, ID = 1.9 A o VGS = 10 V, ID = 2.2 A On-State Drain Current VGS = 4.5 V, VDS = 5 V gFS Forward Transconductance VDS = 5 V, ID = 1.9 A mV/ oC -3.6 TJ =125°C ID(ON) 1.6 0.081 0.09 0.11 0.14 0.053 0.06 5 Ω A 5 S 235 pF 145 pF 50 pF DYNAMIC CHARACTERISTICS Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance SWITCHING CHARACTERISTICS VDS = 10 V, VGS = 0 V, f = 1.0 MHz (Note) 5 10 ns 12 22 ns Turn - Off Delay Time 12 22 ns Turn - Off Fall Time 3 8 ns 4.2 5.9 nC tD(on) Turn - On Delay Time tr Turn - On Rise Time tD(off) tf Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = 10 V, ID = 1 A, VGS = 10 V, RGEN = 6 Ω VDS = 10 V, ID = 1.9 A, VGS = 5 V 1.3 nC 1.7 nC DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS Maximum Continuous Drain-Source Diode Forward Current VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 0.42 A (Note) 0.71 0.42 A 1.2 V Note: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. Typical RθJA using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment : a. 250oC/W when mounted on a 0.02 in2 pad of 2oz Cu. b. 270oC/W when mounted on a 0.001 in2 pad of 2oz Cu. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%. http://www.twtysemi.com 4008-318-123 2 of 2