54298 Quad 2-Port Register (Multiplexer With Storage) General Description Features The ’298 is a quad 2-port register. It is the logical equivalent of a quad 2-input multiplexer followed by a quad 4-bit edgetriggered register. A Common Select input selects between two 4-bit input ports (data sources). The selected data is transferred to the output register synchronous with the HIGH-to-LOW transition of the Clock input. Y Connection Diagram Logic Symbol Y Select from two data sources Fully edge-triggered operation Dual-In-Line Package TL/F/10215 – 2 VCC e Pin 16 GND e Pin 8 TL/F/10215 – 1 Order Number 54298DMQB or 54298FMQB See NS Package Number J16A or W16A Pin Names S CP I0a–I0d I1a–I1d Qa, Qd C1995 National Semiconductor Corporation TL/F/10215 Description Common Select Input Clock Pulse Input (Active Falling Edge) Source 0 Data Inputs Source 1 Data Inputs Flip-Flop Outputs RRD-B30M105/Printed in U. S. A. 54298 Quad 2-Port Register (Multiplexer With Storage) June 1989 Absolute Maximum Ratings (Note) Note: The ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the ‘‘Electrical Characteristics’’ table are not guaranteed at the absolute maximum ratings. The ‘‘Recommended Operating Conditions’’ table will define the conditions for actual operation. If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage Input Voltage Operating Free Air Temperature Range 7V b 55§ C to a 125§ C Storage Temperature Range b 65§ C to a 150§ C 5.5V Recommended Operating Conditions Symbol 54298 Parameter Units Min Nom Max 4.5 5 5.5 VCC Supply Voltage VIH High Level Input Voltage V VIL Low Level Input Voltage IOH High Level Output Current IOL Low Level Output Current TA Free Air Operating Temperature ts (H) ts (L) Setup Time HIGH or LOW S to CP 25 25 ns th (H) th (L) Hold Time HIGH or LOW S to CP 0 0 ns ts (H) ts (L) Setup Time HIGH or LOW I0x or I1x to CP 15 15 ns th (H) th (L) Hold Time HIGH or LOW I0x or I1x to CP 5.0 5.0 ns tw (H) tw (L) CP Pulse Width HIGH or LOW 20 20 ns 2 V b 55 0.8 V b 0.8 mA 16 mA 125 §C Electrical Characteristics over recommended operating free air temperature (unless otherwise noted) Symbol VI Parameter Conditions Input Clamp Voltage VCC e Min, II e b12 mA VOH High Level Output Voltage VCC e Min, IOH e Max, VIL e Max, VIH e Min VOL Low Level Output Voltage VCC e Min, IOL e Max, VIH e Min, VIL e Max II Input Current @ Max Input Voltage IIH Min Typ (Note 1) Max Units b 1.5 V 2.4 V 0.4 V VCC e Max, VI e 5.5V 1 mA High Level Input Current VCC e Max, VI e 2.4V 40 mA IIL Low Level Input Current VCC e Max, VI e 0.4V b 1.6 mA IOS Short Circuit Output Current VCC e Max (Note 2) b 57 mA ICC Supply Current VCC e Max (Note 3) 65 mA b 20 Note 1: All typicals are at VCC e 5V, TA e 25§ C. Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second. Note 3: ICC is measured with all outputs open and all inputs grounded. 2 Switching Characteristics VCC e a 5.0V, TA e a 25§ C (See Section 1 for test waveforms and output load) Symbol CL e 15 pF RL e 400X Parameter Min tPLH tPHL Units Max Propagation Delay, CP to Qn 27 32 Functional Description ns Truth Table This device is a high speed quad 2-port register. It selects four bits of data from two sources (ports) under the control of a Common Select input (S). The selected data is transferred to the 4-bit output register synchronous with the HIGH-to-LOW transition of the Clock input (CP). The 4-bit output register is fully edge-triggered. The Data inputs (Inx) and Select input (S) need be stable only one setup time prior to the HIGH-to-LOW transition of the clock for predictable operation. Inputs Output S I0x I1x Qx I I h h I h X X X X l h L H L H l e LOW Voltage Level one setup time prior to the HIGH-to-LOWclock transition. h e HIGH Voltage Level one setup time prior to the HIGH-to-LOW clock transition. H e HIGH Voltage level L e LOW Voltage level X e Immaterial Logic Diagram TL/F/10215 – 3 3 54298 Quad 2-Port Register (Multiplexer With Storage) Physical Dimensions inches (millimeters) 16-Lead Ceramic Dual-In-Line Package (J) Order Number 54298DMQB NS Package Number J16A 16-Lead Ceramic Flat Package (W) Order Number 54298FMQB NS Package Number W16A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. 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