MM54C89/MM74C89 64-Bit TRI-STATEÉ Random Access Read/Write Memory General Description The MM54C89/MM74C89 is a 16-word by 4-bit random access read/write memory. Inputs to the memory consist of four address lines, four data input lines, a write enable line and a memory enable line. The four binary address inputs are decoded internally to select each of the 16 possible word locations. An internal address register latches the address information on the positive to negative transition of the memory enable input. The four TRI-STATE data output lines working in conjunction with the memory enable input provide for easy memory expansion. Address Operation: Address inputs must be stable tSA prior to the positive to negative transition of memory enable. It is thus not necessary to hold address information stable for more than tHA after the memory is enabled (positive to negative transition of memory enable). Note: The timing is different than the DM7489 in that a positive to negative transition of the memory enable must occur for the memory to be selected. Read Operation: The complement of the information which was written into the memory is non-destructively read out at the four outputs. This is accomplished by selecting the desired address and bringing memory enable low and write enable high. When the device is writing or disabled the output assumes a TRI-STATE (Hi-z) condition. Features Y Y Y Y Y Y Y Wide supply voltage range 3.0V to 15V Guaranteed noise margin 1.0V High noise immunity 0.45 VCC (typ.) Low power fan out of 2 TTL compatibility driving 74L Low power consumption 100 nW/package (typ.) Fast access time 130 ns (typ.) at VCC e 10V TRI-STATE output Write Operation: Information present at the data inputs is written into the memory at the selected address by bringing write enable and memory enable low. Logic and Connection Diagrams Dual-In-Line Package Top View TL/F/5888 – 2 Order Number MM54C89 or MM74C89 TL/F/5888 – 1 TRI-STATEÉ is a registered trademark of National Semiconductor Corporation. C1995 National Semiconductor Corporation TL/F/5888 RRD-B30M105/Printed in U. S. A. MM54C89/MM74C89 64-Bit TRI-STATE Random Access Read/Write Memory March 1988 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Voltage at any Pin Power Dissipation (PD) Dual-In-Line Small Outline Operating VCC Range b 0.3V to VCC a 0.3V Operating Temperature Range MM54C89 MM74C89 b 55§ C to a 125§ C b 40§ C to a 85§ C Storage Temperature Range (TS) b 65§ C to a 150§ C 700 mW 500 mW 3.0V to 15V 18V Absolute Maximum VCC Lead Temperature (TL) (Soldering, 10 seconds) 260§ C DC Electrical Characteristics Min/Max limits apply across temperature range, unless otherwise noted Symbol Parameter Conditions Min Typ Max Units CMOS TO CMOS VIN(1) Logical ‘‘1’’ Input Voltage VCC e 5.0V VCC e 10V VIN(0) Logical ‘‘0’’ Input Voltage VCC e 5.0V VCC e 10V VOUT(1) Logical ‘‘1’’ Output Voltage VCC e 5.0V, IO e b10 mA VCC e 10V, IO e b10 mA VOUT(0) Logical ‘‘0’’ Output Voltage VCC e 5.0V, IO e a 10 mA VCC e 10V, IO e a 10 mA IIN(1) Logical ‘‘1’’ Input Current IIN(0) Logical ‘‘0’’ Input Current VCC e 15V, VIN e 15V VCC e 15V, VIN e 0V IOZ Output Current in High Impedance State VCC e 15V, V e 15V VCC e 15V, VO e 0V Supply Current VCC e 15V ICC 3.5 8.0 V V 1.5 2.0 V V 4.5 9.0 V V b 0.005 0.5 1.0 V V 1.0 mA b 1.0 b 0.005 1.0 b 1.0 0.005 b 0.005 mA mA 0.05 300 mA mA CMOS/LPTTL INTERFACE VIN(1) Logical ‘‘1’’ Input Voltage 54C, VCC e 4.5V 74C, VCC e 4.75V VCC b 1.5 VCC b 1.5 V V VIN(0) Logical ‘‘0’’ Input Voltage 54C, VCC e 4.5V 74C, VCC e 4.75V VOUT(1) Logical ‘‘1’’ Output Voltage 54C, VCC e 4.5V, IO e b360 mA 74C, VCC e 4.75V, IO e b360 mA VOUT(0) Logical ‘‘0’’ Output Voltage ISOURCE Output Source Current (P-Channel) VCC e 5.0V, VOUT e 0V TA e 25§ C b 1.75 b 3.3 mA ISOURCE Output Source Current (P-Channel) VCC e 10V, VOUT e 0V TA e 25§ C b 8.0 b 15 mA ISINK Output Sink Current (N-Channel) VCC e 5.0V, VOUT e VCC TA e 25§ C 1.75 3.6 mA ISINK Output Sink Current (N-Channel) VCC e 10V, VOUT e VCC TA e 25§ C 8.0 16 mA 0.8 0.8 V V 2.4 2.4 V V 54C, VCC e 4.5V, IO e a 360 mA 74C, VCC e 4.75V, IO e a 360 mA OUTPUT DRIVE (See 54C/74C Family Characteristics Data Sheet) (Short Circuit Current) 0.4 0.4 V V Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Range’’ they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation. AC Electrical Characteristics* TA e 25§ C, CL e 50 pF, unless otherwise noted tpd Symbol Propagation Delay from Memory Enable Parameter Conditions VCC e 5V VCC e 10V tACC Access Time from Address Input VCC e 5V VCC e 10V tSA Address Setup Time VCC e 5V VCC e 10V 150 60 ns ns tHA Address Hold Time VCC e 5V VCC e 10V 60 40 ns ns tME Memory Enable Pulse Width VCC e 5V VCC e 10V 400 150 2 Min Typ Max Units 270 100 500 220 ns ns 350 130 650 280 ns ns 250 90 ns ns AC Electrical Characteristics* Symbol Parameter TA e 25§ C, CL e 50 pF, unless otherwise noted (Continued) tSR Write Enable Setup Time for a Read Conditions VCC e 5V VCC e 10V Min Typ Max tWS Write Enable Setup Time for a Write VCC e 5V VCC e 10V tWE Write Enable Pulse Width 300 100 tHD Data Input Hold Time VCC e 5V, tWS e 0 VCC e 10V, tWS e 0 VCC e 5V VCC e 10V 50 25 ns ns tSD Data Input Setup VCC e 5V VCC e 10V 50 25 ns ns t1H, t0H Propagation Delay from a Logical ‘‘1’’ or Logical ‘‘0’’ to the High Impedance State from Memory Enable VCC e 5V, CL e 5 pF, RL e 10k VCC e 10V, CL e 5 pF, RL e 10k b 85 300 120 ns ns t1H, t0H Propagation Delay from a Logical ‘‘1’’ or Logical ‘‘0’’ to the High Impedance State from Write Enable VCC e 50V, CL e 5 pF, RL e 10k VCC e 10V, CL e 5 pF, RL e 10k 180 85 300 120 ns ns CIN Input Capacity Any Input (Note 2) COUT Output Capacity Any Output (Note 2) 6.5 pF CPD Power Dissipation Capacity (Note 3) 230 pF 0 0 Units ns ns tME tME 160 60 180 ns ns ns ns 5 pF *AC Parameters are guaranteed by DC correlated testing. Note 2: Capacitance is guaranteed by periodic testing. Note 3: CPD determines the no load AC power consumption of any CMOS device. For complete explanation see 54C/74C Family Characteristics application note, AN-90. AC Electrical Characteristics* Guaranteed across the specified temperature range, CL e 50 pF Parameter Conditions MM54C89 TA e b55§ C to a 125§ C Min Max MM74C89 TA e b40§ C to a 85§ C Min Units Max tPD VCC e 5V VCC e 10V VCC e 15V 700 310 250 600 265 210 ns ns ns tACC VCC e 5V VCC e 10V VCC e 15V 910 400 320 780 345 270 ns ns ns tSA VCC e 5V VCC e 10V VCC e 15V 210 90 70 180 80 60 ns ns ns tHA VCC e 5V VCC e 10V VCC e 15V 80 55 45 70 50 40 ns ns ns tME VCC e 5V VCC e 10V VCC e 15V 560 210 170 480 180 150 ns ns ns tWE VCC e 5V VCC e 10V VCC e 15V 420 140 110 360 120 100 ns ns ns tHD VCC e 5V VCC e 10V VCC e 15V 70 35 30 60 30 25 ns ns ns *AC Parameters are guaranteed by DC correlated testing. 3 AC Electrical Characteristics* Guaranteed across the specified temperature range, CL e 50 pF (Continued) Parameter MM54C89 TA e b55§ C to a 125§ C Conditions Min tSD VCC e 5V VCC e 10V VCC e 15V t1H, t0H VCC e 5V VCC e 10V, CL e 5 pF VCC e 15V, RL e 10 kX Max 70 35 30 MM74C89 TA e b40§ C to a 85§ C Min Units Max 60 30 25 ns ns ns 420 170 135 360 145 115 ns ns ns *AC Parameters are guaranteed by DC correlated testing. Truth Table ME WE Operation Condition of Outputs L L H H L H L H Write Read Inhibit, Storage Inhibit, Storage TRI-STATE Complement of Selected Word TRI-STATE TRI-STATE AC Test Circuits t0H t1H TL/F/5888 – 3 TL/F/5888 – 4 Switching Time Waveforms t0H t1H TL/F/5888 – 6 TL/F/5888 – 5 Read Cycle Write Cycle TL/F/5888 – 8 TL/F/5888 – 7 4 Switching Time Waveforms (Continued) Read Modify Write Cycle TL/F/5888 – 9 Note: tr e 60 ns tf e 10 ns 5 MM54C89/MM74C89 64-Bit TRI-STATE Random Access Read/Write Memory Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number MM54C89J or MM74C89J NS Package Number J16A Molded Dual-In-Line Package (N) Order Number MM54C89N or MM74C89N NS Package Number N16E LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. 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