MM54HCT640/MM74HCT640 Inverting Octal TRI-STATEÉ Transceiver MM54HCT643/MM74HCT643 True-Inverting Octal TRI-STATE Transceiver General Description MM74HCT640 transfers inverted data from one bus to the other. The MM54HCT643/MM74HCT643 transfers inverted data from the A bus to the B bus and non-inverted data from the B bus to the A bus. MM54HCT/MM74HCT devices are intended to interface between TTL and NMOS components and standard CMOS devices. These parts are also plug-in replacements for LSTTL devices and can be used to reduce power consumption in existing designs. These TRI-STATE bi-directional transceivers utilize advanced silicon-gate CMOS technology and are intended for two-way asynchronous communication between data buses. They have high drive current outputs which enable high speed operation even when driving large bus capacitances. These circuits possess the low power consumption of CMOS circuitry, yet have speeds comparable to low power Schottky TTL circuits. All devices are TTL input compatible and can drive up to 15 LS-TTL loads, and all inputs are protected from damage due to static discharge by diodes to VCC and ground. Both the MM54HCT640/MM74HCT640 and the MM54HCT643/ MM74HCT643 have one active low enable input (G), and a direction control (DIR). When the DIR input is high, data flows from the A inputs to the B outputs. When DIR is low, data flows from B to A. The MM54HCT640/ Features Y Y Y Y TTL input compatible Octal TRI-STATE outputs for mP bus applications: 6 mA, typical High speed: 16 ns typical propagation delay Low power: 80 mA maximum (74HCT) Connection Diagram Dual-In-Line Packages TL/F/5370 – 1 TL/F/5370 – 2 Top View Order Number MM54HCT640 or MM74HCT640 Top View Order Number MM54HCT643 or MM74HCT643 Truth Table Control Inputs Operation G DIR 640 643 L L B data to A bus B data to A bus L H A data to B bus A data to B bus H X Isolation Isolation H e high level, L e low level, X e irrelevant TRI-STATEÉ is a registered trademark of National Semiconductor Corp. C1995 National Semiconductor Corporation TL/F/5370 RRD-B30M105/Printed in U. S. A. MM54HCT640/MM74HCT640 Inverting Octal TRI-STATE Transceiver MM54HCT643/MM74HCT643 True-Inverting Octal TRI-STATE Transceiver February 1988 Absolute Maximum Ratings (Notes 1 & 2) Operating Conditions If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage (VCC) Supply Voltage (VCC) DC Input Voltage (VIN) DC Output Voltage (VOUT) Clamp Diode Current (IIK, IOK) DC Output Current, per pin (IOUT) DC VCC or GND Current, per pin (ICC) Storage Temperature Range (TSTG) Power Dissipation (PD) (Note 3) S.O. Package only Lead Temperature (TL) DC Input or Output Voltage (VIN, VOUT) b 0.5 to a 7.0V b 1.5 to VCC a 1.5V Operating Temp. Range (TA) MM74HCT MM54HCT b 0.5 to VCC a 0.5V g 20 mA Min 4.5 Max 5.5 0 VCC Units V V b 40 b 55 a 85 a 125 §C §C 500 ns Input Rise or Fall Times (tr, tf) g 35 mA g 70 mA b 65§ C to a 150§ C 600 mW 500 mW (Soldering 10 seconds) 260§ C DC Electrical Characteristics VCC e 5V g 10% (unless otherwise specified) Symbol Parameter TA e 25§ C Conditions Typ 74HCT TA eb40 to 85§ C 54HCT TA eb55 to 125§ C Units Guaranteed Limits VIH Minimum High Level Input Voltage 2.0 2.0 2.0 V VIL Maximum Low Level Input Voltage 0.8 0.8 0.8 V VOH Minimum High Level Output Voltage VIN e VIH or VIL lIOUTl e 20 mA lIOUTl e 6.0mA, VCC e 4.5V lIOUTl e 7.2mA, VCC e 5.5V VCC 4.2 5.2 VCC-0.1 3.98 4.98 VCC-0.1 3.84 4.84 VCC-0.1 3.7 4.7 V V V Maximum Low Level Voltage VIN e VIH or VIL lIOUTl e 20 mA lIOUTl e 6.0mA, VCC e 4.5V lIOUTl e 7.2mA, VCC e 5.5V 0 0.2 0.2 0.1 0.26 0.26 0.1 0.33 0.33 0.1 0.4 0.4 V V V IIN Maximum Input Current VIN e VCC or GND, VIH or VIL g 0.1 g 1.0 g 1.0 mA IOZ Maximum TRI-STATE Output Leakage Current VOUT e VCC or GND Enable G e VIH g 0.5 g 5.0 g 10 mA ICC Maximum Quiescent Supply Current VIN e VCC or GND IOUT e 0mA 8 80 160 mA 1.0 1.3 1.5 mA VOL VIN e 2.4V or 0.5V (Note 4) Note 1: Note 2: Note 3: Note 4: 0.6 Absolute Maximum Ratings are those values beyond which damage to the device may occur. Unless otherwise specified all voltages are referenced to ground. Power Dissipation temperature derating Ð plastic ‘‘N’’ package: b 12 mW/§ C from 65§ C to 85§ C; ceramic ‘‘J’’ package: b 12 mW/§ C from 100§ C to 125§ C. Measured per input. All other inputs held at VCC or ground. AC Electrical Characteristics MM54HCT640/MM74HCT640 VCC e 5.0V, tr e tf e 6 ns, TA e 25§ C (unless otherwise specified) Symbol Parameter Conditions Typ Guaranteed Limits Units tPHL, tPLH Maximum Output Propagation Delay CL e 45 pF 16 20 ns tPZL, tPZH Maximum Output Enable Time CL e 45 pF RL e 1 kX 29 40 ns tPLZ, tPHZ Maximum Output Disable Time CL e 5 pF RL e 1 kX 20 25 ns 2 AC Electrical Characteristics MM54HCT640/MM74HCT640 VCC e 5.0V g 10%, tr e tf e 6 ns (unless otherwise specified) Symbol Parameter TA e 25§ C Conditions Typ tPHL, tPLH 74HCT TA eb40 to 85§ C 54HCT TA eb55 to 125§ C Units Guaranteed Limits Maximum Output Propagation Delay CL e 50 pF 17 23 29 34 ns CL e 150 pF 24 30 38 45 ns tPZH, tPZL Maximum Output Enable Time RL e 1kX 23 30 38 45 ns tPHZ, tPLZ Maximum Output Disable Time RL e 1kX CL e 50 pF 21 30 38 45 ns tTHL, tTLH Maximum Output Rise and Fall Time CL e 50 pF 8 12 15 18 ns CIN Maximum Input Capacitance 10 15 15 15 pF COUT Maximum Output/ Input Capacitance 20 25 25 25 pF CPD Power Dissipation Capacitance (Note 5) (per output) CL e 50 pF G e VCC G e GND 7 100 pF pF AC Electrical Characteristics MM54HCT643/MM74HCT643 VCC e 5.0V, tr e tf e 6 ns, TA e 25§ C (unless otherwise specified) Symbol Parameter Conditions Typ Guaranteed Limits Units tPHL, tPLH Maximum Output Propagation Delay CL e 45 pF 16 20 ns tPZL, tPZH Maximum Output Enable Time CL e 45 pF RL e 1 kX 29 40 ns tPLZ, tPHZ Maximum Output Disable Time CL e 5 pF RL e 1 kX 20 25 ns AC Electrical Characteristics MM54HCT643/MM74HCT643 VCC e 5.0V g 10%, tr e tf e 6 ns (unless otherwise specified) Symbol Parameter TA e 25§ C Conditions Typ tPHL, tPLH 74HCT TA eb40 to 85§ C 54HCT TA eb55 to 125§ C Units Guaranteed Limits Maximum Output Propagation Delay CL e 50 pF 17 23 29 34 ns CL e 150 pF 24 30 38 45 ns tPZH, tPZL Maximum Output Enable Time RL e 1 kX 23 30 38 45 ns tPHZ, tPLZ Maximum Output Disable Time RL e 1 kX CL e 50 pF 21 30 38 45 ns ns tTHL, tTLH Maximum Output Rise and Fall Time CL e 50 pF 8 12 15 18 ns CIN Maximum Input Capacitance 10 15 15 15 pF COUT Maximum Output/ Input Capacitance 20 25 25 25 pF CPD Power Dissipation Capacitance (Note 5) (per output) CL e 50 pF G e VCC G e GND 7 100 Note 5: CPD determines the no load power consumption. PD e CPDVCC2f a ICCVCC. The no load dynamic current consumption, IS e CPDVCC a ICC. 3 pF pF MM54HCT640/MM74HCT640 Inverting Octal TRI-STATE Transceiver MM54HCT643/MM74HCT643 True-Inverting Octal TRI-STATE Transceiver Physical Dimensions inches (millimeters) Cavity Dual-In line Package (J) Order Number MM54HCT640J, MM54HCT643J, MM74HCT640J, or MM74HCT643J See NS Package J20A LIFE SUPPORT POLICY Moulded Dual-In line Package (N) Order Number MM74HCT640N or MM74HCT643N See NS Package N20A NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation 1111 West Bardin Road Arlington, TX 76017 Tel: 1(800) 272-9959 Fax: 1(800) 737-7018 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 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