[AK1224] AK1224 900MHz Low Noise Mixer 1. Overview The AK1224 is a high linearity and low noise mixer. RF frequency range coverage is from 100 to 900MHz and IF coverage is from 20 to 100MHz. AK1224 can be driven by a single ended RF input and a low-power differential LO input that can be driven with a differential or single ended LO signal. IF output ports are differential open drain outputs. The analog circuit characteristics and power consumption performances can be optimized by the resistance connected to the BIAS Pin. 2. Feature Operating Frequency: Linearity vs. Power selectable architecture: 100MHz to 900MHz Current consumption:21mA, IIP3:+16dBm, Gain:5.5dB, NF:8.5dB Lo input level: 0dBm ±5dB Operating Supply Voltage: 4.75 to 5.25 V Package: 16pin UQFN（0.5mm pitch、3mm 3mm 0.60mm） Operating Temperature Range -40 to 85C MS1413-E-01 1 2013/05 [AK1224] 3. Table contents 1. Overview __________________________________________________________________________ 1 2. Feature ____________________________________________________________________________ 1 3. Table contents______________________________________________________________________ 2 4. Block Diagram ______________________________________________________________________ 3 5. Pin Function Description _____________________________________________________________ 4 6. Absolute Maximum Ratings ___________________________________________________________ 5 1. Recommended Operating Range ______________________________________________________ 5 7. Electrical Characteristics _____________________________________________________________ 6 8. Typical Performance _________________________________________________________________ 7 9. Typical Evaluation Board Schematic __________________________________________________ 14 10. LSI Interface schematic _____________________________________________________________ 16 11. Outer Dimensions __________________________________________________________________ 18 12. Marking __________________________________________________________________________ 19 MS1413-E-01 2 2013/05 [AK1224] 4. Block Diagram BIAS SELECT 15 VSS 16 IFOUTN VDD VDD 9 TOP VIEW 1 2 3 4 LOINN 14 10 VSS POWER DOWN_H 11 VSS 13 12 RFIN VSS IFOUTP Fig. 1 Block Diagram 8 VDD 7 BIAS2 6 BIAS1 5 LOINP Fig. 2 Package Pin Layout MS1413-E-01 3 2013/05 [AK1224] 5. Pin Function Description Table 1 No. Name I/O Pin Function Remarks Pin Function 1 RFIN AI RF Input Connecting a inductor between this pin and ground. 2 VSS G Ground pin 3 VSS G Ground pin 4 LOINN AI Lo Input Negative 5 LOINP AI Lo Input Positive 6 BIAS1 AIO Resistance pin for current Connecting a resistor between this pin and ground. adjustment 7 BIAS2 AIO Resistance pin for current Connecting a resistor between this pin and ground. adjustment 8 VDD P Power Supply VDD 9 VDD P Power Supply VDD 10 VDD P Power Supply VDD IFOUTN AO IF Output Negative This pin is open drain output. 11 It needs power feeding via an inductor. IFOUTP AO IF Output Positive This pin is open drain output. 12 It needs power feeding via an inductor. 13 VSS G Ground pin POWER DI Power Down control pin High：Power OFF 14 DOWN_H BIAS Low：Power ON DI Bias Resistance select pin High：Bias2 pin is enable 15 SELECT VSS Low：Bias1pin is enable G Ground pin 16 Note) The exposed pad at the center of the backside should be connected to ground. AI:Analog input pin P: Power supply pin MS1413-E-01 AO:Analog output pin G: Ground pin AIO:Analog I/O pin DI:Digital input pin 4 2013/05 [AK1224] 6. Absolute Maximum Ratings Table 2 Absolute Maximum Ratings Parameter Symbol Min. Max. Unit -0.3 5.5 V Supply Voltage VDD RF Input Power RFPOW 12 dBm LO Input Power LOPOW 12 dBm Storage Temperature Tstg 125 C -55 Remarks Exceeding these maximum ratings may result in damage to the AK1224. Normal operation is not guaranteed at these extremes. 1. Recommended Operating Range Table 3 Recommended Operating Range Parameter Symbol Min. Operating Temperature Ta -40 Supply Voltage VDD 4.75 Typ. 5 Max. Unit 85 C 5.25 V Remarks The specifications are applicable within the recommended operating range (supply voltage/operating temperature). MS1413-E-01 5 2013/05 [AK1224] 7. Electrical Characteristics 1. Analog Circuit Characteristics Unless otherwise noted IF output=50MHz, Lo Input Level=-5dBm to +5dBm, Output Load Resistor （RLoad）=2.2kΩ, VDD=4.75 to 5.25V, Ta=-40C to 85C Parameter Min. Typ. Max. Unit Remarks RF Input Frequency 100 900 MHz Lo Input Frequency 100 900 MHz IF output Frequency 20 100 MHz Lo Input Power -5 +5 dBm Current Adjustment Resistor(BIAS) 22 100 kΩ IDD (BIAS=22kΩ) 20 26 36 mA The total current of VDD IDD (BIAS=27kΩ) 16 21 30 mA pin, IFOUTP pin and IDD (BIAS =100kΩ) 4.5 6 8.5 mA IFOUTN pin. 1 10 uA IDD (POWERDOWN_H=VDD) 0 RFIN=600MHz, Current Adjustment Resistor=27k Conversion Gain 3.5 SSB Noise Figure 5.5 7.5 dB 8.5 11 dB IP1dB -3 0 dBm IIP3 13 16 dBm Design guarantee value 2. Digital Circuit Characteristics This table is for POWER DOWN_H pin and BIAS SELECT pin. Parameter Symbol Conditions High level input voltage Vih Low level input voltage Vil High level input current Iih Vih = VDD=5.25V Low level input current Iil Vil = 0V, VDD1=5.25V MS1413-E-01 MIN TYP MAX Remark V 0.8VDD 6 Unit 0.2VDD V -1 1 A -1 1 A 2013/05 [AK1224] 8. Typical Performance Unless otherwise noted, RF input =600MHz, Lo input =550MHz, IF output =50MHz, Output Load Resistor (RLoad)=2.2k 1. Current Adjustment Resistor vs. IIP, NF, P1dB, Gain, IDD 22 11 10 18 NF [dB] IIP3 [dBm] 20 16 14 9 8 12 7 10 8 6 20 30 40 50 60 70 80 90 100 20 30 40 R_Bias [kohm] 60 70 80 90 100 80 90 100 R_Bias [kohm] 12 8 10 6 8 Gain [dB] IP1dB [dBm] 50 6 4 2 4 2 0 0 -2 -2 -4 -4 20 30 40 50 60 70 80 90 100 R_Bias [kohm] 20 30 40 50 60 70 R_Bias [kohm] 30 IDD [mA] 25 20 15 10 5 0 20 30 40 50 60 70 80 90 100 R_Bias [kohm] Fig. 3 Current Adjustment Resistor vs. IIP3, NF, P1dB, Gain, IDD Note ) A resistor with 5% tolerance are used. MS1413-E-01 7 2013/05 [AK1224] 2. Over temperature vs. IIP3, NF, P1dB, Gain, IDD 22 11 10 18 NF [dB] IIP3 [dBm] 20 16 14 9 8 12 7 10 6 8 -40 -20 0 20 40 60 -40 80 -20 0 12 40 60 80 60 80 8 10 6 8 Gain [dB] IP1dB [dBm] 20 Temp [℃] Temp [℃] 6 4 2 4 2 0 0 -2 -2 -4 -4 -40 -20 0 20 40 60 80 -40 Temp [℃] -20 0 20 40 Temp [℃] 30 IDD [mA] 25 Resistance for current adjustment 20 22kohm 15 27kohm 10 100kohm 5 0 -40 -20 0 20 40 60 80 Temp [℃] Fig. 4 MS1413-E-01 Over temperature vs. IIP3, NF, IP1dB, Gain, IDD 8 2013/05 [AK1224] 3. Supply voltage vs. IIP3, NF, P1dB, Gain, IDD 22 11 10 18 NF [dB] IIP3 [dBm] 20 16 14 9 8 12 7 10 8 6 4.75 4.85 4.95 5.05 5.15 5.25 4.75 4.85 VDD [V] 5.05 5.15 5.25 5.15 5.25 VDD [V] 12 8 10 6 8 Gain [dB] IP1dB [dBm] 4.95 6 4 2 4 2 0 0 -2 -2 -4 -4 4.75 4.85 4.95 5.05 5.15 5.25 4.75 VDD [V] 4.85 4.95 5.05 VDD [V] 30 IDD [mA] 25 20 Resistance for current adjustment 15 22kohm 27kohm 10 100kohm 5 0 4.75 4.85 4.95 5.05 5.15 5.25 VDD [V] Fig. 5 MS1413-E-01 Supply voltage vs. IIP3, NF, IP1dB, Gain, IDD 9 2013/05 [AK1224] 4. RF input frequency vs. IIP3, NF, Gain 22 11 10 18 NF [dB] IIP3 [dBm] 20 16 14 8 12 7 10 8 6 100 200 300 400 500 600 700 800 900 100 200 300 400 500 600 700 800 900 RF [MHz] RF [MHz] 12 8 10 6 8 Gain [dB] IP1dB [dBm] 9 6 4 2 4 2 0 0 -2 -2 -4 -4 100 200 300 400 500 600 700 800 900 100 200 300 400 500 600 700 800 900 RF [MHz] RF [MHz] Resistance for current adjustment 22kohm 27kohm 100kohm Fig. 6 MS1413-E-01 RF input frequency vs. IIP3, NF, Gain 10 2013/05 [AK1224] 5. IF input frequency vs. IIP3, NF, Gain 22 11 10 18 NF [dB] IIP3 [dBm] 20 16 14 9 8 12 7 10 8 6 20 30 40 50 60 70 80 90 100 20 30 40 50 IF [MHz] 12 70 80 90 100 80 90 100 8 10 6 8 Gain [dB] IP1dB [dBm] 60 IF [MHz] 6 4 2 4 2 0 0 -2 -2 -4 -4 20 30 40 50 60 70 80 90 100 20 30 40 50 IF [MHz] 60 70 IF [MHz] Resistance for current adjustment 22kohm 27kohm 100kohm Fig. 7 MS1413-E-01 IF input frequency vs. IIP3, NF, Gain 11 2013/05 [AK1224] 6. Lo input power vs. IIP3, NF, Gain 22 11 10 18 NF [dB] IIP3 [dBm] 20 16 14 9 8 12 7 10 8 6 -20 -15 -10 -5 0 5 10 -20 -15 LO Level [dBm] -5 0 5 10 5 10 LO Level [dBm] 12 8 10 6 8 Gain [dB] IIP1dB [dBm] -10 6 4 2 4 2 0 0 -2 -2 -4 -4 -20 -15 -10 -5 0 5 10 -20 -15 -10 -5 0 LO Level [dBm] LO Level [dBm] Resistance for current adjustment 22kohm 27kohm 100kohm Fig. 8 MS1413-E-01 Lo input power vs. IIP3, NF, Gain 12 2013/05 [AK1224] 7. Output Load Resistor（RLoad） vs. IIP3, NF, Gain 22 11 10 18 NF [dB] IIP3 [dBm] 20 16 14 9 8 12 7 10 8 6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 0.8 1.0 1.2 RL [kohm] 12 1.6 1.8 2.0 2.2 1.8 2.0 2.2 8 10 6 8 Gain [dB] IP1dB [dBm] 1.4 RL [kohm] 6 4 2 4 2 0 0 -2 -2 -4 -4 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 0.8 1.0 RL [kohm] 1.2 1.4 1.6 RL [kohm] Resistance for current adjustment 22kohm 27kohm 100kohm Fig. 9 8. Output Load Resistor（RLoad） vs. IIP3, NF, Gain Leakage RFIN=600MHz,-20dBm, LO input=550MHz,0dBm, RLoad=2.2k, Ta=25℃ VDD=5V Parameter RF – LO Leakage RF – IF Leakage LO – RF Leakage LO – IF Leakage MS1413-E-01 BIAS Typ. Unit 22k -60 dBc 100k -58 dBc 22k -59 dBc 100k -60 dBc 22k -52 dBc 100k -55 dBc 22k -57 dBc 100k -56 dBc 13 2013/05 [AK1224] 9. Typical Evaluation Board Schematic 1. Typical Evaluation Board Schematic Fig.10 Typical Evaluation Board Schematic Note) The exposed pad at the center of the backside should be connected to ground. Note) The open drain output needs power feeding via a inductor. (IFOUTP pin and IFOUTN pin) Note) It is necessary to adjust impedance matching as to its setting frequency. (RF input and IF output) 2. Example of impedance matching ・RFIN RF Input C L MS1413-E-01 RFIN AK1224 Frequency[MHz] C1[pF] L[nH] Impedance[ohm] 100 68 220 49.3 - j5.4 600 15 22 48.3 - j0.7 900 12 12 44.48 – j1.0 14 2013/05 [AK1224] ・IFOUT VDD (Powefeeding for Open-drain Output) 10nF 100pF Output Load Resistor RLoad AK1224 IFOUTP VSS BALUN IF Output L R C IFOUTN 4:1 L VSS Frequency [MHz] 20 50 100 R1 [kohm] C [pF] 2.2 10 2.2 3.3 2.2 1.2 L [nH] 2200 1000 470 Impedance[ohm] *1 51.2 – j11.6 *1 51.6 – j0.6 *1 48.6 – j5.7 *1)Murata LQW series ・LOINP/LOINN LO Input 50ohm LOINP 10nF LOINN AK1224 10nF VSS MS1413-E-01 15 2013/05 [AK1224] 10. LSI Interface schematic No. Name I/O Function 1 RFIN I RF Input pin 4 LOINN I LO Input pins 5 LOINP 6 BIAS1 7 BIAS2 I/O Analog I/O pins 300Ω 11 IFOUTN 12 IFOUTP O IF Output pins IFOUTP IFOUTN MS1413-E-01 16 2013/05 [AK1224] 14 Power I Digital Input pins Down_H 15 BIAS Select 300Ω MS1413-E-01 17 2013/05 [AK1224] 11. Outer Dimensions 1 pin marking (Note 1) 1 4 16 5 13 8 12 9 Fig.11 Outer Dimensions Note 1. 1 pin marking is only a reference for the 1 pin location on the top of package. MS1413-E-01 18 2013/05 [AK1224] 12. Marking (a) Style : UQFN (b) Number of pins : 16 (c) 1 pin marking : ○ (d) Product number : 1224 (e) Date code : YWWL (4 digits) Y: Lower 1 digit of calendar year (Year 2012 → 2, 2013 → 3 ...) WW : Week L: Lot identification, given to each product lot which is made in a week LOT ID is given in alphabetical order (A, B, C…). 1224 YWWL (d) (e) ●(c) Fig.12 Marking MS1413-E-01 19 2013/05 [AK1224] IMPORTANT NOTICE 0. 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