AKD8181B AKD8181B AK8181B Evaluation Board The AKD8181B is an evaluation board for AK8181B. Therefore, it is easy to evaluate DC/AC characteristics and confirm product functions. - SMA terminal input Crystal can be mounted Enable to construct three types of output load circuit Preparing terminal and land pattern for VDD/VEE CLK_SEL and CLK_EN control switch VDD 【P VDD-2V VEE CLK_SEL CLK_EN Output pin Q0/Q0n CLK input Output pin Q1/Q1n Output pin Q2/Q2n Crystal Output pin Q3/Q3n 【P AKD8181B-E-00 1 2012/7 AKD8181B Power There are the following three power supplies. ※If you have configured a termination circuit with resistor only (Pattern A or B), it becomes possible to evaluate even without applying power to the VDD-2V terminal. The core power supply of AK8181B (3.3V) - VDD The core power supply of AK8181B (GND) - VEE Power supply for the end of the output load resistor (=VDD-2V) - VDD-2V Note) GND of the SMA terminal is connected to the VEE inside the substrate. Clock input AK8181B inputs the clock selected by CLK_SEL switch. (External input or crystal) The clock input signal can terminate at 50Ω if needed. (50Ω is connected to R2 pattern) Inputs 266MHz or less. Output load circuit It can terminate by the following three methods. (Pattern A/B/C) The state of initial shipment is 【Pattern A】. 【Pattern A】 ※Composition at the time of shipment 0Ω Q0,1,2,3 Zo=50Ω RTT 50Ω NC 50Ω NC 0.1uF or Open Q0N,1N, 2N,3N Zo=50Ω 0Ω 1 RTT Z0 ( V V ) /( V 2 ) 2 OL CC OH NC：No components ※RTT: 50Ω is mounted at the time of shipment 【Pattern B】 0Ω Q0,1,2,3 Zo=50Ω 84Ω 125Ω 84Ω 125Ω short Q0N,1N, 2N,3N AKD8181B-E-00 Zo=50Ω 0Ω 2 2012/7 AKD8181B 【Pattern C】 s possible to 50Ω Q0,1,2,3 Zo=50Ω NC NC NC NC short NC Q0N,1N, 2N,3N Zo=50Ω VDD-2V short 50Ω ※Please impress a power to VDD-2V terminal. AKD8181B-E-00 3 2012/7 AKD8181B According to the circumstances, please set up the output load circuit of Q0/0N, Q1/1N, Q2/2N and Q3/3N. The state of initial shipment is 【Pattern A】. （Refer to the "Output load circuit" at page 2. ） AKD8181B-E-00 4 2012/7