APA2177 25mW Stereo Cap-Free Headphone Driver Features General Description • Operating Voltage: 2.4V~5.5V • Supply Current The APA2177 is a stereo, fixed gain, single supply, and cap-free headphone driver, which is available in a WLCSP16 packages. The APA2177 is ground-reference output, and no need - IDD=2.1mA at VDD=3.6V • Low Shutdown Current the output capacitors for DC blocking. The advantages of eliminating the output capacitor are saving the cost, elimi- - IDD=0.7µA at VDD=3.6V • Ground Reference Output nating component height, and improving the low frequency response. - No Output Capacitor Required (for DC Blocking) - Save the PCB Space The internal selectable gain (0dB or 6dB) can minimize the external component counts and save the PCB space. - Reduce the BOM Costs - Improve the Low Frequency Response • High PSRR provides increased immunity to noise and RF rectification. Output Power 25mW/Ch into 16Ω at VDD=3.6V,THD+N=0.04% 20mW/Ch into 32Ω at VDD=3.6V,THD+N=0.02% • High PSRR: 90dB at 217Hz • Fast Start-Up Time: 4ms • Integrate the De-pop Circuitry • Thermal Protection • Surface-Mount Packaging The APA2177 is capable of driving 25mW at 3.6V into 16Ω load and provides thermal protection. Simplified Application Circuit RIN- WLCSP1.6x1.6-16 Stereo Input Signal RIN+ Stereo Headphone LIN+ LINROUT Applications • Handests • PDAs • Portable Multimedia Devices • Notebooks Shutdown Control SDN Gain Control Hi-Z Control GAIN APA2177 LOUT HI-Z ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright ANPEC Electronics Corp. Rev. A.1 - Jul., 2012 1 www.anpec.com.tw APA2177 Pin Configuration RIN(D4) ROUT (D3) GAIN (D2) HI-Z (D1) RIN+ (C4) SGND (C3) HPVSS (C2) CPN (C1) LIN+ (B4) HPVDD (B3) CPP (B2) GND (B1) LIN(A4) LOUT (A3) VDD (A2) SDN (A1) X Marking Date Code PIN A1 Ordering and Marking Information Package Code HA: WLCSP-16 Operating Ambient Temperature Range o I : -40 to 85 C APA2177 Assembly Material Handling Code Handling Code TR : Tape & Reel Assembly Material G : Halogen and Lead Free Device Temperature Range Package Code APA2177 HA : A77 X X - Date Code Note : ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight). Absolute Maximum Ratings Symbol VPGND_GND (Note 1) Parameter Rating Unit PGND to GND Voltage -0.3 to 0.3 -0.3 to 6.0 V/SDN Supply Voltage (VDD to GND and SGND) Headphone Amplifier Supply Voltage (HPVDD to GND and SGND) Input Voltage (/SDN to GND) GND-0.3 to VDD+0.3 VGAIN Input Voltage (GAIN to GND) GND-0.3 to VDD+0.3 VHI-Z Input Voltage (HI-Z to GND) GND-0.3 to VDD+0.3 VDD HPVDD HPVSS HPVSS to GND and SGND Voltage Copyright ANPEC Electronics Corp. Rev. A.1 - Jul., 2012 -0.3 to 2.3 V -2.3 to 0.3 2 www.anpec.com.tw APA2177 Absolute Maximum Ratings (Cont.) Symbol (Note 1) Parameter Rating Unit VOUT ROUT and LOUT to GND Voltage VCPP CPP to GND Voltage GND-0.3 to HPVDD+0.3 VCPN CPN to GND Voltage HPPVSS-0.3 to GND+0.3 TJ HPVSS-0.3 to HPVDD+0.3 Maximum Junction Temperature V 150 TSTG Storage Temperature Range TSDR Maximum Soldering Temperature Range o -65 to +150 C 260, 10 seconds PD Power Dissipation Internally Limited W Note1: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability Thermal Characteristics Symbol Parameter Typical Value Unit Thermal Resistance - Junction to Ambient (Note 2) θJA O WLCSP-16 160 C/W Note 2: Please refer to “Thermal Consideration”. 2 layered printed circuit boards with 2oz trace and copper through several thermal vias. The thermal pad is soldered on the PCB. Recommended Operating Conditions Parameter Symbol VDD Range Supply Voltage Unit 2.4 ~ 5.5 VIH High Level Threshold Voltage SDN, GAIN, HI-Z VIL Low Level Threshold Voltage SDN, GAIN, HI-Z 1.3 ~ VDD 0 ~ 0.6 Voltage applied to Output; OUTR, OUTL (when SDN = 0 V) -0.3 ~ 3.6 Voltage applied to Output; OUTR, OUTL (when SDN ≧ 1.3 V and HI–Z ≧ 1.3 V) -1.8 ~ 1.8 TA Operating Ambient Temperature Range -40 ~ 85 TJ Operating Junction Temperature Range -40 ~ 125 RL Headphone Resistance 16 ~ 100k V Ο C Ω Electrical Characteristics o VDD=3.6V, VGND=VPGND=0V, V/SDN=VDD, CCPF=CCPO=1µF, Ci=1µF, TA=25 C (unless otherwise noted) Symbol Parameter APA2177 Test Conditions Unit Min. Typ. Max. - 2.5 3.5 IDD VDD Supply Current ISD VDD Shutdown Current VSDN=0V - 1 2 Input current SDN - 0.1 - 400 500 600 kHz - 15 - Ω II mA µA CHARGE PUMP fOSC Switching Frequency Req Equivalent Resistance Copyright ANPEC Electronics Corp. Rev. A.1 - Jul., 2012 3 www.anpec.com.tw APA2177 Electrical Characteristics (Cont.) o VDD=3.6V, VGND=VPGND=0V, V/SDN=VDD, CCPF=CCPO=1µF, Ci=1µF, TA=25 C (unless otherwise noted) Symbol Parameter Test Condition Min. Typ. Max. Unit Drivers AV △AV Ri Internal Voltage Gain PO VO THD+N -2.0 -2.05 - 1 - V/V % - 19.8 - 13.2 - SDN = 0V - 10 - SDN = HI-Z ＞ 1.3 V, fin=10kHz - 35 - SDN = HI-Z ＞ 1.3 V, fin=1MHz - 17 - SDN = 0 V (shutdown mode) - 25 - Ω VDD=2.5V to 5.5V, RL = 16Ω - 0.5 - mV - 7 - µVRMS fin= 217Hz - -90 - fin= 10kHz - -80 - Maximum Capacitive Load - 220 - pF Start up time - 4 - ms kV Output Impedance Output Noise VESD -1.95 - VN Tstart-up -1.05 GAIN ＞1.3V(6dB) Output Offset Voltage CL -1.0 GAIN = 0V(0dB) Input Resistance VOS PSRR -0.95 VGAIN＞1.3V, No Load Gain Matching Input Resistance in shutdown ZO VGAIN=0V, No Load Power Supply Rejection Ratio ESD Protection Vrr=0.2VPP, RL=16 Ω, input AC-Ground OUTR, OUTL - 8 - RL=16 Ω - 25 - Output Power (Stereo, In Phase) THD+N=1%, fin=1kHz RL=32 Ω - 22 - Output Voltage (Stereo, In Phase) THD+N=1%, fin=1kHz, RL=100Ω - 1.1 - PO=20mW, RL=16 Ω, fin=1kHz - 0.04 - PO=25mW, RL=32 Ω, VDD=5.5V, fin=1kHz - 0.02 - - 80 - Total Harmonic Distortion Pulse Noise Channel separation PO=20mW, RL=16 Ω Attshutdown Shutdown Attenuation fin =1kHz, RL=16 Ω, Vin=1Vrms - 80 - PO=20mW, RL=16Ω GAIN = 0V(AV=0dB), With A-weighting Filter - 95 - S/N Copyright ANPEC Electronics Corp. Rev. A.1 - Jul., 2012 4 kΩ dB mW VRMS % Crosstalk fin=1kHz kΩ dB www.anpec.com.tw APA2177 Pin Description PIN Function Description I/O/P WLCS P Name A1 SDN I Shutdown mode control pin. A low-level voltage applied on this pin shuts off the headphone driver. A2 VDD P Supply voltage input pin. A3 LOUT O Left channel output for headphone. A4 LIN- I Left channel audio signal inverting input pin. B1 GND P Ground connection for circuitry. B2 CPP P Charge pump flying capacitor positive connection. B3 HPVDD P Positive power supply for headphone amplifiers. B4 LIN+ I Left channel audio signal non-inverting input pin. C1 CPN P Charge pump flying capacitor negative connection. C2 HPVSS P Charge pump output. C3 SGND I Amplifier reference voltage. C4 RIN+ I Right channel audio signal non-inverting input pin. I Output impedance select. Set to logic LOW for normal operation and logic HIGH for high output impedance. D1 HI-Z D2 GAIN I Gain select. Set to logic LOW for a gain of 0dB and to HIGH for a gain of 6dB. D3 ROUT O Right channel output for headphone. D4 RIN- I Right channel audio signal inverting input pin. Copyright ANPEC Electronics Corp. Rev. A.1 - Jul., 2012 5 www.anpec.com.tw APA2177 Typical Operating Characteristics THD+N vs. Output Power THD+N vs. Output Power 10 10 RL=16Ω f=1kHz RL=32Ω f=1kHz VDD=3.6V in Phase V DD=3.6V in Phase VDD=2.4V in Phase V DD=3.6V Out of Phase V DD=2.4V Out of Phase 0.1 VDD=2.4V in Phase 1 THD+N (%) THD+N (%) 1 VDD=3.6V Out of Phase VDD=2.4V Out of Phase 0.1 0.01 0 10m 30m 20m Output Power (W) 40m 0.01 0 50m 10m 20m 30m 40m 50m Output Power (W) THD+N vs. Frequency THD+N vs. Frequency R 1 R R R R R RL=16Ω VDD=2.4V R R R R RL=16Ω VDD=3.6V 1 Po=1mW THD+N (%) THD+N (%) Po=1mW 0.1 Po=4mW Po=10mW 0.1 0.01 0.01 0.001 20 100 1k 0.001 20 10k 20k 100 1 R R R RR RR R R R R RL=16Ω VDD=5.5V 1 THD+N (%) Po=1mW 0.1 Po=20mW Po=10mW RL=32Ω VDD=2.4V Po=1mW 0.1 Po=10mW Po=4mW 0.01 0.01 0.001 20 10k 20k THD+N vs. Frequency THD+N vs. Frequency R 1k Frequency (Hz) Frequency (Hz) THD+N (%) Po=10mW Po=20mW 100 1k 0.001 20 10k 20k 1k 10k 20k Frequency (Hz) Frequency (Hz) Copyright ANPEC Electronics Corp. Rev. A.1 - Jul., 2012 100 6 www.anpec.com.tw APA2177 Typical Operating Characteristics THD+N vs. Frequency THD+N vs. Frequency RR RRR R R RR RRR R R RL=32Ω VDD=3.6V RL=32Ω VDD=5.5V 1 Po=1mW 0.1 Po=20mW 0.01 THD+N (%) THD+N (%) 1 Po=10mW Po=1mW 0.1 Po=20mW 0.01 0.001 20 100 1k 0.001 20 10k 20k 100 1k Frequency (Hz) THD+N=10% 40 40 35 35 30 THD+N=1% 25 20 30 15 10 5 5 0 0 3.5 4 4.5 5 5.5 THD+N=1% 20 10 3 THD+N=10% 25 15 2.5 RL=32Ω 45 Po(mW) Po(mW) OUTPUT POWER VS SUPPLY VOLTAGE 50 RL=16Ω 45 2.5 3 3.5 Vdd(V) 1.8 f=1kHz THD+N=1% TTTTTTTTTTTTTT -60 5 5.5 TT RL=16Ω Vrr=0.2Vpp -70 1.4 1.2 PSRR(dB) Output Voltage(Vrms) 4.5 PSRR VS Frequency -50 RL=600Ω 1.6 4 Vdd(V) OUTPUT VOLTAGE VS SUPPLY VOLTAGE 2 10k 20k Frequency (Hz) OUTPUT POWER VS SUPPLY VOLTAGE 50 Po=10mW RL=32Ω 1 0.8 RL=16Ω 0.6 -80 VDD=2.4V -90 VDD=5.5V VDD=3.6V -100 0.4 -110 0.2 0 2.5 3 3.5 4 4.5 5 -120 20 5.5 VDD-Supply Voltage(V) Copyright ANPEC Electronics Corp. Rev. A.1 - Jul., 2012 100 1k 10k 20k Frequency (Hz) 7 www.anpec.com.tw APA2177 Typical Operating Characteristics Output Noise Voltage vs. Frequency PSRR vs. Frequency -50 T T TT T T T T TT T T T T T RL=32Ω Vrr=0.2Vpp RL=16Ω Output Noise Voltage(Vrms) -60 PSRR(dB) -70 -80 VDD=2.4V VDD=5.5V -90 VDD=3.6V -100 -110 10µ 20 100 1k VDD=3.6V 5µ 3µ 2µ 10k 20k 20 100 1k Frequency (Hz) Crosstalk vs. Frequency -60 TT T T T TT T 7µ VDD=2.4V VDD=3.6V 5µ 4µ Crosstalk(dB) Output Noise Voltage(Vrms) -70 VDD=5.5V T T T TT T VDD=3.6V RL=16Ω Po=20mW RL=32Ω 3µ 2µ -80 -90 Right to Left -100 Left to Right -110 1µ 20 100 1k -120 20 10k 20k 100 Frequency (Hz) -70 TTTTT T TTT Supply Current vs. Supply Voltage VDD=3.6V RL=32Ω Po=20mW 7 -80 -90 Right to Left -100 -110 -120 Left to Right 20 10k 20k 8 T TT IDD-Supply Current(mA) T 1k Frequency (Hz) Crosstalk vs. Frequency -60 Crosstalk(dB) 10k 20k Frequency (Hz) Output Noise Voltage vs. Frequency 10µ VDD=2.4V 4µ 1µ -120 VDD=5.5V 7µ 100 1k 6 5 4 3 2 1 0 2.5 10k 20k 3 3.5 4 4.5 5 5.5 VDD-Supply Voltage(V) Frequency (Hz) Copyright ANPEC Electronics Corp. Rev. A.1 - Jul., 2012 SDN=1.3V No Load 8 www.anpec.com.tw APA2177 Typical Operating Characteristics Supply Current vs. Output Power Supply Current vs. Output Power 100 100 RL=16Ω f=1kHz 90 80 70 VDD=3.6V VDD=5.5V 60 50 40 30 70 50 30 20 10 10 0 40 5 10 15 20 25 30 VDD=3.6V VDD=5.5V 40 20 0 VDD=2.4V 60 35 0 5 10 15 20 25 30 Output Power(mW) Output Power(mW) HI-Z Output Impedance vs. Frequency GSM Power Supply Rejection vs. Frequency -20 -40 30 -60 25 -80 20 -100 15 10 Vout(dBV) HI-Z Output Impedance (kΩ) 35 35 VDD(dBV) VDD=2.4V Supply Current(mA) Supply Current(mA) 80 0 RL=32Ω f=1kHz 90 5 0 10 100 1000 10k 100k 1M -120 -140 -160 Frequency(Hz) Copyright ANPEC Electronics Corp. Rev. A.1 - Jul., 2012 -100 0 400 800 1.2k 1.6k 2k Frequency(Hz) 9 www.anpec.com.tw APA2177 Operating Waveforms Shutdown Release Shutdown VDD=3.6V RL=16Ω CH1:2V/Div,DC CH2:2V/Div,DC Time:2ms/Div SDN SDN 1 2 VOUT VDD=3.6V RL=16Ω CH1:2V/Div,DC CH2:2V/Div,DC Time:2ms/Div Copyright ANPEC Electronics Corp. Rev. A.1 - Jul., 2012 VOUT 10 www.anpec.com.tw APA2177 Block Diagram VDD Supply Control RINRIN+ LINLIN+ HPVDD HPVDD ROUT Resistor Array HPVSS HPVDD LOUT Resistor Array HPVSS HPVDD SDN GAIN HI-Z Control Power and Depop Circuit SGND Copyright ANPEC Electronics Corp. Rev. A.1 - Jul., 2012 Charge Pump PGND 11 CPP CPN HPVSS www.anpec.com.tw APA2177 Typical Application Circuit Differential Input ROUT- Ci1 0.68µF RIN- ROUT+ RIN+ Ci2 0.68µF AUDIO DAC HPVDD Resistor Array Resistor Array LIN+ LOUT+ Headphone Jack HPVSS HPVDD Ci3 0.68µF LIN- LOUT- ROUT Ci4 0.68µF LOUT PGND HPVSS HPVDD SDN Shutdown Control GAIN Gain Control HI-Z HI-Z Control VDD CS 2.2µF CPP Power and Depop Circuit Control HPVDD CCPB 2.2µF Charge Pump PGND CPN CCPF 1µF HPVSS CCPO 1µF Single-Ended Input ROUT Ci1 1µF RINRIN+ HPVDD Resistor Array AUDIO DAC LOUT Ci3 1µF LINLIN+ ROUT Headphone Jack HPVSS HPVDD Resistor Array LOUT PGND HPVSS HPVDD SDN Shutdown Control GAIN Gain Control Control HI-Z HI-Z Control VDD CS 2.2µF Copyright ANPEC Electronics Corp. Rev. A.1 - Jul., 2012 HPVDD CCPB 2.2µF 12 Power and Depop Circuit CPP Charge Pump PGND CPN CCPF 1µF HPVSS CCPO 1µF www.anpec.com.tw APA2177 Function Description Headphone Driver Operation Shutdown Function In order to reduce power consumption while not in use, the APA2177 contains shutdown controllers to externally VDD turns off the amplifier bias circuitry. This shutdown feature turns the amplifier off when logic low is placed on the VOUT VDD/2 SDN pins for the APA2177. The trigger point between a logic high is 1.0V and logic low level is 0.35V. It is recomGND mended to switch between ground and the supply voltage VDD to provide maximum device performance. By Conventional Headphone Driver switching the SDN pins to a low level, the amplifier enters a low-consumption current circumstance, charge pump VDD is disabled, and IDD for the APA2177 is in shutdown mode. In normal operating, the APA2177’s SDN pins should be pulled to a high level to keep the IC out of the shutdown mode. The SDN pins should be tied to a definite voltage VOUT GND to avoid unwanted circumstance changes. VSS Cap-free Headphone Driver Figure 1. Cap-free Operation The APA2177’s headphone drivers use a charge pump to invert the positive power supply (VDD) to negative power supply (VSS), see figure1. The headphone drivers operate at this bipolar power supply (VDD and VSS) and the outputs reference refers to the ground. This feature eliminates the output capacitor that is using in conventional single-ended headphone drive amplifier. Compare with the single power supply amplifier, the power supply range has almost doubled. Thermal Protection The thermal protection circuit limits the junction temperature of the APA2177. When the junction temperature exceeds TJ = +150oC, a thermal sensor turns off the driver, allowing the devices to cool. The thermal sensor allows the driver to start-up after the junction temperature down about 125oC. The thermal protection is designed with a 25oC hysteresis to lower the average TJ during continuous thermal overload conditions, increasing lifetime of the ICs. Copyright ANPEC Electronics Corp. Rev. A.1 - Jul., 2012 13 www.anpec.com.tw APA2177 Application Information Input Capacitor, Ci The optimum decoupling is achieved by using two differ- In the typical application, an input capacitor, Ci, is required ent types of capacitor that target on different types of noise on the power supply leads. For higher frequency to allow the amplifier to bias the input signal to the proper DC level for optimum operation. In this case, Ci and the transients, spikes, or digital hash on the line, a good low equivalent-series- resistance (ESR) ceramic capacitor, minimum input impedance Ri from a high-pass filter with the corner frequency are determined in the following typically 0.1µF, is placed as close as possible to the device VDD lead for the best performance. For filtering lower equation: fC(highpass ) = 1 2πRifCi frequency noise signals, a large aluminum electrolytic capacitor of 1µF or greater placed near the audio power (1) amplifier is recommended. The value of Ci is important to consider as it directly affects the low frequency performance of the circuit. Ri is Charge pump flying capacitor, CCPF the internal input resistance that typical value is 13.2KΩ at 6dB and the specification calls for a flat bass response The flying capacitor affects the load transient of the charge pump. If the capacitor’s value is too small, then that will down to 20Hz. Equation is reconfigured as below: 1 Ci = 2πRifC degrade the charge pump’s current driver capability and the performance of headphone drive amplifier. (2) Increasing the flying capacitor’s value will improve the load transient of charge pump. It is recommend using Consider to input resistance variation, the Ci is 0.6µF so one would likely choose a value in the range of 0.6µF to 1µF. A further consideration for this capacitor is the leak- the low ESR ceramic capacitors (X7R type is recommended) above 1µF. age path from the input source through the input network (Ri + Rf, Ci) to the load. Charge pump output capacitor, CCPO This leakage current creates a DC offset voltage at the input to the amplifier that reduces useful headroom, es- The output capacitor’s value affects the power ripple directly at HPVSS. Increasing the value of output capacitor reduce the power ripple. The ESR of output capacitor pecially in high gain applications. For this reason, a low leakage tantalum or ceramic capacitor is the best choice. affects the load transient of HPVSS. Lower ESR and greater than 1µF ceramic capacitor is recommendation. When polarized capacitors are used, the negative side of the capacitor should face the amplifier input in most applications as the DC level there is held at GND, which is likely lower than the source DC level. Please note that it is important to confirm the capacitor polarity in the application. Power Supply Decoupling (Cs) The APA2177 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to ensure the output total harmonic distortion (THD+N) is as low as possible. Power supply decoupling also prevents the oscillations causing by long lead length between the amplifier and the speaker. Copyright ANPEC Electronics Corp. Rev. A.1 - Jul., 2012 14 www.anpec.com.tw APA2177 Application Information Layout Recommendation 16 x Φ0.25mm 0.4mm 0.4mm Figure : WLCSP-16 land pattern recommendation 1. All components should be placed close to the APA2177. For example, the input capacitor (CiR, CiL) should be close to APA2177 input pins to avoid causing noise coupling to APA2177 high impedance inputs; the decoupling capacitor (CS) should be placed by the APA2177 power pin to decouple the power rail noise. 2. The output traces should be short, wide (>50mil), and symmetric. 3. The input trace should be short and symmetric. 4. The power trace width should be greater than 50mil. 5. The input trace and output trace should be away from CCPF and CCPB possible. Copyright ANPEC Electronics Corp. Rev. A.1 - Jul., 2012 15 www.anpec.com.tw APA2177 Package Information E WLCSP1.6x1.6-16 PIN D A2 D A1 A NX aaa C e SEATING PLANE e/2 b S Y M B O L WLCSP1.6x1.6-16 MILLIMETERS MIN. INCHES MAX. A A1 e MIN. MAX. 0.63 0.12 0.025 0.30 0.005 0.012 0.013 A2 0.27 0.33 0.011 b 0.20 0.30 0.008 0.012 D 1.54 1.60 0.061 0.063 E 1.54 1.60 0.061 0.063 e aaa Copyright ANPEC Electronics Corp. Rev. A.1 - Jul., 2012 0.4 BSC 0.016 BSC 0.05 0.002 16 www.anpec.com.tw APA2177 Carrier Tape & Reel Dimensions P0 P2 P1 A B0 W F E1 OD0 K0 A0 A OD1 B B T SECTION A-A SECTION B-B H A d T1 Application A H T1 C d D W E1 F 178.0±2.00 50 MIN. 8.4+2.00 -0.00 13.0+0.50 -0.20 1.5 MIN. 20.2 MIN. 8.0±0.30 1.75±0.10 3.5±0.05 P0 P1 P2 D0 D1 T A0 B0 K0 2.0±0.05 1.5+0.10 -0.00 1.5 MIN. 0.6+0.00 -0.40 1.75±0.15 1.75±0.15 0.75±0.10 WLCSP1.6x1.6-16 4.0± 0.10 4.0±0.10 (mm) Devices Per Unit Package Type Unit Quantity WLCSP1.6x1.6-16 Tape & Reel 3000 Copyright ANPEC Electronics Corp. Rev. A.1 - Jul., 2012 17 www.anpec.com.tw APA2177 Taping Direction Information WLCSP1.6x1.6-16 USER DIRECTION OF FEED Classification Profile Copyright ANPEC Electronics Corp. Rev. A.1 - Jul., 2012 18 www.anpec.com.tw APA2177 Classification Reflow Profiles Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly 100 °C 150 °C 60-120 seconds 150 °C 200 °C 60-120 seconds 3 °C/second max. 3°C/second max. 183 °C 60-150 seconds 217 °C 60-150 seconds See Classification Temp in table 1 See Classification Temp in table 2 Time (tP)** within 5°C of the specified classification temperature (Tc) 20** seconds 30** seconds Average ramp-down rate (Tp to Tsmax) 6 °C/second max. 6 °C/second max. 6 minutes max. 8 minutes max. Preheat & Soak Temperature min (Tsmin) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts) Average ramp-up rate (Tsmax to TP) Liquidous temperature (TL) Time at liquidous (tL) Peak package body Temperature (Tp)* Time 25°C to peak temperature * Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum. ** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum. Table 1. SnPb Eutectic Process – Classification Temperatures (Tc) 3 Package Thickness <2.5 mm Volume mm <350 235 °C Volume mm ≥350 220 °C ≥2.5 mm 220 °C 220 °C 3 Table 2. Pb-free Process – Classification Temperatures (Tc) Package Thickness <1.6 mm 1.6 mm – 2.5 mm ≥2.5 mm Volume mm <350 260 °C 260 °C 250 °C 3 Volume mm 350-2000 260 °C 250 °C 245 °C 3 Volume mm >2000 260 °C 245 °C 245 °C 3 Reliability Test Program Test item SOLDERABILITY HOLT PCT TCT HBM MM Latch-Up Copyright ANPEC Electronics Corp. Rev. A.1 - Jul., 2012 Method JESD-22, B102 JESD-22, A108 JESD-22, A102 JESD-22, A104 MIL-STD-883-3015.7 JESD-22, A115 JESD 78 19 Description 5 Sec, 245°C 1000 Hrs, Bias @ Tj=125°C 168 Hrs, 100%RH, 2atm, 121°C 500 Cycles, -65°C~150°C VHBM≧2KV VMM≧200V 10ms, 1tr≧100mA www.anpec.com.tw APA2177 Customer Service Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 2F, No. 11, Lane 218, Sec 2 Jhongsing Rd., Sindian City, Taipei County 23146, Taiwan Tel : 886-2-2910-3838 Fax : 886-2-2917-3838 Copyright ANPEC Electronics Corp. Rev. A.1 - Jul., 2012 20 www.anpec.com.tw