APL3212A/B/C Li+ Charger Protection IC Features General Description • Provide Input Over-Voltage Protection The APL3212A/B/C provide complete Li+ charger protec- • Programmable Input Over-Current Protection • Battery Over-Voltage 4.35V/4.435V Protection tions against over-voltage, over-current, and battery overvoltage. The IC is designed to monitor input voltage, in- • • Over-Temperature Protection High Immunity of False Triggering • High Accuracy Protection Thresholds • Fault Status Indication • Enable Input • Available in TDFN2x2-8 Package • Lead Free and Green Devices Available put current, and battery voltage. When any of the monitored parameters are over the threshold, the IC removes the power from the charging system by turning off an internal switch. All protections also have deglitch time against false triggering due to voltage spikes or current transients. The APL3212A/B/C also provide over-temperature protection, a FAULT output pin to indicate the fault conditions, and the EN pin to allow the system to disable the IC. (RoHS Compliant) Simplified Application Circuit Applications • Smart Phones and PDAs • Digital Still Cameras • 5V Adapter or USB Portable Devices Charger Input ACIN OUT APL3212A/B/C EN Pin Configuration FAULT ILIM ACIN 1 GND 2 BATSL 3 FAULT 4 Charger Output and System BATSL 8 OUT 7 ILIM 6 BAT 5 EN BAT GND Li+ Battery TDFN2x2-8 (Top View) = Exposed Pad (connected to ground plane for better heat dissipation) ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 1 www.anpec.com.tw APL3212A/B/C Ordering and Marking Information Package Code QB : TDFN2x2-8 Operating Ambient Temperature Range I : -40 to 85 oC Handling Code TR : Tape & Reel Assembly Material G : Halogen and Lead Free Device APL3212A/B/C Assembly Material Handling Code Temperature Range Package Code APL3212A QB: L12A X X - Date Code APL3212B QB: L12B X X - Date Code APL3212C QB: L12C X X - Date Code Note : ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight). Absolute Maximum Ratings (Note 1) Symbol VACIN VOUT, VBAT VLIM, VFAULT , VEN, VBATSL TJ TSTG TSDR Parameter Rating Unit IN Input Voltage (ACIN in to GND) -0.3 to 30 V OUT, BAT Pins to GND Voltage -0.3 to 7 V ILIM, FAULT, EN,BATSL to GND Voltage -0.3 to 7 V Maximum Junction Temperature Storage Temperature Range Maximum Lead Soldering Temperature,10 Seconds 150 o -65 to 150 o 260 o C C C Note1: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Thermal Characteristics Symbol θJA Parameter Junction to Ambient Thermal Resistance in Free Air Typical Value Unit 75 °C/W (Note 2) TDFN2x2-8 Note 2 :θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. Copyright ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 2 www.anpec.com.tw APL3212A/B/C Recommended Operating Conditions Symbol (Note3) Range Unit VACIN ACIN Input Voltage Parameter 4.5 to 5.5 V IOUT OUT Output Current 0 to 2 A TJ Junction Temperature -40 to 125 °C TA Ambient Temperature -40 to 85 °C Note 2 : Refer th the typical application circuit. Electrical Characteristics Refer to the typical application circuit. These specifications apply over VIN=5V, TA= -40~85°C, unless otherwise specified. Typical values are at TJ=25°C. Symbol Parameter APL3212A/B/C Test Conditions Min. Typ. Unit Max. ACIN INPUT CURRENT AND POWER-ON-RESET(POR) IACIN ACIN Supply Current VACIN ACIN POR Threshold EN = Low - 250 350 EN = High - 100 150 2.4 2.6 2.8 VIN rising ACIN POR Hysteresis TB(ACIN) µA V 200 250 300 VIN rising to VOUT rising - 8 - ms Power Switch On Resistance IOUT = 0.8A - 130 - mΩ OUT Discharge Resistance VOUT = 3V - 500 - Ω 5.7 5.85 6.0 APL3212B, TJ=-40~125 C 6.6 6.8 7.0 APL3212C TJ=-40~125oC 7.0 7.2 7.4 - 250 - ACIN Power-On Blanking Time INTERNAL SWITCH ON RESISTANCE RON INPUT OVER-VOLTAGE PROTECTION (OVP) APL3212A, TJ=-40~125oC VOVP Input OVP Threshold o Input OVP Hysteresis Input OVP Propagation Delay TON(OVP) VACIN=5 to 12V, IUT=10mA Input OVP Recovery Time V mV - 1 - µs - 8 - ms 900 1000 1100 mA -10 - +10 % - 3 - A OVER-CURRENT PROTECTION (OCP) OCP Threshold IOCP IOCP(MAX) OCP Accuracy Maximum OCP Threshold ROCSET=25kΩ, TJ=25oC IOCP=800mA~2500mA(or 1A~1.5A), TJ=25oC o ROCSET=0Ω, TJ=25 C TB(OCP) OCP Blanking Time - 176 - µs TON(OCP) OCP Recovery Time - 64 - ms Copyright ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 3 www.anpec.com.tw APL3212A/B/C Electrical Characteristics Refer to the typical application circuit. These specifications apply over VIN=5V, TA= -40~85°C, unless otherwise specified. Typical values are at TA=25°C. Symbol Parameter APL3212A/B/C Test Conditions Unit Min. Typ. Max. 4.4 4.435 4.47 V 4.30 4.35 4.40 V 200 250 300 mV - - 20 nA - 176 - µs BATSL Input Logic High 1.4 - - V BATSL Input Logic Low - - 0.4 V - 1.5 - µA 1.4 - - V BATTERY OVER-VOLTAGE PROTECTION VBOVP Battery OVP Threshold BATSL = Low or Floating, TJ = -40 ~ 125oC BATSL = High, TJ = -40 ~ 125oC Battery OVP Hysteresis IBAT TB(BOVP) BAT Pin Leakage Current VBAT = 4.4V Battery OVP Blanking Time BATSL LOGIC LEVELS VBATSL IBATSL BATSL Input Current VBATSL = 3.3V EN LOGIC LEVELS EN Input Logic High VEN EN Input Logic Low - - 0.4 V EN Internal Pull-Low Resistor - 500 - kΩ FAULT LOGIC LEVELS AND DELAY TIME VFAULT FAULT Output Low Voltage Sink 5mA current - - 0.4 V FAULT Leakage Current VFAULT = 5V - - 1 µA Thermal Shutdown Threshold - 140 - °C Thermal Shutdown Hysteresis - 20 - °C Thermal Shutdown Protection TOTP Copyright ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 4 www.anpec.com.tw APL3212A/B/C Typical Operating Characteristics Input OVP Threshold vs. Junction Temperature Battery OVP Threshold vs. Junction Temperature 4.6 6.7 Battery OVP Threshold,VBOVP (V) Input OVP Threshold,VOVP (V) 6.8 VIN Increasing 6.6 6.5 6.4 VIN Decreasing 6.3 6.2 -40 0 40 80 Junction Temperature (oC) 4.5 4.4 VBAT Increasing 4.3 4.2 4 120 -40 IN Supply Current,ICC (µA) Battery OVP Threshold,VBOVP (V) 4.3 VBAT Increasing 4.2 4.1 VBAT Decreasing 0 40 80 120 240 220 200 0 40 80 120 Junction Temperature (oC) Junction Temperature ( C) POR Threshold vs. Junction Temperature OCP Threshold vs. Junction Temperature 2.6 1.5 2.5 1.3 VIN Increasing OCP Threshold,IOCP (A) POR Threshold,VPOR (V) 80 260 180 -40 120 o 2.4 2.3 2.2 VIN Decreasing 2.1 2 -40 40 280 4.4 3.9 -40 0 Junction Temperature (oC) IN Supply Current vs. Junction Temperature BATSL=High 4 VBAT Decreasing 4.1 Battery OVP Threshold vs. Junction Temperature 4.5 BATSL=Low 0 40 80 0.9 0.7 0.5 -40 120 o 0 40 80 120 Junction Temperature (oC) Junction Temperature ( C) Copyright ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 1.1 5 www.anpec.com.tw APL3212A/B/C Typical Operating Characteristics Power Switch On Resistance,RDS,ON(mΩ) Power Switch On Resistance,RDS,ON(mΩ) Power Switch On Resistance vs. Junction Temperature 300 250 200 150 100 50 - 40 0 40 80 120 Junction Temperature (oC) Copyright ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 Power Switch On Resistance vs. Input Voltage 300 IOUT =0.5 A 250 200 150 100 50 2.5 3 3.5 4 4.5 5 5.5 Input Voltage (V) 6 www.anpec.com.tw APL3212A/B/C Operating Waveforms OVP at Power On Normal Power On 1 VIN VIN 1 VOUT VOUT 2 2 VFAULT IOUT 3 3 VIN=0 to 7V C OUT =1µ F,C IN=1µF,R OUT =10Ω CH1:V IN,5V /Div, DC CH2:V OUT,2V/Div, DC CH3:V FAULT ,5 V/Div, DC TIME:2ms/Div VIN=0 to 5V C OUT =1µF,C IN=1µF,R OUT =10Ω CH1:V IN,5V /Div, DC CH2:V OUT,2V/Div, DC CH3:I OUT ,0 .5A /Div, DC TIME:2ms/Div Input Over-Voltage Protection Recovery from Input OVP VIN VIN 1 1 VOUT VOUT 2 2 VFAULT VFAULT 3 3 VIN=5 to 7V C OUT =1µF,C IN=1µF,R OUT =50Ω CH1 :VIN ,5V /Div, DC CH2 :VOUT ,2V/Div, DC CH3 :VFAULT ,5V /Div, DC TIME:20µs/Div Copyright ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 VIN=7V to 5V C OUT =1µF,C IN=1µF,R OUT =50Ω CH1:V IN,5V /Div, DC CH2:V OUT,5V/Div, DC CH3:V FAULT ,5 V/Div, DC TIME:2ms/Div 7 www.anpec.com.tw APL3212A/B/C Operating Waveforms Battery Over-Voltage Protection Battery Over-Voltage Protection VBAT VBAT 1 1 VOUT VOUT 2 2 VFAULT VFAULT 3 3 VBAT =3.6V to 4.4V to 3 .6V COUT =1µF,C IN=1µF,ROUT =33Ω CH1:VBAT ,2 V/Div, DC CH2:VOUT ,2 V/Div, DC CH3:VFAULT ,5V/Div, DC TIME:10 ms/Div VBAT =3 .6V to 4.4 V C OUT=1µF,C IN=1µF,R OUT=33Ω CH1 :VBAT,2V/Div, DC CH2 :VOUT ,2V/Div, DC CH3 :VFAULT ,5V /Div, DC TIME:40µs/Div Recovery from Battery OVP Over-Current Protection V BAT IOUT 1 1 VOUT VOUT 2 2 VFAULT VFAULT 3 3 VBAT=4.4 V to 3.6 V C OUT =1µ F,C IN=1µF,R OUT =33Ω CH1:V BAT,2V/Div, DC CH2:V OUT,2V/Div, DC CH3:V FAULT ,5 V/Div, DC TIME:100 µs/Div Copyright ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 C OUT=1µF,C IN=1µF CH1 :I OUT ,0.5A/Div, DC CH2 :VOUT ,5V/Div, DC CH3 :VFAULT ,5V /Div, DC TIME:100µs/Div 8 www.anpec.com.tw APL3212A/B/C Pin Description PIN FUNCTION NO. NAME 1 ACIN Power Supply Input, connect to external DC supply. Connect external 1µF ceramic capacitor (minimum) to GND. 2 GND Ground pin of the circuitry. All voltage levels are measured with respect to this pin. 3 BATSL Battery OVP threshold selection: VBATSL = High, VBOVP = 4.30V ~ 4.4V. VBATSL = Low, VBOVP = 4.4V ~ 4.47V. 4 FAULT Fault Indication Pin. This pin goes low when input OVP, OCP or battery OVP is detected. 5 EN 6 BAT Battery OVP Sense Pin. Connect to positive terminal of battery through a resistor. 7 ILIM Over-current Protection Setting Pin. Connect a resistor (ROCSET) to GND to set the over-current threshold. When left open, the internal power FET will be turned off. 8 OUT Output Pins. Output Voltage Pin. The output voltage follows the input voltage when no fault is detected Exposed Pad - Enable Input. Pull this pin to high to disable the device and pull this pin to low to enable device. Exposed Thermal Pad. Connect this pad to system ground plane for good thermal conductivity. Block Diagram ACIN OUT POR ILIM Charge Pump OCP ACIN OVP 0.5V GND 1.2V Gate Driver and Control Logic BAT OVP BAT FAULT OTP Battery OVP Threshold Selection BATSL 0.8V EN Copyright ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 9 www.anpec.com.tw APL3212A/B/C Typical Application Circuit 5V Adapter/USB 1 CACIN 1µF MCU GPI O 50kΩ GPI O 50kΩ GPI O 50kΩ VIO 50kΩ ACIN OUT 8 APL3212A/B/C 5 3 4 25K 7 CHRIN COUT 1µF GTDRV EN PMU BATSL APM2805QA FAULT ILIM ISENS 0.2Ω GND BAT 6 2 200kΩ VBAT Li+ Battery Figure 1. The Typical Protection Circuit for Charger Systems. Designation CACIN COUT 1µF, 25V, X5R, 0603 Murata GRM188R61E105K 1µF, 10V, X5R, 0603 Murata GRM188R61A105K Murata website: www.murata.com Copyright ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 10 www.anpec.com.tw APL3212A/B/C Function Description the internal power FET is turned off. When the BP voltage returns below the battery OVP threshold minus the ACIN Power-On-Reset (POR) The APL3212A/B/C have a built-in power-on-reset circuit to keep the output shutting off until internal circuitry is hysteresis, the FET is turned on again. The APL3212A/B/ C have a built-in counter. When the total count of battery operating properly. The POR circuit has hysteresis and a de-glitch feature so that it will typically ignore undershoot OVP fault reaches 16, the FET is turned off permanently, requiring either a VIN POR or EN re-enable again to restart. transients on the input. When input voltage exceeds the POR threshold and after 8ms blanking time, the output Over-Temperature Protection voltage starts a soft-start to reduce the inrush current. When the junction temperature exceeds 140οC, the internal thermal sense circuit turns off the power FET and Input Over-Voltage Protection (OVP) allows the device to cool down. When the device’s junction temperature cools by 20οC, the internal thermal sense The input voltage is monitored by the internal OVP circuit. When the input voltage rises above the input OVP circuit will enable the device, resulting in a pulsed output during continuous thermal protection. Thermal protec- threshold, the internal FET will be turned off within 1µs to protect connected system on OUT pin. When the input tion is designed to protect the IC in the event of over temperature conditions. For normal operation, the junction voltage returns below the input OVP threshold minus the hysteresis, the FET is turned on again after 8ms recovery temperature cannot exceed TJ=+125 οC. time. The input OVP circuit has a 250mV hysteresis and a recovery time of TON(OVP) to provide noise immunity FAULT Output against transient conditions.(see Figure 2.) Over-Current Protection (OCP) The APL3212A/B/C provide an open-drain output to indicate that a fault has occurred. When any of input OVP, The output current is monitored by the internal OCP circuit. OCP, battery OVP, is detected, the FAULT goes low to When the output current reaches the OCP threshold, the device limits the output current at OCP threshold level. If indicate that a fault has occurred. Since the FAULT pin is an open-drain output, connecting a resistor to a pull high the OCP condition continues for a blanking time of TB(OCP), the internal power FET is turned off. After the recovery voltage is necessary. Enable/Shutdown time of TON(OCP), the FET will be turned on again and the output current is monitored again. The OCP threshold is Pull the EN pin voltage above 1.4V to disable the device programmed by a resistor RILIM connected from ILIM pin to GND. The OCP threshold is calculated by the following and pull EN pin voltage below 0.4V to enable the device. The EN pin has an internal pull-down resistor and can be equation: left floating. When the IC is latched off due to the total count of OCP or battery OVP reaches 16, disable and re- IOCP = enable the device with the EN pin can clear the counter. KILIM RILIM ESD Tests where The APL3212A/B/C VIN input pin fully supports the KILIM=25000AΩ Battery Over-Voltage Protection IEC61000-4-2. That means the VIN pin has immunity of +15kV ESD discharge in Air condition, and immunity of The APL3212A/B/C monitor the BAT pin voltage for battery +8kV ESD discharge in Contact condition. over-voltage protection. The battery OVP threshold is internally set to 4.35V. When the BAT pin voltage exceeds the battery OVP threshold for a blanking time of TB(BOVP), Copyright ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 11 www.anpec.com.tw APL3212A/B/C Function Description (Cont.) Powering an Accessory Device In some applications, such as USB On-The-Go, users need to power an accessory device by using the portable device’s battery through the jack holes of AC adapter. The APL3212A/B/C provide reverse current flow path from OUT to IN. If VOUT > VPOR + 0.7V, FET Q1 is turned on, and the reverse current does not flow through the diode but through Q1. Q1 will then remain ON as long as VOUT > VPOR-VPOR_HYS + RDS_ON*ISUPPLY. Within this voltage range, the reverse current capability is the same as the forward capability, 1.5A. It should be noted that there is no overcurrent protection in this direction. Portable Device Accessory Power Supply Enable APL3212 Accessory Device Jack ISUPPLY IN OUT VOUT Q1 Charger to system Disable Battery Gate Driver and Logic Control Copyright ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 12 www.anpec.com.tw APL3212A/B/C Function Description (Cont.) VOVP VPOR VIN VOUT VFAULT TB(IN) TON(OVP) Figure 2. OVP Timing Chart VOUT OCP Threshold IOUT VFAULT TB(OCP) TON(OCP) TB(OCP) Figure 3. OCP Timing Chart Copyright ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 13 www.anpec.com.tw APL3212A/B/C Function Description (Cont.) VBAT VBOVP VBOVP VBOVP Count 13 times VOUT VFAULT TB(BOVP) TB(BOVP) TB(BOVP) Total count 16 times IC is latched off Figure 4. Battery OVP Timing Chart Copyright ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 14 www.anpec.com.tw APL3212A/B/C Application Information RBAT Selection RUP FAULT Connect the BAT pin to the positive terminal of battery through a resistor RBAT for battery OVP function. The RBAT VIO RFAULT limits the current flowing from BAT to battery in case of BAT pin is shortened to VIN pin under a failure mode. The GPIO REN EN recommended value of RBAT is 100kΩ. In the worse case of an IC failure, the current flowing from the BAT pin to the MCU GPIO BAT RBAT battery is: (30V-3V)/ 100kΩ =270µA Li+ Battery where the 30V is the maximum IN voltage and the 3V is the minimum battery voltage. The current is so small and Figure 5. RUP, RFAULT, REN and RBAT can be absorbed by the charger system. The disadvantage with the large RBAT is that the error of Capacitor Selection the battery OVP threshold will be increased. The additional error is the voltage drop across the RBAT because The input capacitor is for decoupling and prevents the input voltage from overshooting to dangerous levels. In of the BAT bias current. When RBAT is 100kΩ, the worsecase additional error is 100kΩx20nA=2mV, which is ac- the AC adapter hot plug-in applications or load current step-down transient, the input voltage has a transient ceptable in most applications. spike due to the parasitic inductance of the input cable. A 25V, X5R, dielectric ceramic capacitor with a value be- REN Selection tween 1µF and 4.7µF placed close to the IN pin is recommended. For the same reason as the BAT pin case, the EN pin should be connected to the MCU GPIO pin through a The output capacitor is for output voltage decoupling, and also can be as the input capacitor of the charging circuit. resistor. The value of the REN is dependent on the IO voltage of the MCU. At least, a 1µF, 10V, X5R capacitor is recommended. Since the IO voltage is divided by REN and EN internal pull low resistor for EN voltage. It has to be ensured that the Layout Consideration EN voltage is above the EN logic high voltage when the GPIO output of the MCU is high. In some failure modes, a high voltage may be applied to the device. Make sure the clearance constraint of the PCB FAULT Output layout must satisfy the design rule for high voltage. The exposed pad of the TDFN2x2-8 performs the func- Since the FAULT pin is an open-drain output, connecting a resistor RUP to a pull high voltage is necessary. It is also tion of channeling heat away. It is recommended that connect the exposed pad to a large copper ground plane recommended that connect the FAULT to the MCU GPIO through a resistor RFAULT. The RFAULT prevents damage to on the backside of the circuit board through several thermal vias to improve heat dissipation. the MCU under a failure mode. The recommended value of the resistors should be between 10kΩ to 100kΩ. The input and output capacitors should be placed close to the IC. RILIM also should be placed close to the IC. The high current traces like input trace and output trace must be wide and short. Copyright ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 15 www.anpec.com.tw APL3212A/B/C Package Information TDFN2x2-8 A b E D D2 A1 E2 A3 L Pin 1 Corner e S Y M B O L MIN. MAX. MIN. MAX. A 0.70 0.80 0.028 0.031 A1 0.00 0.05 0.000 0.002 0.18 0.30 0.007 0.012 D 1.90 2.10 0.075 0.083 D2 1.00 1.60 0.039 0.063 E 1.90 2.10 0.075 0.083 E2 0.60 1.00 0.024 0.039 0.45 0.012 TDFN2x2-8 MILLIMETERS A3 b 0.20 REF e L INCHES 0.008 REF 0.50 BSC 0.30 Copyright ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 0.020 BSC 16 0.018 www.anpec.com.tw APL3212A/B/C Carrier Tape & Reel Dimensions P0 P2 P1 A B0 W F E1 OD0 K0 A0 A OD1 B B T SECTION A-A SECTION B-B H A d T1 Application TDFN2x2-8 A H T1 C d D W E1 F 178.0±2.00 50 MIN. 8.4+2.00 -0.00 13.0+0.50 -0.20 1.5 MIN. 20.2 MIN. 8.0±0.20 1.75±0.10 3.50±0.05 P0 P1 P2 D0 D1 T A0 B0 K0 2.0±0.05 1.5+0.10 -0.00 1.5 MIN. 0.6+0.00 -0.4 3.35 MIN 3.35 MIN 1.30±0.20 4.0±0.10 4.0±0.10 (mm) Devices Per Unit Package Type TDFN2x2-8 Copyright ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 Unit Tape & Reel Quantity 3000 17 www.anpec.com.tw APL3212A/B/C Taping Direction Information TDFN2x2-8 USER DIRECTION OF FEED Classification Profile Copyright ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 18 www.anpec.com.tw APL3212A/B/C Classification Reflow Profiles Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly 100 °C 150 °C 60-120 seconds 150 °C 200 °C 60-120 seconds 3 °C/second max. 3°C/second max. 183 °C 60-150 seconds 217 °C 60-150 seconds See Classification Temp in table 1 See Classification Temp in table 2 Time (tP)** within 5°C of the specified classification temperature (Tc) 20** seconds 30** seconds Average ramp-down rate (Tp to Tsmax) 6 °C/second max. 6 °C/second max. 6 minutes max. 8 minutes max. Preheat & Soak Temperature min (Tsmin) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts) Average ramp-up rate (Tsmax to TP) Liquidous temperature (TL) Time at liquidous (tL) Peak package body Temperature (Tp)* Time 25°C to peak temperature * Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum. ** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum. Table 1. SnPb Eutectic Process – Classification Temperatures (Tc) Package Thickness <2.5 mm ≥2.5 mm Volume mm <350 235 °C 220 °C 3 Volume mm ≥350 220 °C 220 °C 3 Table 2. Pb-free Process – Classification Temperatures (Tc) Package Thickness <1.6 mm 1.6 mm – 2.5 mm ≥2.5 mm Volume mm <350 260 °C 260 °C 250 °C 3 Volume mm 350-2000 260 °C 250 °C 245 °C 3 Volume mm >2000 260 °C 245 °C 245 °C 3 Reliability Test Program Test item SOLDERABILITY HOLT PCT TCT HBM MM Latch-Up Method JESD-22, B102 JESD-22, A108 JESD-22, A102 JESD-22, A104 MIL-STD-883-3015.7 JESD-22, A115 JESD 78 Copyright ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 19 Description 5 Sec, 245°C 1000 Hrs, Bias @ 125°C 168 Hrs, 100%RH, 2atm, 121°C 500 Cycles, -65°C~150°C VHBM≧2KV VMM≧200V 10ms, 1tr≧100mA www.anpec.com.tw APL3212A/B/C Customer Service Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 2F, No. 11, Lane 218, Sec 2 Jhongsing Rd., Sindian City, Taipei County 23146, Taiwan Tel : 886-2-2910-3838 Fax : 886-2-2917-3838 Copyright ANPEC Electronics Corp. Rev. A.2 - Sep., 2013 20 www.anpec.com.tw