APW7085 2A, 26V, 380kHz, Asynchronous Step-Down Converter Features • • • • • • • • • • • • Wide Input Voltage from 4.5V to 26V Output Current up to 2A The APW7085 is a 2A, asynchronous, step-down converter with integrated 100mΩ P-channel MOSFET. The Adjustable Output Voltage from 0.8V to 90%VIN - 0.8V Reference Voltage device, with current-mode control scheme, can convert 4.5~26V input voltage to the output voltage adjustable - ±2.5% System Accuracy 100mΩ Integrated P-Channel Power MOSFET from 0.8 to 90% VIN to provide excellent output voltage regulation. High Efficiency up to 91% - Pulse-Skipping Mode (PSM) / PWM Mode Op- The APW7085 regulates the output voltage in automatic PSM/PWM mode operation, depending on the output eration Current-Mode Operation current, for high efficiency operation over light to full load current. The APW7085 is also equipped with power-on- - Stable with Ceramic Output Capacitors - Fast Transient Response reset, soft-start, and whole protections (under-voltage, over- temperature, and current-limit) into a single package. Power-On-Reset Monitoring Fixed 380kHz Switching Frequency in PWM Mode In shutdown mode, the supply current drops below 5µA. This device, available in a 8-pin SOP-8 package, pro- Built-in Digital Soft-Start Output Current-Limit Protection with Frequency vides a very compact system solution with minimal external components. Foldback 70% Under-Voltage Protection 100 Over-Temperature Protection <5µA Quiescent Current During Shutdown 90 SOP-8 Package Lead Free and Green Devices Available 70 VOUT=5V 80 Efficiency (%) • • • General Description (RoHS Compliant) VOUT=3.3V 60 50 40 Applications 30 • • • • • • • 10 20 LCD Monitor / TV 0 0.001 Set-Top Box Portable DVD 0.01 0.1 1 10 Output Current, IOUT (A) Wireless LAN ADSL, Switch HUB Notebook Computer Step-Down Converters Requiring High Efficiency and 2A Output Current ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright ANPEC Electronics Corp. Rev. A.7 - Sep., 2010 1 www.anpec.com.tw APW7085 Ordering and Marking Information Package Code K : SOP-8 Operating Ambient Temperature Range I : -40 to 85 oC Handling Code TR : Tape & Reel Assembly Material G : Halogen and Lead Free Device APW7085 Assembly Material Handling Code Temperature Range Package Code APW7085 XXXXX APW7085 K: XXXXX - Date Code Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight). Simplified Application Circuit Pin Configuration VIN EN UGND VCC 1 8 2 7 3 6 4 5 C1 10µF GND FB COMP LX L1 2A UGND C3 SOP-8 VIN R4 C6 C5 R1 1% VIN Supply Voltage (VIN to GND) VLX LX to GND Voltage VCC VCC Supply Voltage (VCC to GND) GND C4 22µF FB R2 1% C7 (Optional) (Note 1) Parameter VIN D1 EN COMP Absolute Maximum Ratings VOUT +3.3V LX U1 APW7085 (Top View) Symbol C2 VIN VCC VIN +12V Rating Unit -0.3 ~ 30 V > 100ns -2 ~ VIN+0.3 < 100ns -5 ~ VIN+6 VIN > 6.2V -0.3 ~ 6.5 VIN ≤ 6.2V < VIN+0.3 V V VUGND_GND UGND to GND Voltage -0.3 ~ VIN+0.3 V VVIN_UGND VIN to UGND Voltage -0.3 ~ 6.5V V EN to GND Voltage 20 FB, COMP to GND Voltage -0.3 ~ VCC +0.3 Maximum Junction Temperature TSTG TSDR V 150 Storage Temperature -65 ~ 150 Maximum Lead Soldering Temperature, 10 Seconds 260 V o C o C o C Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Copyright ANPEC Electronics Corp. Rev. A.7 - Sep., 2010 2 www.anpec.com.tw APW7085 Thermal Characteristics Symbol θJA Parameter Junction-to-Ambient Resistance in free air Typical Value Unit (Note 2) o 80 SOP-8 C/W Note 2: θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. Recommended Operating Conditions (Note 3) Symbol Range Unit VIN Supply Voltage 4.5 ~ 26 V VCC Supply Voltage 4.0 ~ 5.5 V VOUT Converter Output Voltage 0.8 ~ 90% VIN IOUT Converter Output Current VIN TA TJ Parameter V 0~2 A VCC Input Capacitor 0.22 ~ 2.2 µF VIN-to-UGND Input Capacitor 0.22 ~ 2.2 µF Ambient Temperature Junction Temperature -40 ~ 85 o -40 ~ 125 o C C Note 3: Refer to the typical application circuits. Electrical Characteristics Refer to the typical application circuits. These specifications apply over VIN=12V, VOUT=3.3V and TA= -40 ~ 85oC, unless otherwise specified. VCC is regulated by an internal regulator. Typical values are at TA=25oC. Symbol Parameter APW7085 Test Conditions Unit Min. Typ. Max. 1.0 2.0 SUPPLY CURRENT IVIN IVIN_SD IVCC IVCC_SD VIN Supply Current VFB = 0.85V, VEN=3V, LX=Open - mA VIN Shutdown Supply Current VEN = 0V, VIN=26V - - 5 µA VCC Supply Current VEN = 3V, VCC = 5.0V, VFB=0.85V - 0.7 - mA VCC Shutdown Supply Current VEN = 0V, VCC = 5.0V - - 1 µA VCC 4.2V LINEAR REGULATOR Output Voltage VIN = 5.2 ~ 26V, IO = 0 ~ 8mA 4.0 4.2 4.5 V Load Regulation IO = 0 ~ 8mA -60 -40 0 mV Current-Limit VCC > POR Threshold 8 - 30 mA VIN = 6.2 ~ 26V, IO = 0 ~ 10mA 5.3 5.5 5.7 V Load Regulation IO = 0 ~ 10mA -80 -60 0 mV Current-Limit VIN = 6.2 ~ 26V 10 - 30 mA 3.7 3.9 4.1 V - 0.15 - V 2.3 2.5 2.7 V - 0.2 - V VIN-TO-UGND 5.5V LINEAR REGULATOR Output Voltage (VVIN-UGND) POWER-ON-RESET (POR) AND LOCKOUT VOLTAGE THRESHOLDS VCC POR Voltage Threshold VCC rising VCC POR Hysteresis EN Lockout Voltage Threshold VEN rising EN Lockout Hysteresis Copyright ANPEC Electronics Corp. Rev. A.7 - Sep., 2010 3 www.anpec.com.tw APW7085 Electrical Characteristics (Cont.) Refer to the typical application circuits. These specifications apply over VIN=12V, VOUT=3.3V and TA= -40 ~ 85oC, unless otherwise specified. VCC is regulated by an internal regulator. Typical values are at TA=25oC. Symbol Parameter APW7085 Test Conditions Unit Min. Typ. Max. - 3.5 - V - 0.2 - V - 0.8 - V -1.0 - +1.0 -2.5 - +2.5 POWER-ON-RESET (POR) AND LOCKOUT VOLTAGE THRESHOLDS (CONT.) VIN-to-UGND Lockout Voltage Threshold VVIN-UGND rising VIN-to-UGND Lockout Hysteresis REFERENCE VOLTAGE VREF Reference Voltage o TJ = 25 C, IOUT=0A, VIN=12V Output Voltage Accuracy % o TJ = -40 ~ 125 C, IOUT = 0 ~ 2A, VIN = 4.5 ~ 26V Line Regulation VIN = 4.5V to 26V, IOUT = 0A - 0.36 - % Load Regulation IOUT = 0 ~ 2A - 0.4 - % 340 380 420 kHz - 80 - kHz OSCILLATOR AND DUTY FOSC Free Running Frequency VIN = 4.5 ~ 26V Foldback Frequency VFB = 0V Maximum Converter’s Duty Cycle Minimum Pulse Width of LX - 93 - % VIN = 4.5 ~ 26V - 200 - ns - 400 - µA/V COMP = Open 60 80 - dB - 0.2 - Ω TJ=25oC - 100 140 mΩ CURRENT-MODE PWM CONVERTER Gm Error Amplifier Transconductance Error Amplifier DC Gain Current-Sense Resistance P-Channel Power MOSFET Resistance PROTECTIONS ILIM P-Channel Power MOSFET Current-limit Peak Current 3 4 5 A VUV FB Under-Voltage Threshold VFB falling 66 70 74 % FB Under-Voltage Hysteresis - 40 - mV FB Under-Voltage Debounce - 2 - µs Over-Temperature Trip Point - 150 - o o TOTP Over-Temperature Hysteresis C - 50 - C 9 10.8 12 ms SOFT-START, ENABLE AND INPUT CURRENTS tSS Soft-Start Interval Preceding Delay before Soft-Start 9 10.8 12 ms EN Shutdown Voltage Threshold VEN falling, VIN = 4 ~ 26V - - 0.8 V EN Enable Voltage Threshold VEN rising, VIN = 4 ~ 26V 2.1 - - V EN Pin Clamped Voltage IEN=10mA 12 - 17 V P-Channel Power MOSFET Leakage Current VEN = 0V, VLX = 0V, VIN = 26V - - 4 µA Copyright ANPEC Electronics Corp. Rev. A.7 - Sep., 2010 4 www.anpec.com.tw APW7085 Electrical Characteristics (Cont.) Refer to the typical application circuits. These specifications apply over VIN=12V, VOUT=3.3V and TA= -40 ~ 85oC, unless otherwise specified. VCC is regulated by an internal regulator. Typical values are at TA=25oC. Symbol Parameter APW7085 Test Conditions Min. Typ. Unit Max. SOFT-START, ENABLE AND INPUT CURRENTS (CONT.) IFB FB Pin Input Current VFB = 0.8V -100 - +100 nA IEN EN Pin Input Current VEN < 3V -500 - +500 nA Copyright ANPEC Electronics Corp. Rev. A.7 - Sep., 2010 5 www.anpec.com.tw APW7085 Typical Operating Characteristics Switching Frequency vs. Junction Temperature 420 0.812 410 Switching Frequency, FOSC (kHz) Reference Voltage, VREF (V) Reference Voltage vs. Junction Temperature 0.816 0.808 0.804 0.800 0.796 0.792 0.788 400 390 380 370 360 350 340 0.784 -50 -25 0 25 50 75 100 125 150 -50 -25 Junction Temperature, TJ (oC) Output Voltage vs. Supply Voltage 50 75 100 125 150 3.36 3.35 3.35 I OUT = 1A 3.34 3.34 Output Voltage, VOUT (V) Output Voltage, VOUT (V) 25 Output Voltage vs. Output Current 3.36 3.33 3.32 3.31 3.30 3.29 3.28 3.27 3.26 3.25 3.33 3.32 3.31 3.30 3.29 3.28 3.27 3.26 3.25 3.24 4 6 8 3.24 0.0 10 12 14 16 18 20 22 24 26 0.5 1.0 1.5 2.0 Supply Voltage, VIN (V) Output Current, IOUT (A) VIN Input Current vs. Supply Voltage Current-Limit Level (Peak Current) vs. Junction Temperature 1.6 5.0 VFB =0.85V Current-Limit Level, ILIM (A) 1.4 VIN Input Current, IVIN (mA) 0 Junction Temperature, TJ (oC) 1.2 1.0 0.8 0.6 0.4 0.2 0.0 0 4 8 12 16 20 24 4.0 3.5 3.0 -50 28 -25 0 25 50 75 100 125 150 Junction Temperature, TJ (oC) VIN Supply Voltage, VIN (V) Copyright ANPEC Electronics Corp. Rev. A.7 - Sep., 2010 4.5 6 www.anpec.com.tw APW7085 Typical Operating Characteristics (Cont.) Efficiency vs. Output Current EN Clamp Voltage vs. EN Input Current 100 90 18 16 VOUT=5V EN Clamp Voltage, V EN (V) 80 Efficiency (%) 70 VOUT=3.3V 60 50 40 30 20 12 TJ =-30oC 10 8 TJ =25oC 6 TJ =100oC 4 2 10 0 0.001 14 0 0.01 0.1 1 1 10 Output Current, IOUT (A) Copyright ANPEC Electronics Corp. Rev. A.7 - Sep., 2010 10 100 1000 10000 EN Input Current, IEN (µA) 7 www.anpec.com.tw APW7085 Operating Waveforms (Refer to the application circuit 1 in the section “Typical Application Circuits”, VIN=12V, VOUT=3.3V, L1=10µH) Power On Power Off VIN IOUT=2A IOUT=2A VIN 1 1 VOUT VOUT 2 3 2 IL1 IL1 3 CH1 : VIN , 5V/div CH2 : VOUT , 1V/div CH3 : IL1 , 1A/div Time : 5ms/div CH1 : VIN , 5V/div CH2 : VOUT , 2V/div CH3 : IL1 , 1A/div Time : 5ms/div EN Shutdown IOUT=2A IOUT=2A VEN VEN 1 1 2 VOUT IL1 IL1 3 3 CH1 : VEN , 5V/div CH2 : VOUT , 2V/div CH3 : IL1 , 1A/div Time : 5ms/div Copyright ANPEC Electronics Corp. Rev. A.7 - Sep., 2010 VOUT 2 CH1 : VEN , 5V/div CH2 : VOUT , 2V/div CH3 : IL1, 1A/div Time : 5ms/div 8 www.anpec.com.tw APW7085 Operating Waveforms (Cont.) (Refer to the application circuit 1 in the section “Typical Application Circuits”, VIN=12V, VOUT=3.3V, L1=10µH) Short Circuit Over Current IOUT =2~4A VOUT is shorted to GND by a short wire VLX 1 VLX 1 VOUT 2 VOUT 2 IL1 IL1 3 3 CH1 : VLX , 10V/div CH2 : VOUT , 1V/div CH3 : IL1 , 2A/div CH1 : VLX , 10V/div CH2 : VOUT , 50mV/div CH3 : IL1 , 2A/div Time : 50ms/div Time : 50µs/div Load Transient Response Load Transient Response IOUT= 50mA-> 2A ->50mA IOUT rising/falling time=10µs VOUT 1 1 IOUT= 0.5A-> 2A ->0.5A IOUT rising/falling time=10µs VOUT IL1 IL1 2 2 CH1 : VOUT , 200mV/div CH1 : VOUT , 200mV/div CH2 : IL1 , 1A/div CH2 : IL1 , 1A/div Time : 50µs/div Time : 50µs/div Copyright ANPEC Electronics Corp. Rev. A.7 - Sep., 2010 9 www.anpec.com.tw APW7085 Operating Waveforms (Cont.) (Refer to the application circuit 1 in the section “Typical Application Circuits”, VIN=12V, VOUT=3.3V, L1=10µH ) Switching Waveform IOUT=0.2A Switching Waveform IOUT=2A VLX 1 VLX 1 IL1 IL1 2 2 CH1 : VLX , 5V/div CH2 : IL1 , 200mA/div Time : 1µs/div CH1 : VLX , 5V/div CH2 : IL1 , 1A/div Time : 1µs/div Line Transient VIN= 12~26V VIN rising/falling time=20µs VIN VOUT 2 IL1 1 3 CH1 : VIN , 5V/div CH2 : VOUT , 100mA/div (Voffset=3.3V) CH3 : IL1 , 2A/div Time : 100µs/div Copyright ANPEC Electronics Corp. Rev. A.7 - Sep., 2010 10 www.anpec.com.tw APW7085 Pin Description PIN NAME FUNCTION 1 VIN Power Input. VIN supplies the power (4.5V to 26V) to the control circuitry, gate driver and step-down converter switch. Connecting a ceramic bypass capacitor and a suitably large capacitor between VIN and GND eliminates switching noise and voltage ripple on the input to the IC. 2 EN Enable Input. EN is a digital input that turns the regulator on or off. Drive EN high to turn on the regulator, drive it low to turn it off. Pull up with 100kΩ resistor for automatic startup. 3 UGND Gate driver power ground of the P-channel Power MOSFET. A linear regulator regulates a 5.5V voltage between VIN and UGND to supply power to P-channel MOSFET gate driver. Connect a ceramic capacitor (1µF typ.) between VIN and UGND for noise decoupling and stability of the linear regulator. 4 VCC Bias input and 4.2V linear regulator’s output. This pin supplies the bias to some control circuits. The 4.2V linear regulator converts the voltage on VIN to 4.2V to supply the bias when no external 5V power supply is connected with VCC. Connect a ceramic capacitor (1µF typ.) between VCC and GND for noise decoupling and stability of the linear regulator. 5 LX Power Switching Output. LX is the Drain of the P-channel MOSFET to supply power to the output. Connect the pin to output LC filter. 6 COMP Output of error amplifier. Connect a series RC network from COMP to GND to compensate the regulation control loop. In some cases, an additional capacitor from COMP to GND is required for noise decoupling. 7 FB Feedback Input. The IC senses feedback voltage via FB and regulate the voltage at 0.8V. Connecting FB with a resistor-divider from the output set the output voltage in the range from 0.8V to 90% VIN. 8 GND Power and Signal Ground. Block Diagram VIN Current Sense Amplifier 4.2V Regulator and Power-On-Reset VCC Current Limit VCC POR 70%VREF UVP UG Soft-Start and Fault Logic Gate Driver Soft-Start Inhibit UGND Gate Control FB VREF 0.8V Error Amplifier COMP Slope Compensation ENOK 2.5V EN LX Current Compartor Enable 0.8V Copyright ANPEC Electronics Corp. Rev. A.7 - Sep., 2010 OverTemperature Protection FB 11 Oscillator 380kHz Linear Regulator VIN GND www.anpec.com.tw APW7085 Typical Application Circuits 1. 4.5~26V Single Power Input Step-down Converter (with Ceramic Input/Output Capacitors) VIN 4.5~26V C1 10µF 1 C2 1µF VIN 4 VCC UGND C3 1µF LX R3 100kΩ VIN 3 5 VOUT 6 0.8V~90%VIN C4 /2A D1 U1 APW7085 2 L1 2A 22µF R1 1% EN COMP R4 FB R2 1% GND 8 C6 7 C7 (Optional) C5 Recommended Feedback Compensation Network Components List: VIN (V) VOUT (V) L1 (µH) C4 (µF) C4 ESR (mΩ) R1 (kΩ) R2 (kΩ) C7 (pF) R4 (kΩ) C5 (pF) C6 (pF) 24 12 15 22 5 140 10 15 100 820 22 24 12 15 44 3 140 10 15 200 820 22 24 5 10 22 5 63.4 12 22 43 1800 22 24 5 10 44 3 63.4 12 22 82 1800 22 12 5 10 22 5 63.4 12 30 43 1000 22 12 5 10 44 3 63.4 12 30 82 1000 22 12 3.3 10 22 5 47 15 39 27 1500 22 12 3.3 10 44 3 47 15 39 56 1500 22 12 2 4.7 22 5 30 20 39 18 2200 22 12 2 4.7 44 3 30 20 39 36 2200 22 12 1.2 3.3 22 5 7.5 15 100 10 3600 22 12 1.2 3.3 44 3 7.5 15 100 20 3600 22 5 3.3 3.3 22 5 47 15 47 27 560 22 5 3.3 3.3 44 3 47 15 47 56 560 22 5 1.2 2.2 22 5 7.5 15 200 10 1500 22 5 1.2 2.2 44 3 7.5 15 200 20 1500 22 5 0.8 2.2 22 5 0 NC NC 6.8 2200 22 5 0.8 2.2 44 3 0 NC NC 15 2200 22 Copyright ANPEC Electronics Corp. Rev. A.7 - Sep., 2010 12 www.anpec.com.tw APW7085 Typical Application Circuits (Cont.) 2. Dual Power Inputs Step-down Converter (VIN=4.5~26V) VIN +5V C1 10µF 1 D2 Schottky Diode 4.5~26V C2 1µF VIN 4 VCC UGND C3 1µF LX R3 100kΩ VIN 3 5 VOUT 6 22µF R1 1% EN COMP R4 FB 7 R2 1% GND 8 C6 0.8V~90%VIN C4 /2A D1 U1 APW7085 2 L1 2A C7 (Optional) C5 3. 4.5~5.5V Single Power Input Step-down Converter VIN C1 10µF 4.5~5.5V 1 C2 1µF VIN 4 VCC UGND C3 1µF LX R3 100kΩ VIN 3 L1 2A 5 VOUT U1 APW7085 2 6 D1 R1 1% EN COMP R4 FB GND 8 C6 7 22µF R2 1% C7 (Optional) C5 Copyright ANPEC Electronics Corp. Rev. A.7 - Sep., 2010 0.8V~90%VIN C4 /2A 13 www.anpec.com.tw APW7085 Typical Application Circuits (Cont.) 4. +12V Single Power Input Step-down Converter (with Electrolytic Input/Output Capacitors) VIN C8 +12V 470µF C1 2.2µF 1 C2 1µF VIN 4 VCC UGND C3 1µF LX 3 L1 10µH 2A 5 VOUT +3.3V/2A 2 VIN 6 COMP R4 39K 7 FB R2 15K 1% GND C5 1500pF C4 470µF (ESR=30mΩ) R1 47K 1% EN 8 C6 22pF D1 U1 APW7085 R3 100kΩ C7 39pF 5. -8V Inverting Converter with 4.5~5.5V Single Power Input VIN 4.5~5.5V C1 10µF 1 R3 100kΩ VIN 2 UGND EN LX C8 1µF 4 C3 1µF C6 22pF 3 5 VCC U1 APW7085 6 C2 1µF COMP R4 68kΩ FB GND 8 C5 560pF D1 7 L1 10µH 2A PGND R1 90.9k R2 10kΩ AGND C7 22pF C4 22µF VOUT -8V/2A Copyright ANPEC Electronics Corp. Rev. A.7 - Sep., 2010 14 www.anpec.com.tw APW7085 Function Description Main Control Loop close to the IC to provide good noise decoupling. The linear regulator is not intended for powering up any exter- The APW7085 is a constant frequency current mode switching regulator. During normal operation, the inter- nal loads. Do not connect any external loads to VCC. The linear regulator is also equipped with current-limit pro- nal P-channel power MOSFET is turned on each cycle when the oscillator sets an internal RS latch and would tection to protect itself during over-load or short-circuit conditions on VCC pin. be turned off when an internal current comparator (ICMP) resets the latch. The peak inductor current at which ICMP VIN-to-UGND 5.5V Linear Regulator resets the RS latch is controlled by the voltage on the COMP pin, which is the output of the error amplifier The built-in 5.5V linear regulator regulates a 5.5V voltage between VIN and UGND pins to supply bias and gate charge for the P-channel Power MOSFET gate driver. The (EAMP). An external resistive divider connected between VOUT and ground allows the EAMP to receive an output linear regulator is designed to be stable with a low-ESR ceramic output capacitor of at least 0.22µF. It is also feedback voltage VFB at FB pin. When the load current increases, it causes a slight decrease in VFB relative to the 0.8V reference, which in turn causes the COMP voltage to increase until the average inductor current matches equipped with current-limit function to protect itself during over-load or short-circuit conditions between VIN and the new load current. UGND. The APW7085 shuts off the output of the converters when VCC Power-On-Reset (POR) and EN Undervoltage Lockout the output voltage of the linear regulator is below 3.5V (typical). The IC resumes working by initiating a new soft- The APW7085 keeps monitoring the voltage on VCC pin to prevent wrong logic operations which may occur when start process when the linear regulator’s output voltage is above the undervoltage lockout voltage threshold. VCC voltage is not high enough for the internal control circuitry to operate. The VCC POR has a rising threshold Digital Soft-Start The APW7085 has a built-in digital soft-start to control the of 3.9V (typical) with 0.15V of hysteresis. An external undervoltage lockout (UVLO) is sensed and output voltage rise and limit the input current surge during start-up. During soft-start, an internal ramp, connected programmed at the EN pin. The EN UVLO has a rising threshold of 2.5V with 0.2V of hysteresis. The EN UVLO to the one of the positive inputs of the error amplifier, rises up from 0V to 1V to replace the reference voltage should be programmed by connecting a resistive divider from VIN to EN to GND. (0.8V) until the ramp voltage reaches the reference voltage. The device is designed with a preceding delay about After the VCC, EN and VIN-to-UGND voltages exceed their respective voltage thresholds, the IC starts a start-up pro- 10.8ms (typical) before soft-start process. cess and then ramps up the output voltage to the setting of output voltage. Connect a RC network from EN to GND Output Under-Voltage Protection In the process of operation, if a short-circuit occurs, the output voltage will drop quickly. Before the current-limit to set a turn-on delay that can be used to sequence the output voltages of multiple devices. circuit responds, the output voltage will fall out of the required regulation range. The undervoltage continually VCC 4.2V Linear Regulator monitors the FB voltage after soft-start is completed. If a load step is strong enough to pull the output voltage lower VCC is the output terminal of the internal 4.2V linear regulator which is powered from VIN and provides power to the APW7085. The linear regulator designed to be stable than the under-voltage threshold, the IC shuts down converter’s output. with a low-ESR ceramic output capacitor powers the internal control circuitry. Bypass VCC to GND with a ceramic The under-voltage threshold is 70% of the nominal output voltage. The undervoltage comparator has a built-in capacitor of at least 0.22µF. Place the capacitor physically Copyright ANPEC Electronics Corp. Rev. A.7 - Sep., 2010 15 www.anpec.com.tw APW7085 Function Description (Cont.) Output Under-Voltage Protection (Cont.) 2µs noise filter to prevent the chips from wrong UVP shutdown caused by noise. The under-voltage protection works in a hiccup mode without latched shutdown. The IC will initiate a new soft-start process at the end of the preceeding delay. Over-Temperature Protection (OTP) The over-temperature circuit limits the junction temperature of the APW7085. When the junction temperature exceeds TJ=+150oC, a thermal sensor turns off the power MOSFET, allowing the devices to cool. The thermal sensor allows the converter to start a start-up process and regulate the output voltage again after the junction temperature cools by 50oC. The OTP is designed with a 50oC hysteresis to lower the average TJ during continuous thermal overload conditions, increasing lifetime of the IC. Enable/Shutdown Driving EN to ground places the APW7085 in shutdown. When in shutdown, the internal power MOSFET turns off, all internal circuitry shuts down and the quiescent supply current of VIN reduces to <1µA (typical). Current-Limit Protection The APW7085 monitors the output current, flowing through the P-channel power MOSFET, and limits the current peak at current-limit level to prevent loads and the IC from damages during overload or short-circuit conditions. Frequency Foldback When the output is shortened to the ground, the frequency of the oscillator will be reduced to about 80kHz. This lower frequency allows the inductor current to safely discharge, thereby preventing current runaway. The oscillator’s frequency will gradually increase to its designed rate when the feedback voltage on FB again approaches 0.8V. Copyright ANPEC Electronics Corp. Rev. A.7 - Sep., 2010 16 www.anpec.com.tw APW7085 Application Information Power Sequencing VIN VIN IQ1 The APW7085 can operate with sigle or dual power input (s). CIN Q1 In dual-power applications, the voltage (VCC) applied at VCC pin must be lower than the voltage (VIN) on VIN pin. IL LX IOUT VOUT L The reason is the internal parasitic diode from VCC to VIN will conduct due to the forward-voltage between VCC and ICOUT D1 ESR COUT VIN. Therefore, VIN must be provided before VCC. Setting Output Voltage T=1/FOSC The regulated output voltage is determined by: VOUT = 0.8 ⋅ (1 + R1 ) R2 VLX (V) DT I IOUT Suggested R2 is in the range from 1K to 20kΩ. For portable applications, a 10kΩ resistor is suggested for R2. IL To prevent stray pickup, locate resistors R1 and R2 close to APW7085. IOUT IQ1 I Input Capacitor Selection ICOUT Each time, when the P-channel power MOSFET (Q1) turns on, small ceramic capacitors for high frequency VOUT decoupling and bulk capacitors is required to supply the surge current. The small ceramic capacitors have to be VOUT placed physically close to the VIN and between the VIN and the anode of the Schottky diode (D1). Figure 1. Converter Waveforms Output Capacitor Selection The important parameters for the bulk input capacitor are the voltage rating and the RMS current rating. For reliable An output capacitor is required to filter the output and supply the load transient current. The filtering requirements operation, select the bulk capacitor with voltage and current ratings above the maximum input voltage and larg- are the functions of the switching frequency and the ripple current (∆I). The output ripple is the sum of the voltages, est RMS current required by the circuit. The capacitor voltage rating should be at least 1.25 times greater than the having phase shift, across the ESR and the ideal output capacitor. The peak-to-peak voltage of the ESR is calcu- maximum input voltage and a voltage rating of 1.5 times is a conservative guideline. The RMS current (IRMS) of the lated as the following equations: bulk input capacitor is calculated as the following equation: IRMS = IOUT ⋅ D ⋅ (1- D) D= VOUT + VD VIN + VD ........... (1) ∆I = VOUT ·(1 - D) FOSC ·L ........... (2) (A) where D is the duty cycle of the power MOSFET. For a through hole design, several electrolytic capacitors VESR = ∆I ·ESR may be needed. For surface mount designs, solid tantalum capacitors can be used, but caution must be exer- ........... (3) (V) where VD is the forward voltage drop of the diode. The peak-to-peak voltage of the ideal output capacitor is cised with regard to the capacitor surge current rating. calculated as the following equations: Copyright ANPEC Electronics Corp. Rev. A.7 - Sep., 2010 17 www.anpec.com.tw APW7085 Application Information (Cont.) and greater core losses. A reasonable starting point for setting ripple current is ∆I ≤ 0.4. IOUT(MAX). Remember, the Output Capacitor Selection (Cont.) ∆VCOUT = ∆I (V) 8 ⋅ FOSC ⋅ COUT ........... (4) maximum ripple current occurs at the maximum input voltage. The minimum inductance of the inductor is cal- For the applications, using bulk capacitors, the ∆VCOUT is much smaller than the VESR and can be ignored. Therefore, culated by using the following equation: the AC peak-to-peak output voltage (∆VOUT ) is shown as below: ∆VOUT = ∆ I ⋅ ESR (V) VOUT ·(VIN - VOUT) ≤ 1.2 380000 ·L ·VIN ........... (5) L≥ For the applications, using ceramic capacitors, the VESR is much smaller than the ∆V COUT and can be ignored. Therefore, the AC peak-to-peak output voltage (∆VOUT ) is VOUT ·(VIN - VOUT ) 456000 ·VIN (H) ........... (6) where VIN= VIN(MAX) Output Diode Selection close to ∆VCOUT . The load transient requirements are the functions of the The Schottky diode carries load current during the offtime. Therefore, the average diode current is dependent slew rate (di/dt) and the magnitude of the transient load current. These requirements are generally met with a on the P-channel power MOSFET duty cycle. At high input voltages, the diode conducts most of the time. As VIN ap- mix of capacitors and careful layout. High frequency capacitors initially supply the transient and slow the current proaches VOUT, the diode conducts only a small fraction of the time. The most stressful condition for the diode is load rate seen by the bulk capacitors. The bulk filter capacitor values are generally determined by the ESR when the output is short-circuited. Therefore, it is important to adequately specify the diode peak current and av- (Effective Series Resistance) and voltage rating requirements rather than actual capacitance requirements. erage power dissipation so as not to exceed the diode High frequency decoupling capacitors should be placed physically as close to the power pins of the load as ratings. Under normal load conditions, the average current con- possible. Be careful not to add inductance in the circuit board wiring that could cancel the usefulness of these ducted by the diode is: ID = low inductance components. An aluminum electrolytic capacitor’s ESR value is related to the case size with lower VIN - VOUT ⋅ IOUT VIN + VD The APW7085 is equipped with whole protections to re- ESR available in larger case sizes. However, the Equivalent Series Inductance (ESL) of these capacitors increases duce the power dissipation during short-circuit condition. Therefore, the maximum power dissipation of the diode with case size and can reduce the usefulness of the capacitor to high slew-rate transient loading. is calculated from the maximum output current as: PDIODE(MAX) = VD ·ID(MAX) Inductor Value Calculation where VOUT= VOUT(MAX) The operating frequency and inductor selection are interrelated in that higher operating frequencies permit the Remember to keep lead length short and observe proper grounding to avoid ringing and increased dissipation. use of a smaller inductor for the same amount of inductor ripple current. However, this is at the expense of efficiency due to an increase in MOSFET gate charge losses. The equation (2) shows that the inductance value has a direct effect on ripple current. Accepting larger values of ripple current allows the use of low inductances but results in higher output voltage ripple Copyright ANPEC Electronics Corp. Rev. A.7 - Sep., 2010 18 www.anpec.com.tw APW7085 Layout Consideration In high power switching regulator, a correct layout is important to ensure proper operation of the regulator. In 5. Place the decoupling ceramic capacitor C1 near the VIN as close as possible. The bulk capacitors C8 are general, interconnecting impedance should be minimized by using short and wide printed circuit traces. Signal and also placed near VIN. Use a wide power ground plane to connect the C1, C8, C4, and Schottky diode to pro- power grounds are to be kept separating and finally c om bined using ground plane construction or vide a low impedance path between the components for large and high slew rate current. single point grounding. Figure 2 illustrates the layout, with bold lines indicating high current paths. Components along the bold lines should be placed close together. Below is a checklist for your layout: D1 1. Begin the layout by placing the power components first. Orient the power circuitry to achieve a clean power flow C1 path. If possible, make all the connections on one side of the PCB with wide and copper filled areas. VIN 2. In Figure 2, the loops with same color bold lines conduct high slew rate current. These interconnecting im- VLX L1 VOUT C4 SOP-8 Load GND GND pedances should be minimized by using wide and short printed circuit traces. Figure 3. Recommended Layout Diagram 3. Keep the sensitive small signal nodes (FB, COMP) away from switching nodes (LX or others) on the PCB. Therefore, place the feedback divider and the feedback compensation network close to the IC to avoid switching noise. Connect the ground of feedback divider directly to the GND pin of the IC using a dedicated ground trace. 4. The VCC decoupling capacitor should be right next to the VCC and GND pins. Capacitor C2 should be connected as close to the VIN and UGND pins as possible. + VIN - C2 1 VIN 3 UGND LX 5 4 C3 2 R4 C5 Compensation Network C8 L1 + D1 VCC C4 Load VOUT U1 APW7085 EN 6 COMP C6 C1 GND 8 R1 FB 7 R2 C7 (Optional) Feedback Divider Figure 2. Current Path Diagram Copyright ANPEC Electronics Corp. Rev. A.7 - Sep., 2010 19 www.anpec.com.tw APW7085 Package Information SOP-8 -T- SEATING PLANE < 4 mils D E E1 SEE VIEW A h X 45 ° c A 0.25 b GAUGE PLANE SEATING PLANE A1 A2 e L VIEW A S Y M B O L SOP-8 INCHES MILLIMETERS MIN. MAX. A MIN. MAX. 1.75 0.069 0.010 0.004 0.25 A1 0.10 A2 1.25 b 0.31 0.51 0.012 0.020 c 0.17 0.25 0.007 0.010 D 4.80 5.00 0.189 0.197 E 5.80 6.20 0.228 0.244 E1 3.80 4.00 0.150 0.157 h 0.25 0.50 0.010 0.020 L 0.40 1.27 0.016 0.050 0 0° 8° 0° e 0.049 1.27 BSC 0.050 BSC 8° Note: 1. Follow JEDEC MS-012 AA. 2. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil per side. 3. Dimension “E” does not include inter-lead flash or protrusions. Inter-lead flash and protrusions shall not exceed 10 mil per side. Copyright ANPEC Electronics Corp. Rev. A.7 - Sep., 2010 20 www.anpec.com.tw APW7085 Carrier Tape & Reel Dimensions P0 P2 P1 A B0 W F E1 OD0 K0 A0 A OD1 B B T SECTION A-A SECTION B-B H A d T1 Application A H T1 C d D W E1 F 330.0±2.00 50 MIN. 12.4+2.00 -0.00 13.0+0.50 -0.20 1.5 MIN. 20.2 MIN. 12.0±0.30 1.75±0.10 5.5±0.05 P0 P1 P2 D0 D1 T A0 B0 K0 4.0±0.10 8.0±0.10 2.0±0.05 1.5+0.10 -0.00 1.5 MIN. 0.6+0.00 -0.40 6.40±0.20 5.20±0.20 2.10± 0.20 SOP-8 (mm) Devices Per Unit Package Type Unit Quantity SOP-8 Tape & Reel 2500 Copyright ANPEC Electronics Corp. Rev. A.7 - Sep., 2010 21 www.anpec.com.tw APW7085 Taping Direction Information SOP-8 USER DIRECTION OF FEED Classification Profile Copyright ANPEC Electronics Corp. Rev. A.7 - Sep., 2010 22 www.anpec.com.tw APW7085 Classification Reflow Profiles Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly 100 °C 150 °C 60-120 seconds 150 °C 200 °C 60-120 seconds 3 °C/second max. 3°C/second max. 183 °C 60-150 seconds 217 °C 60-150 seconds See Classification Temp in table 1 See Classification Temp in table 2 Time (tP)** within 5°C of the specified classification temperature (Tc) 20** seconds 30** seconds Average ramp-down rate (Tp to Tsmax) 6 °C/second max. 6 °C/second max. 6 minutes max. 8 minutes max. Preheat & Soak Temperature min (Tsmin) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts) Average ramp-up rate (Tsmax to TP) Liquidous temperature (TL) Time at liquidous (tL) Peak package body Temperature (Tp)* Time 25°C to peak temperature * Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum. ** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum. Table 1. SnPb Eutectic Process – Classification Temperatures (Tc) 3 Package Thickness <2.5 mm Volume mm <350 235 °C Volume mm ≥350 220 °C ≥2.5 mm 220 °C 220 °C 3 Table 2. Pb-free Process – Classification Temperatures (Tc) Package Thickness <1.6 mm 1.6 mm – 2.5 mm ≥2.5 mm Volume mm <350 260 °C 260 °C 250 °C 3 Volume mm 350-2000 260 °C 250 °C 245 °C 3 Volume mm >2000 260 °C 245 °C 245 °C 3 Reliability Test Program Test item SOLDERABILITY HOLT PCT TCT HBM MM Latch-Up Method JESD-22, B102 JESD-22, A108 JESD-22, A102 JESD-22, A104 MIL-STD-883-3015.7 JESD-22, A115 JESD 78 Copyright ANPEC Electronics Corp. Rev. A.7 - Sep., 2010 23 Description 5 Sec, 245°C 1000 Hrs, Bias @ Tj=125°C 168 Hrs, 100%RH, 2atm, 121°C 500 Cycles, -65°C~150°C VHBM≧2KV VMM≧200V 10ms, 1tr≧100mA www.anpec.com.tw APW7085 Customer Service Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 2F, No. 11, Lane 218, Sec 2 Jhongsing Rd., Sindian City, Taipei County 23146, Taiwan Tel : 886-2-2910-3838 Fax : 886-2-2917-3838 Copyright ANPEC Electronics Corp. Rev. A.7 - Sep., 2010 24 www.anpec.com.tw