AOSMD AO7401_11

AO7401
30V P-Channel MOSFET
General Description
Product Summary
The AO7401 uses advanced trench technology to
provide excellent RDS(ON), low gate charge, and
operation with gate voltages as low as 2.5V, in the
small SOT363 footprint. It can be used for a wide
variety of applications, including load switching, low
current inverters and low current DC-DC converters.
VDS
ID (at VGS=-10V)
-30V
-1.4A
RDS(ON) (at VGS=-10V)
< 115mΩ
RDS(ON) (at VGS =-4.5V)
< 140mΩ
RDS(ON) (at VGS =-2.5V)
< 200mΩ
SC-70
(SOT-323)
Top View
D
Bottom View
D
D
G
S
G
S
G
S
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
Drain-Source Voltage
VDS
Gate-Source Voltage
VGS
TA=25°C
Continuous Drain
Current
Pulsed Drain Current
Power Dissipation
Junction and Storage Temperature Range
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient A
Maximum Junction-to-Ambient A D
Maximum Junction-to-Lead
Rev 6: June 2011
Steady-State
Steady-State
A
0.35
W
0.22
TJ, TSTG
Symbol
t ≤ 10s
V
-10
PD
TA=70°C
±12
-1.0
IDM
TA=25°C
B
Units
V
-1.4
ID
TA=70°C
C
Maximum
-30
RθJA
RθJL
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-55 to 150
Typ
300
340
280
°C
Max
360
425
320
Units
°C/W
°C/W
°C/W
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AO7401
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
IDSS
Zero Gate Voltage Drain Current
Conditions
Min
ID=-250µA, VGS=0V
-30
-1
TJ=55°C
-5
Gate-Body leakage current
VDS=0V, VGS= ±12V
VGS(th)
Gate Threshold Voltage
VDS=VGS ID=-250µA
-0.6
ID(ON)
On state drain current
VGS=-10V, VDS=-5V
-10
VGS=-10V, ID=-1.4A
Static Drain-Source On-Resistance
TJ=125°C
92.5
115
130
160
A
mΩ
140
mΩ
mΩ
IS=-1A,VGS=0V
IS
Maximum Body-Diode Continuous Current
6
-0.78
DYNAMIC PARAMETERS
Ciss
Input Capacitance
Gate resistance
V
200
VDS=-5V, ID=-1.4A
Rg
nA
-1.4
110
Diode Forward Voltage
Output Capacitance
±100
-1
150
Forward Transconductance
Reverse Transfer Capacitance
µA
VGS=-2.5V, ID=-1A
VSD
Coss
Units
VGS=-4.5V, ID=-1.2A
gFS
Crss
Max
V
VDS=-30V, VGS=0V
IGSS
RDS(ON)
Typ
260
VGS=0V, VDS=-15V, f=1MHz
S
-1
V
-0.5
A
315
pF
37
pF
20
pF
8
12
Ω
SWITCHING PARAMETERS
Qg(10V) Total Gate Charge
5.9
7.2
nC
Qg(4.5V) Total Gate Charge
2.8
3.5
nC
Qgs
Gate Source Charge
Qgd
tD(on)
tr
Turn-On Rise Time
VGS=0V, VDS=0V, f=1MHz
VGS=-10V, VDS=-15V, ID=-1.4A
4
0.7
nC
Gate Drain Charge
1
nC
Turn-On DelayTime
6
ns
3.5
ns
VGS=-10V, VDS=-15V, RL=10Ω,
RGEN=3Ω
tD(off)
Turn-Off DelayTime
tf
Turn-Off Fall Time
20
ns
5
ns
trr
Body Diode Reverse Recovery Time
IF=-1.4A, dI/dt=100A/µs
11.5
Qrr
Body Diode Reverse Recovery Charge IF=-1.4A, dI/dt=100A/µs
4.5
15
ns
nC
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The
value in any given application depends on the user's specific board design.
B. The power dissipation PD is based on TJ(MAX)=150°C, using ≤ 10s junction-to-ambient thermal resistance.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep
initialTJ=25°C.
D. The RθJA is the sum of the thermal impedance from junction to lead RθJL and lead to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-ambient thermal impedance which is measured with the device mounted on 1in2 FR-4 board with
2oz. Copper, assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse ratin g.
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Rev 6: June 2011
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Page 2 of 5
AO7401
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
15
10
-10V
12
-4.5V
VDS=-5V
8
-3V
-6V
6
-ID(A)
-ID (A)
9
-2.5V
6
VGS=-2V
3
4
125°C
2
25°C
0
0
0
1
2
3
4
0
5
0.5
210
1.5
2
2.5
3
3.5
4
1.6
Normalized On-Resistance
VGS=-2.5V
190
170
RDS(ON) (mΩ )
1
-VGS(Volts)
Figure 2: Transfer Characteristics (Note E)
-VDS (Volts)
Fig 1: On-Region Characteristics (Note E)
150
VGS=-4.5V
130
110
90
VGS=-10V
70
VGS=-10V
ID=-1.4A
1.4
17
1.2
VGS=-4.5V
5
ID=-1.2A
2
10
1
VGS=-2.5V
ID=-1A
0.8
50
0
1
0
2
3
4
5
6
-ID (A)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage (Note E)
25
50
75
100
125
150
175
Temperature (°C)
0
Figure 4: On-Resistance vs. Junction Temperature
18
(Note E)
1.0E+02
250
ID=-1.4A
1.0E+01
40
1.0E+00
125°C
-IS (A)
RDS(ON) (mΩ )
200
150
25°C
1.0E-02
1.0E-03
25°C
100
125°C
1.0E-01
1.0E-04
1.0E-05
50
0
2
4
6
8
10
-VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
Rev 6: June 2011
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0.0
0.2
0.4
0.6
0.8
1.0
1.2
-VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)
Page 3 of 5
AO7401
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
400
10
VDS=-15V
ID=-1.4A
8
Ciss
Capacitance (pF)
-VGS (Volts)
300
6
4
200
Coss
100
2
0
Crss
0
0
1
2
3
4
5
Qg (nC)
Figure 7: Gate-Charge Characteristics
6
0
5
10
15
20
25
-VDS (Volts)
Figure 8: Capacitance Characteristics
30
20
100.0
TA=25°C
15
10µs
RDS(ON)
limited
1.0
100µs
1ms
10ms
0.1
10
5
TJ(Max)=150°C
TA=25°C
DC
10s
0.0
0.01
Power (W)
-ID (Amps)
10.0
0.1
1
10
0
100
0.00001
-VDS (Volts)
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
0.001
0.1
10
1000
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-toAmbient (Note F)
Zθ JA Normalized Transient
Thermal Resistance
10
1
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
RθJA=425°C/W
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
0.1
PD
0.01
Single Pulse
Ton
T
0.001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Rev 6: June 2011
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Page 4 of 5
AO7401
Gate Charge Test Circuit & Waveform
Vgs
Qg
-10V
-
-
VDC
+
VDC
Qgd
Qgs
Vds
+
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
toff
ton
Vgs
-
DUT
Vgs
VDC
td(on)
t d(off)
tr
tf
90%
Vdd
+
Rg
Vgs
10%
Vds
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
2
L
E AR= 1/2 LIAR
Vds
Vds
Id
-
Vgs
Vgs
VDC
+
Rg
BVDSS
Vdd
Id
I AR
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q rr = - Idt
Vds +
DUT
Vgs
Vds Isd
Vgs
Ig
Rev 6: June 2011
L
-Isd
+ Vdd
t rr
dI/dt
-I RM
Vdd
VDC
-
-I F
-Vds
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Page 5 of 5