AOSMD AOW12N50

AOW12N50/AOWF12N50
500V, 12A N-Channel MOSFET
General Description
Product Summary
The AOW12N50 & AOWF12N50 have been fabricated
using an advanced high voltage MOSFET process that is
designed to deliver high levels of performance and
robustness in popular AC-DC applications.By providing
low RDS(on), Ciss and Crss along with guaranteed avalanche
capability these parts can be adopted quickly into new
and existing offline power supply designs.
VDS
ID (at VGS=10V)
600V@150℃
12A
RDS(ON) (at VGS=10V)
< 0.52Ω
100% UIS Tested
100% Rg Tested
TO-262
Top View
TO-262F
Bottom View
D
Bottom View
Top View
G
G
D
S
S
D
G
G
D
S
S
D
G
S
Absolute Maximum Ratings TA=25°C unless otherwise noted
AOW12N50
Symbol
Parameter
AOWF12N50
VDS
Drain-Source Voltage
500
VGS
Gate-Source Voltage
±30
12*
T
12
=25°C
C
Continuous Drain
ID
Current
8.4
8.4*
TC=100°C
Pulsed Drain Current C
Avalanche Current C
Repetitive avalanche energy
C
Single plused avalanche energy G
Peak diode recovery dv/dt
TC=25°C
Power Dissipation B Derate above 25oC
Junction and Storage Temperature Range
Maximum lead temperature for soldering
purpose, 1/8" from case for 5 seconds
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient A,D
V
A
IDM
48
IAR
5.5
A
EAR
454
mJ
EAS
dv/dt
908
5
mJ
V/ns
W
PD
250
28
2
0.22
TJ, TSTG
-55 to 150
W/ oC
°C
300
°C
TL
Symbol
RθJA
RθCS
RθJC
AOW12N50
65
AOWF12N50
65
Units
°C/W
0.5
0.5
-4.5
°C/W
°C/W
Maximum Case-to-sink A
Maximum Junction-to-Case
* Drain current limited by maximum junction temperature.
Rev0: June 2010
Units
V
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Page 1 of 6
AOW12N50/AOWF12N50
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
ID=250µA, VGS=0V, TJ=25°C
500
Typ
Max
Units
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
BVDSS
/∆TJ
Zero Gate Voltage Drain Current
IDSS
Zero Gate Voltage Drain Current
ID=250µA, VGS=0V, TJ=150°C
600
V
ID=250µA, VGS=0V
0.54
V/ oC
VDS=500V, VGS=0V
1
VDS=400V, TJ=125°C
10
IGSS
Gate-Body leakage current
VDS=0V, VGS=±30V
VGS(th)
Gate Threshold Voltage
VDS=5V ID=250µA
RDS(ON)
Static Drain-Source On-Resistance
gFS
Forward Transconductance
VSD
Diode Forward Voltage
IS=1A,VGS=0V
IS
Maximum Body-Diode Continuous Current
Maximum Body-Diode Pulsed Current
ISM
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
SWITCHING PARAMETERS
Qg
Total Gate Charge
Qgs
Gate Source Charge
Qgd
Gate Drain Charge
±100
3.9
4.5
nΑ
V
VGS=10V, ID=6A
0.36
0.52
Ω
VDS=40V, ID=6A
16
1
V
12
A
48
A
DYNAMIC PARAMETERS
Ciss
Input Capacitance
Coss
µA
VGS=0V, VDS=25V, f=1MHz
VGS=0V, VDS=0V, f=1MHz
VGS=10V, VDS=400V, ID=12A
3.3
S
0.72
1089
1361
1633
pF
115
167
218
pF
7
12.6
18
pF
1.8
3.6
5.4
Ω
24
30.7
37
nC
6
7.6
9
nC
6
13.0
20
nC
29
35
ns
69
83
ns
82
98
ns
55.5
67
ns
ns
µC
tD(on)
Turn-On DelayTime
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
tf
Turn-Off Fall Time
trr
Body Diode Reverse Recovery Time
IF=12A,dI/dt=100A/µs,VDS=100V
180
231
277
Qrr
Body Diode Reverse Recovery Charge IF=12A,dI/dt=100A/µs,VDS=100V
2.2
2.82
3.4
VGS=10V, VDS=250V, ID=12A,
RG=25Ω
A. The value of R θJA is measured with the device in a still air environment with T A =25°C.
B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C, Ratings are based on low frequency and duty cycles to keep initial TJ
=25°C.
D. The R θJA is the sum of the thermal impedence from junction to case R θJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming a
maximum junction temperature of T J(MAX)=150°C. The SOA curve provides a single pulse rating.
G. L=60mH, IAS=5.5A, VDD=150V, RG=25Ω, Starting TJ=25°C
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Rev0: June 2010
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Page 2 of 6
AOW12N50/AOWF12N50
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
24
100
10V
10
16
6V
ID(A)
ID (A)
-55°C
VDS=40V
6.5V
20
12
8
125°C
1
VGS=5.5V
25°C
4
0.1
0
0
5
10
15
20
25
2
30
4
8
10
3
Normalized On-Resistance
0.8
0.7
RDS(ON) (Ω)
6
VGS(Volts)
Figure 2: Transfer Characteristics
VDS (Volts)
Fig 1: On-Region Characteristics
0.6
0.5
VGS=10V
0.4
4
8
12
16
20
24
VGS=10V
ID=6A
2
1.5
1
0.5
0
-100
0.3
0
2.5
28
ID (A)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage
-50
0
50
100
150
200
Temperature (°C)
Figure 4: On-Resistance vs. Junction Temperature
1.2
1.0E+02
40
1.0E+00
IS (A)
BVDSS (Normalized)
1.0E+01
1.1
1
125°C
1.0E-01
25°C
1.0E-02
0.9
1.0E-03
0.8
-100
1.0E-04
-50
0
50
100
150
200
TJ (°C)
Figure 5:Break Down vs. Junction Temparature
Rev0: June 2010
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0.0
0.2
0.4
0.6
0.8
1.0
VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)
Page 3 of 6
AOW12N50/AOWF12N50
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
15
10000
VDS=400V
ID=12A
Ciss
Capacitance (pF)
VGS (Volts)
12
9
6
1000
Coss
100
10
3
Crss
0
1
0
5
10
15
20
25
30
35
40
Qg (nC)
Figure 7: Gate-Charge Characteristics
100
1
10
VDS (Volts)
Figure 8: Capacitance Characteristics
100
100
RDS(ON)
limited
10µs
100µs
1ms
1
10ms
DC
TJ(Max)=150°C
TC=25°C
0.1
10µs
RDS(ON)
limited
10
ID (Amps)
10
ID (Amps)
0.1
45
100µs
1ms
1
DC
TJ(Max)=150°C
TC=25°C
0.1
10ms
0.1s
1s
0.01
0.01
1
10
100
1000
1
10
100
1000
VDS (Volts)
VDS (Volts)
Figure 9: Maximum Forward Biased Safe
Operating Area for AOW12N50 (Note F)
Figure 10: Maximum Forward Biased Safe
Operating Area for AOWF12N50 (Note F)
15
Current rating ID(A)
12
9
6
3
0
0
25
75
100
125
TCASE (°C)
Figure 11: Current De-rating (Note B)
Rev0: June 2010
50
150
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Page 4 of 6
AOW12N50/AOWF12N50
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
ZθJC Normalized Transient
Thermal Resistance
10
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
RθJC=0.5°C/W
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
1
PD
0.1
Single Pulse
0.01
0.00001
0.0001
Ton
0.001
0.01
0.1
T
1
10
100
Pulse Width (s)
Figure 12: Normalized Maximum Transient Thermal Impedance for AOW12N50 (Note F)
ZθJC Normalized Transient
Thermal Resistance
10
1
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
RθJC=4.5°C/W
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
0.1
PD
0.01
Ton
Single Pulse
0.001
0.00001
0.0001
0.001
0.01
0.1
1
10
T
100
1000
Pulse Width (s)
Figure 13: Normalized Maximum Transient Thermal Impedance for AOWF12N50 (Note F)
Rev0: June 2010
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Page 5 of 6
AOW12N50/AOWF12N50
Gate Charge Test Circuit & Waveform
Vgs
Qg
10V
+
+
VDC
-
VDC
DUT
Qgs
Vds
Qgd
-
Vgs
Ig
Charge
Res istive Switching Test Circuit & Waveforms
RL
Vds
Vds
DUT
Vgs
Rg
+
VDC
90%
Vdd
-
10%
Vgs
Vgs
t d(on)
tr
t d(off)
t on
tf
t off
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
EAR= 1/2 LI
Vds
2
BVDSS
AR
Vds
Id
+
Vgs
Vgs
VDC
Rg
-
Vdd
I AR
Id
DUT
Vgs
Vgs
Diode Recovery Tes t Circuit & Waveforms
Qrr = - Idt
Vds +
DUT
Vds -
Isd
Vgs
Ig
Rev0: June 2010
Vgs
L
Isd
+
VDC
-
IF
trr
dI/dt
IRM
Vdd
Vdd
Vds
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Page 6 of 6