AOZ1977-1 High Voltage LED Driver IC General Description Features The AOZ1977-1 is a high-efficiency LED driver controller for high voltage LED backlighting applications. It is designed to drive high-brightness LED light bar in LED TV applications. The AOZ1977-1 can support a wide range of input and output voltages. The input bias voltage of AOZ1977-1 is from 8V to 30V. • • The AOZ1977-1 has multiple features to protect the regulator under fault conditions. A control pin can disable an external switch to disconnect the LEDs current path from the output in PWM dimming or under catastrophic failure conditions. Cycle-by-cycle current protection limits the peak inductor current. Thermal shutdown provides another level of protection. Low feedback voltage (500mV) helps reduce power loss. The AOZ1977-1 features sync function to allow for synchronization with external clock or multiple AOZ1977-1. The AOZ1977-1 is available in a standard SO-16 package and operates over the temperature range of -40°C to +85°. • • • • • • • • • • 8V to 30V input bias voltage Up to 16V driving capability at GATE pin and DPWM pin. Disconnect control pin for PWM dimming or fault conditions. Bi-directional Clock synchronization 500mV feedback regulation Feedback short protection 8 bit PWM dimming resolution Cycle-by-cycle current limit Output over-voltage protection LED short and open protection Thermal shutdown protection SO-16 package Applications • • • LCD TV LED backlight LED monitor General LED lighting Typical Application Rev. 1.0 November 2011 www.aosmd.com Page 1 of 16 AOZ1977-1 Ordering Information Part Number Temperature Range Package Environmental AOZ1977AI-1 -40°C to +85°C SOIC-16 Green AOS Green Products use reduced levels of Halogens, and are also RoHS compliant. Please visit www.aosmd.com/web/quality/rohs_compliant.jsp for additional information. Pin Configuration VIN 1 16 FB VDD 2 15 ISET GATE 3 14 COMP GND 4 13 DBRT CS 5 12 OVP TIMER 6 11 DPWM OSC 7 10 VREF SYNC 8 9 ILIM SOIC-16 (Top View) Pin Description Part Number Pin Name 1 2 VIN VDD 3 4 5 6 7 8 GATE GND CS TIMER OSC SYNC 9 10 11 ILIM VREF DPWM 12 OVP 13 DBRT 14 COMP 15 16 ISET FB Rev. 1.0 November 2011 Pin Function Input Supply Pin. Internal 8V Linear Regulator Output Pin for GATE Driver. Connect a minimum 0.22µF ceramic capacitor from VDD to ground. External Boost NMOS Gate Controller Pin. Connect to the gate of external NMOS switch. Ground Pin. NMOS Switch Current Sense Pin. Sets feedback short protection blanking time at start up. Connect CTIMER to GND Frequency Set Pin. Connect ROSC to ground via a resistor to set the switching frequency. Frequency Synchronous Pin. Connect SYNC to external clock for desired switching frequency or connect to multiple controllers for phase locked frequency synchronization. Current limit Set Pin. Reference Voltage. Fault and Dimming control output Pin. DPWM=High for LED connect. DPWM=Low for LED disconnect. Connect to the gate of external NMOS switch. Over-Voltage Feedback Input Pin. Use a voltage divider to set the boost regulator output over-voltage protection threshold. PWM Brightness Control Input. DBRT controls the LED brightness by turning the LED on and off using a PWM signal. The brightness is proportional to the PWM duty cycle. Compensation Pin. COMP is the output of the internal error amplifier. For loop compensation connect a RC network from COMP to ground. LED Current Set Pin. Connect ISET to VREF resistor divider to set the LED current level. Feedback Input Pin. Connect to sense resistor at LED string. www.aosmd.com Page 2 of 16 AOZ1977-1 Pin Functions Pin1: VIN This is the input power for the controller IC. If the input of the boost converter is less than 30V, VIN can be connected directly to the boost supply voltage. If the boost supply voltage is higher than 30V, a separate supply rail between 8V to 30V is required for the VIN pin. It is recommended that an RC filter should be added between VIN and boost supply voltage if they are connected directly. Please note that when VIN is not directly connected to the boost supply voltage, proper power up sequence will be required. Boost supply voltage must be ready before powering up VIN. There is no power down sequence required. Pin2: VDD This is the output of an internal 8V regulator. It requires a 2.2µF decoupling capacitor to be connected to ground. The internal regulator can be over-driven by external supply between 8V to 16V if higher gate drive is desired. PIN3: GATE This is the driver output for the gate of boost NMOS switch. The GATE = high voltage is equal to VDD voltage. It is recommended to add a 1Ω resistor between this pin and the NMOS gate. The resistor value can be optimized depending on the switching frequency and selection of the NMOS switch. PIN4: GND This is the signal and power ground for the IC controller. It is recommended that all the low current paths are connected to this pin as close as possible to the IC controller. It is not recommended to connect any output or input filter capacitors and any current sense resistors to this pin directly. The IC controller ground should be an island around the IC connected to the PWR GND at a single point in the layout. PIN5: CS This is the input for peak current sense. This pin serves the functions of current feedback, peak current limit detection, and fault current detection. The pin current limit is set by the voltage defined at PIN9 ILIM. The current limit is defined as voltage at ILIM divided by the sense resistor connected from this pin to ground. Rev. 1.0 November 2011 If CS pin detect a fault current detection such as short circuit condition, it will trigger a fault signal. The IC controller will latch-off until VIN is toggled. PIN6: TIMER Startup-short protection timer. Connecting this pin to GND via a capacitor, sets the time the controller allows Feedback voltage to remain below 0.19V during start up. If voltage at FB remains below 0.19V after set time has expired, the controller will shut down and latch off. After the power-up sequence is completed, the TIMER pin will have no effect. The controller will instantaneously latch-off whenever feedback voltage drops below 0.19V. For most designs it is recommended to use no less than 100nF capacitor. TIMER = CTIMER / 1.25 µA Note that DBRT must be applied before CTIMER times out. PIN7: ROSC This is the pin to select the switching frequency for the boost controller. A resistor should be connected between this pin to ground. The switching frequency is determined by the following equation: FSW = 1/ (ROSC Ω × 10 pF ) It is recommended that the switching frequency for normal operation should be between 50KHz to 350KHz. Pin8: SYNC This is a bidirectional pin for oscillator clock synchronization. Clock synchronization will choose either the internal clock or the external clock through this pin, whichever is faster. The faster external clock must be ready before power is applied to this IC controller. If the internal clock is faster, the SYNC pin will have the same frequency as the internal clock. When multiple IC controllers are used in the design, it is recommended to connect all SYNC pins together. This will reduce the interference of “beat” frequencies associated with multiple switching frequencies. www.aosmd.com Page 3 of 16 AOZ1977-1 PIN9: ILIM This is the current limit set point. The voltage at this pin will determine the CS current limit threshold detected at PIN5 CS. The voltage can be derived from a resistor divider from the 1.2V reference voltage at Pin10 VREF. To minimize power consumption, it is recommended that the total resistance for the divider is approximately 20kΩ. Pin10: VREF This is a 1.2V voltage reference for all external bias. This reference voltage can be used for Pin15 ISET and Pin9 ILIM bias. Pin11: DPWM This is the driver output for the gate of the LED current control NMOS switch. DPWM = low if PIN13 DBRT signal is low or fault condition is triggered. The DPWM = high if PIN13 DBRT signal is high under normal operation. The high voltage is equal to VDD voltage. It is recommended to add a 1Ω resistor between this pin and the NMOS gate. The resistor value can be optimized depending on the switching frequency and selection of the NMOS. PIN12: OVP This is the input for LED Over-Voltage Protection. OVP monitors the LED output voltage through a resistor divider. When the voltage at this pin is higher than 1V, the controller will stop switching immediately until VIN power is toggled. Pin14: COMP This is for feedback loop compensation. It is the output of the error amplifier that controls PWM logic for the boost controller. An RC network should be used to generate the compensation for boost feedback loop. Pin15: ISET This is for full scale LED current setting. A reference voltage between 0.5V and 0.8V should be applied to this pin. The voltage can be derived from a resistor divider from the 1.2V reference voltage at Pin10 VREF. To minimize power consumption, it is recommended that the total resistance for the divider is approximately 20kΩ. The FB voltage will regulate to this voltage level. The full scale LED current is derived by the FB voltage divided by the Sense resistor. Pin16: FB This is the feedback input for boost controller. This pin should connect to a resistor that senses the LED current. The FB voltage will be regulated to ISET voltage to determine the desired LED current when LED current control NMOS switch is on. If the FB voltage drops below 0.19V the controller interprets this condition as either shorted FB sense resistor or LED cathode shorted to GND or output shorted to GND and will immediately shutdown and latch off . Pin13: DBRT This is the input for digital brightness control. A PWM logic signal is applied to this pin to vary the brightness of the LED. The brightness of the LED is proportional to the duty cycle of the PWM logic signal. The input signal will control the output driver at DPWM pin. This input pin cannot be left floating. Power up sequencing is important. DBRT logic must be HIGH before VIN is higher than UVLO threshold. Rev. 1.0 November 2011 www.aosmd.com Page 4 of 16 AOZ1977-1 Functional Block Absolute Maximum Ratings Recommended Operating Ratings Exceeding the Absolute Maximum Ratings may damage the device. This device is not guaranteed to operate beyond the Recommended Operating Ratings. Parameter VIN to GND GATE, FAULTB to GND VDD to GND PWMDIM, OSC, ISET, COMP, FB TIMER, SYNC, CS. ILIM, VREF, OVP, to GND Storage Temperature (TS) (1) ESD Rating Parameter Supply Voltage (VVIN) Ambient Temperature (TA) Package Thermal Resistance SOIC-16 (ΘJA) Rating -0.3V to +32V -0.3V to +16V -0.3V to +16V -0.3V to +6V Rating 8V to 30V -40°C to +85°C 105°C/W -65°C to +150°C 2kV Note: 1. Devices are inherently ESD sensitive, handling precautions are required. Human body model rating: 1.5kΩ in series with 100pF. Rev. 1.0 November 2011 www.aosmd.com Page 5 of 16 AOZ1977-1 Electrical Characteristics TA = 25°C, VIN = 24V unless otherwise specified. Symbol VVIN IVIN_ON VUVLO_RISE VUVLO_FALL VVIN_HYS VVDD Parameter VIN Supply Voltage VIN Quiescent Current VIN UVLO Threshold VIN UVLO Hysteresis VDD Regulation Voltage Conditions Min. Typ. 8 Not Switching VIN rising VIN falling 6.2 8.5V < VVIN < 30V 7.5 ROSC = 1MΩ ROSC = 285kΩ ROSC = 1MΩ 85 298 GATE = 0V. VDD = 8V GATE = 8V. VDD = 8V CGATE = 1nF. VDD = 8V 10% to 90% of VDD CGATE = 1nF. VDD = 8V 90% to 10% of VDD 200 400 Max Units 30 2 V mA 7 6.5 500 8 7.3 V 8.5 mV V 100 350 150 115 402 200 Oscillator FSW Switching Frequency TON Minimum ON Time (PWM) kHz ns GATE Driver IGATE_SOURCE IGATE_SINK Source Current Sink Current TGATE_RISE Rise Time TGATE_FALL Fall Time 250 450 mA mA 50 85 ns 25 45 ns 5 5 5 5 5 5 2000 µA µA µA µA µA µA Hz 200 1.212 µA V 140 1.1 % of VCS Inputs ICS IISET IILIM IDBRT IOVP IFB FDBRT CS Input Current ISET Input Current ILIM Input Current DBRT Input Current OVP Input Current FB Input Current DBRT Dimming Frequency CS = 0.3V ISET = 0.5V ILIM = 0.4V (140% of CS) DBRT = 5V OVP = 1.2V FB = 0.5V PWM minimum ON time >9µs VREF Output Source Current VREF Reference Voltage RVREF = 6kΩ to GND RVREF = 6kΩ to GND Current Limit Set OVP Threshold Voltage OVP Hysteresis TIMER Charge Current Thermal Shutdown Threshold Thermal Shutdown Hysteresis CS = 0.3V DPWM Source current DPWM Sink current GATE = 0V GATE = 8V 100 Outputs IVREF VVREF 1.188 1.2 126 0.9 133 1 200 1.25 145 35 Protection VILIM VOVP VOVP_HYS ITIMER TTHERMAL_SD TTHERMAL_HYS V mV µA °C °C DPWM Drive IDPWM_SOURCE IDPWM_SINK 36 46 mA mA 2.0 V V Logic Input VDBRT_HI VDBRT_LO DBRT Logic High DBRT Logic Low Rev. 1.0 November 2011 0.8 www.aosmd.com Page 6 of 16 AOZ1977-1 Typical Performance Characteristics Switching Waveforms of Gate, Inductor Current and LX Voltage: VLED = 200V, ILED = 200mA PVIN = 90V PVIN = 100V GATE (10V/div) GATE (10V/div) Inductor Current (0.5A/div) Inductor Current (0.5A/div) LX Voltage (100V/div) LX Voltage (100V/div) 5µs/div 5µs/div PVIN = 120V PVIN = 150V GATE (10V/div) GATE (10V/div) Inductor Current (0.5A/div) Inductor Current (0.5A/div) LX Voltage (100V/div) LX Voltage (100V/div) 5µs/div 5µs/div Rev. 1.0 November 2011 www.aosmd.com Page 7 of 16 AOZ1977-1 PWM Dim Waveforms: VIN = 100V, 200V LED / 200mA, DBRT = 400Hz DBRT = 10% DBRT = 50% LED Voltage (50V/div) LED Voltage (50V/div) LED Current (0.2A/div) LED Current (0.2A/div) DBRT (2V/div) DBRT (2V/div) 1ms/div 1ms/div DBRT = 90% Zoomed DBRT = 0.5% LED Voltage (50V/div) LED Voltage (50V/div) LED Current (0.2A/div) LED Current (0.2A/div) DBRT (2V/div) DBRT (2V/div) 2µs/div 1ms/div Rev. 1.0 November 2011 www.aosmd.com Page 8 of 16 AOZ1977-1 Additional Waveforms PVIN = 100V, VLED = 200V, ILED = 200mA, FSW = 100kHz Feedback Short Protection During Steady State Feedback Short Protection During Start-Up Feedback Voltage (0.5Vdiv) Feedback Voltage (0.5Vdiv) LX Voltage (100/div) LX Voltage (100/div) LED Voltage (100V/div) LED Voltage (100V/div) LED Current (200mA/div) LED Current (200mA/div) 1ms/div 50ms/div Partial LED String Short Protection OVP Protection LED Voltage (50V/div) Feedback Voltage (1Vdiv) LX Voltage (100/div) LX Voltage (100/div) LED Current (100mA/div) 1ms/div Rev. 1.0 November 2011 LED Current (100mA/div) 100µs/div www.aosmd.com Page 9 of 16 AOZ1977-1 Detailed Description The AOZ1977-1 is a boost DC/DC controller designed to power a series of LEDs by regulating the current into an LED string. The LED current information is provided to the system through the sense resistor RFB at the bottom of LED string, between FB and GND pins. Protection Features Over-Current Protection at Boost Switch The current limit is a function of RS resistor value at CS pin and the voltage setting at ILIM pin. The voltage at ILIM is directly compared to the sense voltage at CS pin. When CS voltage reaches ILIM set voltage, current limit protection triggers and the boost switch will be turned off immediately until the next clock cycle. To make sure that current limit protection does not affect the normal operation, the current limit should be set at least 30% higher than the inductor peak current. However, the voltage at ILIM must be less than 0.4V. When CS voltage is higher than 0.4V, fault detection is active and it might affect the normal operation. ILIM voltage is generated by connecting a resistor divider (RL1 and RL2 in typical application diagram) from 1.2V VREF pin to ILIM and GND pins. To minimize power consumption, it is recommended that the total resistance for the divider is approximately 20kΩ. LED Short Protection When FB voltage exceeds 1V, the system will consider some or all LEDs are shorted instantaneously. Under this condition, the controller will latch off until VIN is recycled. LED Open Protection When all LEDs are open, the system will respond by boosting the output voltage. Once the output voltage reaches the OVP threshold, OVP protection will trigger, controller will latch off until VIN is recycled. Feedback short AOZ1977-1 also protects against shorted feedback sense resistor or LED cathode shorted to GND. The controller will latch off when feedback voltage drops to 0.19V or below. Thermal Protection An internal temperature sensor monitors the junction temperature. It shuts down the internal control circuit and all drivers if the junction temperature exceeds 145ºC. For example: If peak current is 0.55A. 30% higher is 0.72A. CS voltage is 0.72A * 0.55Ω = 0.4V. Over-Voltage Protection at Output Over-voltage protection is monitoring the LED output voltage through a resistor divider (Rov1 and Rov2 in Typical Application Circuit) from VOUT to OVP and GND pins. When the voltage at this pin is higher than 1V, the controller will stop switching immediately and will latch off until VIN is recycled. Rev. 1.0 November 2011 www.aosmd.com Page 10 of 16 AOZ1977-1 Application Information Inductor Selection Inductor choice will be affected by many parameters, like duty cycle based on input/output setting, switching frequency, full scale LED current level, and mode of operations. Boost controller can operate under discontinuous mode, continuous mode, or critical conduction mode. For high voltage boost LED driver applications, it is recommended to use critical conduction mode for good stability and best efficiency. effect, it is always preferable to use shielded type inductors. Diode Selection It is recommended to use fast recovery diode for D1. For most applications, Schottky diodes with correct current and voltage rating are suitable. The diode current rating should be at least higher than the full scale LED current. The diode voltage rating should be higher than the OVP level of VOUT voltage. ILPEAK Inductor Current in Critical Conduction Mode Input _ Current = I IN COUT = V ×I = OUT OUT VIN In critical conduction mode: ILPEAK = di = 2 × I IN The duty cycle for the boost DC/DC system is defined as: Duty _ Cycle = D = Output Capacitors The amount and type of capacitor used is mainly determined by the design output ripple (VRIPPLE) requirement: VOUT − VIN ( MIN ) VOUT IOUT VRIPPLE × D FSW When selecting output capacitors, it is more important to check the effective ESR of the capacitor than the actual capacitance value. For examples, a 10µF capacitor with 0.02Ω ESR will handle higher ripple current but produce less output ripple than a 33µF capacitor with 0.04Ω ESR. It is recommended to use low ESR MLCC ceramic capacitors. For high voltage cost effective application, multiple Electrolytic capacitors in parallel will reduce the total effective ESR. To determine the ON time for the boost switch: ON _ time = dt = D FSW For the application with VIN=100V, VOUT=200V, LED current=200mA: I IN = 200V × 0.2 A = 0.44 A 90V The ripple current at the input capacitor is: di = 2 × 0.44 A = 0.89 A D= I IN _ RIPPLE = 200V − 90V = 0.55 200V FSW is the switching frequency, 100KHz in this example. dt × VIN 5.5 µs × 90V = = 560 µH di 0.88 A After the inductor value is calculated, we need to consider the DCR resistance and the Isat saturation current of the inductor. Inductor DCR is inversely proportional to the Isat. It is recommended to select an inductor for which the Isat value should be at least 50% higher than the ILpeak value. To minimize EMI Rev. 1.0 November 2011 0.3 × VIN × (VOUT − VIN ) = 0.17 A FSW × L × VOUT where, The inductor value is determined by: L= Input Capacitors The input capacitors for boost converters do not require low ESR due to the fact that the input current is continuous. Also, they do not contain large peak current as compared to the output capacitors. Electrolytic capacitors should work well with the appropriate voltage and ripple current rating, it is not recommended to use Tantalum capacitors because Boost converters do exhibit high surge currents during startup which can cause tantalum capacitors to fail. www.aosmd.com Page 11 of 16 AOZ1977-1 Current Sense Resistors There are two current sense resistors in this application, an LED current sense resistor RFB and a Boost switch current sense resistor RS. The RHP zero has the effect of a zero in the gain causing an imposed +20dB/decade on the roll off, but o has the effect of a pole in the phase, subtracting 90 in the phase. The RHP zero can be calculated by: RFB LED current sense resistor is set by: fZ 2 = RFB = 2 ISET _ VOLTAGE 0.5V = = 2 .5 Ω LED _ CURRENT 0 .2 A LED current is a function of ISET voltage and RFB resistance. ISET voltage is generated by connecting a resistor divider (Rr1 and Rr2 in typical application diagram) from 1.2V VREF pin to ISET and GND pins. To minimize power consumption, it is recommended that the total resistance for the divider is approximately 20kΩ. RS boost switch current sense resistor is set by: RS = 0.3V 0.3V = = 0.375Ω Inductor _ Peak _ Current 0.8 A For typical application, we recommend to set the voltage at CS to approximately 0.3V when inductor current reaches the peak, and 0.4V at ILIM pin set by R11 and R12 divided from 1.2V VREF. Boost Feedback Loop Compensation The AOZ1977-1 employs peak current mode control for easy use and fast transient response. Peak current mode control eliminates the double pole effect of the output L&C filter. It greatly simplifies the compensation loop design. With peak current mode control, the boost power stage can be simplified to be a one-pole, one left plane zero and one right half plane (RHP) system in frequency domain. The pole is dominant pole and can be calculated by: fP 1 = 1 2π × CO × RL fZ1 = The RHP zero obviously can cause the instable issue if the bandwidth is higher. It is recommended to design the bandwidth to lower than the one half frequency of RHP zero. The compensation design is actually to shape the converter close loop transfer function to get desired gain and phase. Several different types of compensation network can be used for AOZ1977-1. For most cases, a series capacitor and resistor network connected to the COMP pin sets the polezero and is adequate for a stable high-bandwidth control loop. In the AOZ1977-1, FB pin and COMP pin are the inverting input and the output of internal transconductance error amplifier. A series R and C compensation network connected to COMP provides one pole and one zero. The pole is: fP 2 = 1 2π × CO × ESRCO GEA 2π × CC × GVEA where, GEA is the error amplifier transconductance, which is -6 200∙10 A/V, GVEA is the error amplifier voltage gain, which is 1000 V/V, and CC is compensation capacitor. The zero given by the external compensation network, capacitor CC and resistor RC, is located at: fZ 2 = The zero is a ESR zero due to output capacitor and its ESR can be calculated by: VIN 2π × L × IO × VO 1 2π × CC × RC Choosing the suitable CC and RC by trading-off stability and bandwidth. where, CO is the output filter capacitor, RL is load resistor value, and ESRCO is the equivalent series resistance of output capacitor. Rev. 1.0 November 2011 www.aosmd.com Page 12 of 16 AOZ1977-1 PCB Layout Consideration Correct layout practices are essential for a working design that will meet expectations. It is recommended to use two-layer board for the design. However, a single layer board would be sufficient if basic layout rules are followed. In any SMPS layout, external components should be grouped into Power or IC control. From typical application circuit, there are two GND symbols. The striped one is for Power GND and the solid one is for Signal/Control GND. Both symbols are connected to a single point connection on the layout. All Power connections should be as short and wide as possible in order to reduce undesired parasitic inductance. The output capacitors should be physically placed in the current path between the SMPS and the load. Input capacitors should be placed as close as possible to the input side of the inductor. To prevent interference and system noise, it is critical that the switch node connection for boost switch, inductor, and output diode must be as short and close as possible. A GND copper layer covers the top layer to help shield the noise. For two-layer board, it is essential that the GND plane under this switching node should be filled and uninterrupted Single Point Connection: Connecting PWR GND and Signal GND Rev. 1.0 November 2011 www.aosmd.com Page 13 of 16 AOZ1977-1 Package Dimensions, SOIC-16L 16 1 2 3 .004"(0.10mm) RECOMMENDED LAND PATTERN 2.2 5.74 2.87 1.27 Symbols Min. Nom. Max. Symbols Min. Nom. Max. A 1.35 1.60 1.75 A 0.053 0.063 0.069 A1 0.10 — 0.25 A1 0.004 — 0.010 A2 — 1.45 — A2 — 0.057 — b 0.33 — 0.51 b 0.013 — 0.020 C 0.19 — 0.25 C 0.007 — 0.010 D 9.80 — 10.00 D 0.386 — 0.394 E1 3.80 3.90 4.00 E1 0.150 0.154 0.157 e e 1.27 TYP 0.050 TYP E 5.80 6.00 6.20 E 0.228 0.236 0.244 L 0.40 — 1.27 L 0.016 — 0.050 θ 0° — 8° θ 0° — 8° 0.8 0.63 Notes: 1. All dimensions are in millimeters. 2. Dimensions are inclusive of plating 3. Package body sizes exclude mold flash and gate burrs. Mold flash at the non-lead sides should be less than 6 mils. 2. Dimension L is measured in gauge plane. 3. Tolerance is 0.10mm unless otherwise specified. 4. Controlling dimension is millimeter, converted inch dimensions are not necessarily exact. Rev. 1.0 November 2011 www.aosmd.com Page 14 of 16 AOZ1977-1 Tape and Reel Dimensions, SOIC-16L P0 K0 T D0 A P2 E1 E2 CL B1 B0 E B2 K1 SECTIONA--A A1 P1 A D1 A0 FEEDING DIRECTION UNIT: MM Package SO16 (16 mm) A0 B0 6.50 10.30 ±0.1 ±0.1 K0 2.30 ±0.1 K1 D0 D1 E E1 1.80 1.55 1.6 16.00 1.75 ±0.1 ±0.05 ±0.1 ±0.3 ±0.1 E2 P0 P1 P2 T B1 B2 A1 7.50 ±0.1 4.0 ±0.1 8.00 ±0.1 2.0 ±0.1 0.3 ±0.05 REF. 6.6 REF. 1.5 REF. 3.5 W3 (Include flange distortion at outer edge) W1 (Measured at Hub) S K M N (Hub Dia.) H W2 (Measured at Hub) T UNIT: MM Tape Size M N T W1 16mm Ø332 MAX. Ø100.0 ±2.0 2.0 ±0.5 16.4 Trailer Tape 300mmmin. Rev. 1.0 November 2011 W2 W3 22.4 15.9~19.4 MAX. ComponentsTape Orientation in Pocket www.aosmd.com S K H 2.2 TYP. 10.1 MIN. Ø13.0 ±0.2 Leader Tape 500mmmin. Page 15 of 16 AOZ1977-1 Part Marking AOZ1977AI-1 (SOIC-16) Z1977AI-1 Part Number Code FX YW LT Assembly Lot Code Fab & Assembly Location Year & Week Code This datasheet contains preliminary data; supplementary data may be published at a later date. Alpha and Omega Semiconductor reserves the right to make changes at any time without notice. LIFE SUPPORT POLICY ALPHA & OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. Rev. 1.0 November 2011 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.aosmd.com Page 16 of 16