NSC LMC7101BIN

LMC7101
Tiny Low Power Operational Amplifier with Rail-To-Rail
Input and Output
General Description
Features
The LMC7101 is a high performance CMOS operational amplifier available in the space saving SOT 23-5 Tiny package.
This makes the LMC7101 ideal for space and weight critical
designs. The performance is similar to a single amplifier of
the LMC6482/4 type, with rail-to-rail input and output, high
open loop gain, low distortion, and low supply currents.
The main benefits of the Tiny package are most apparent in
small portable electronic devices, such as mobile phones,
pagers, notebook computers, personal digital assistants,
and PCMCIA cards. The tiny amplifiers can be placed on a
board where they are needed, simplifying board layout.
n Tiny SOT23-5 package saves space — typical circuit
layouts take half the space of SO-8 designs
n Guaranteed specs at 2.7V, 3V, 5V, 15V supplies
n Typical supply current 0.5 mA at 5V
n Typical total harmonic distortion of 0.01% at 5V
n 1.0 MHz gain-bandwidth
n Similar to popular LMC6482/4
n Input common-mode range includes V− and V+
n Tiny package outside dimensions — 120 x 118 x 56 mils,
3.05 x 3.00 x 1.43 mm
Applications
n
n
n
n
Mobile communications
Notebooks and PDAs
Battery powered products
Sensor interface
Connection Diagram
5-Pin SOT23-5
DS011991-2
Top View
Package
5-Pin SOT 23-5
Ordering Information
NSC Drawing
Number
Package
Marking
Supplied As
LMC7101AIM5
MA05A
A00A
1k Units on Tape and Reel
LMC7101AIM5X
MA05A
A00A
3k Units Tape and Reel
LMC7101BIM5
MA05A
A00B
1k Units on Tape and Reel
LMC7101BIM5X
MA05A
A00B
3k Units Tape and Reel
© 1999 National Semiconductor Corporation
DS011991
www.national.com
LMC7101 Tiny Low Power Operational Amplifier with Rail-To-Rail Input and Output
September 1999
Absolute Maximum Ratings (Note 1)
Storage Temperature Range
Junction Temperature (Note 4)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
ESD Tolerance (Note 2)
Difference Input Voltage
Voltage at Input/Output Pin
Supply Voltage (V+ − V−)
Current at Input Pin
Current at Output Pin (Note 3)
Current at Power Supply Pin
Lead Temp. (Soldering, 10 sec.)
−65˚C to +150˚C
150˚C
Recommended Operating
Conditions (Note 1)
2000V
± Supply Voltage
Supply Voltage
Junction Temperature Range
LMC7101AI, LMC7101BI
Thermal Resistance (θJA)
M05A Package, 5-Pin Surface Mt.
(V+) + 0.3V, (V−) − 0.3V
16V
± 5 mA
± 35 mA
35 mA
260˚C
2.7V ≤ V+ ≤ 15.5V
−40˚C ≤ TJ ≤ +85˚C
325˚C/W
2.7V Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = 2.7V, V− = 0V, VCM = VO = V+/2 and RL > 1 MΩ. Boldface limits apply at the temperature extremes.
Symbol
VOS
Parameter
Input Offset Voltage
Conditions
V+ = 2.7V
Typ
LMC7101AI
(Note 5)
Limit
Limit
(Note 6)
(Note 6)
6
9
0.11
LMC7101BI
Units
mV
max
TCVOS
Input Offset Voltage
1
µV/˚C
Average Drift
IB
Input Bias Current
1.0
64
64
pA max
IOS
Input Offset Current
0.5
32
32
pA max
RIN
Input Resistance
>1
CMRR
Common-Mode
55
50
Input Common-Mode
0V ≤ VCM ≤ 2.7V
V+ = 2.7V
V+ = V
Voltage Range
For CMRR ≥ 50 dB
Rejection Ratio
VCM
70
Tera Ω
dB
min
0.0
0.0
0.0
V
min
3.0
2.7
2.7
V
max
PSRR
Power Supply
Rejection Ratio
CIN
V+ = 1.35V to 1.65V
V− = −1.35V to −1.65V
VCM = 0
Common-Mode Input
dB
60
50
45
3
min
pF
Capacitance
VO
Output Swing
RL = 2 kΩ
RL = 10 kΩ
IS
Supply Current
SR
Slew Rate
GBW
Gain-Bandwidth Product
(Note 8)
2.45
2.15
2.15
V min
0.25
0.5
0.5
V max
2.68
2.64
2.64
V min
0.025
0.06
0.06
V max
0.5
0.81
0.81
mA
0.95
0.95
max
0.7
V/µs
0.6
MHz
3V DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = 3V, V− = 0V, VCM = 1.5V, VO = V+/2 and RL = 1 MΩ.
Boldface limits apply at the temperature extremes.
Symbol
VOS
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Parameter
Conditions
Input Offset Voltage
Typ
LMC7101AI
(Note 5)
Limit
Limit
(Note 6)
(Note 6)
4
7
0.11
2
LMC7101BI
Units
mV
3V DC Electrical Characteristics
(Continued)
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = 3V, V− = 0V, VCM = 1.5V, VO = V+/2 and RL = 1 MΩ.
Boldface limits apply at the temperature extremes.
Symbol
TCVOS
Parameter
Conditions
Input Offset Voltage
Typ
LMC7101AI
(Note 5)
Limit
LMC7101BI
Limit
(Note 6)
(Note 6)
6
9
1
Units
max
µV/˚C
Average Drift
IB
Input Current
1.0
64
64
pA max
IOS
Input Offset Current
0.5
32
32
pA max
RIN
Input Resistance
>1
CMRR
Common-Mode
64
60
Rejection Ratio
VCM
0V ≤ VCM ≤ 3V
V+ = 3V
74
db
min
Input Common-Mode
Voltage Range
Tera Ω
0.0
0.0
0.0
For CMRR ≥ 50 dB
V
min
3.3
3.0
3.0
V
max
PSRR
Power Supply
Rejection Ratio
CIN
V+ = 1.5V to 7.5V
V− = −1.5V to −7.5V
VO = VCM = 0
dB
80
Common-Mode Input
68
60
3
min
pF
Capacitance
VO
Output Swing
RL = 2 kΩ
RL = 600Ω
IS
Supply Current
3
2.8
2.6
2.6
V min
0.2
0.4
0.4
V max
2.7
2.5
2.5
V min
0.37
0.6
0.6
V max
0.5
0.81
0.81
mA
0.95
0.95
max
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5V DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = 5V, V− = 0V, VCM = 1.5V, VO = V+/2 and RL = 1 MΩ.
Boldface limits apply at the temperature extremes.
Symbol
Parameter
Input Offset Voltage
VOS
TCVOS
Conditions
V+ = 5V
Typ
LMC7101AI
(Note 5)
Limit
Limit
(Note 6)
(Note 6)
0.11
Input Offset Voltage
LMC7101BI
Units
3
7
mV
5
9
max
1.0
µV/˚C
Average Drift
IB
Input Current
1
64
64
pA max
IOS
Input Offset Current
0.5
32
32
pA max
RIN
Input Resistance
>1
CMRR
Common-Mode
65
60
db
60
55
min
70
65
dB
65
62
min
70
65
dB
65
62
min
−0.20
−0.20
V
0.00
0.00
min
0V ≤ VCM ≤ 5V
Tera Ω
82
Rejection Ratio
+PSRR
Negative Power Supply
V+ = 5V to 15V
V− = 0V, VO = 1.5V
V− = −5V to −15V
Rejection Ratio
V+ = 0V, VO = −1.5V
Input Common-Mode
For CMRR ≥ 50 dB
Positive Power Supply
Rejection Ratio
−PSRR
VCM
82
82
−0.3
Voltage Range
5.3
CIN
Common-Mode
5.20
5.20
V
5.00
5.00
max
3
pF
Input Capacitance
VO
Output Swing
RL = 2 kΩ
4.9
0.1
RL = 600Ω
4.7
0.3
ISC
Output Short Circuit
Sourcing, VO = 0V
24
Current
Sinking, VO = 5V
IS
19
Supply Current
0.5
4.7
4.7
V
4.6
4.6
min
0.18
0.18
V
0.24
0.24
max
4.5
4.5
V
4.24
4.24
min
0.5
0.5
V
0.65
0.65
max
16
16
mA
11
11
min
11
11
mA
7.5
7.5
min
0.85
0.85
mA
1.0
1.0
max
5V AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = 5V, V− = 0V, VCM = 1.5V, VO = V+/2 and RL = 1 MΩ.
Boldface limits apply at the temperature extremes.
Symbol
T.H.D.
Parameter
Total Harmonic
Distortion
Conditions
F = 10 kHz, AV = −2
RL = 10 kΩ, VO = 4.0 VPP
Typ
LMC7101AI
(Note 5)
Limit
Limit
(Note 6)
(Note 6)
0.01
LMC7101BI
Units
%
SR
Slew Rate
1.0
V/µs
GBW
Gain__Bandwidth Product
1.0
MHz
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4
15V DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = 15V, V− = 0V, VCM = 1.5V, VO = V+/2 and RL = 1 MΩ.
Boldface limits apply at the temperature extremes.
Symbol
Parameter
Conditions
Typ
LMC7101AI
(Note 5)
Limit
LMC7101BI
Limit
(Note 6)
(Note 6)
Units
VOS
Input Offset Voltage
0.11
mV max
TCVOS
Input Offset Voltage
1.0
µV/˚C
Average Drift
IB
Input Current
1.0
64
64
pA max
IOS
Input Offset Current
0.5
32
32
pA max
RIN
Input Resistance
>1
CMRR
Common-Mode
70
65
dB
65
60
min
70
65
dB
65
62
min
70
65
dB
65
62
min
−0.20
−0.20
V
0.00
0.00
min
15.20
15.20
V
15.00
15.00
max
80
80
V/mV
40
40
15
15
0V ≤ VCM ≤ 15V
82
Rejection Ratio
+PSRR
Positive Power Supply
Rejection Ratio
−PSRR
Negative Power Supply
82
82
Input Common-Mode
V+ = 0V, VO = −1.5V
V+ = 5V
Voltage Range
For CMRR ≥ 50 dB
Rejection Ratio
VCM
V+ = 5V to 15V
V− = 0V, VO = 1.5V
V− = −5V to −15V
−0.3
15.3
AV
Large Signal
RL = 2 kΩ
Voltage Gain
(Note 7)
Sourcing
Sinking
RL = 600Ω
(Note 7)
CIN
Input Capacitance
VO
Output Swing
340
24
10
300
34
34
Sinking
15
6
6
14.4
14.4
V
14.2
14.2
min
3
V+ = 15V
RL = 2 kΩ
14.7
V+ = 15V
RL = 600Ω
14.1
0.5
Output Short Circuit
Sourcing, VO = 0V
Current
(Note 9)
50
Sinking, VO = 12V
50
(Note 9)
IS
10
Sourcing
0.16
ISC
Tera Ω
Supply Current
0.8
5
V/mV
pF
0.32
0.32
V
0.45
0.45
max
13.4
13.4
V
13.0
13.0
min
1.0
1.0
V
1.3
1.3
max
30
30
mA
20
20
min
30
30
mA
20
20
min
1.50
1.50
mA
1.71
1.71
max
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15V AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = 15V, V− = 0V, VCM = 1.5V, VO = V+/2 and RL = 1 MΩ.
Boldface limits apply at the temperature extremes.
Symbol
Parameter
Conditions
Typ
LMC7101AI
(Note 5)
Limit
Limit
(Note 6)
(Note 6)
Slew Rate
V+ = 15V
GBW
Gain-Bandwidth Product
(Note 8)
V+ = 15V
φm
Gm
en
Input-Referred
F = 1 kHz
Voltage Noise
VCM = 1V
Input-Referred
F = 1 kHz
1.5
F = 10 kHz, AV = −2
RL = 10 kΩ, VO = 8.5 VPP
0.01
SR
in
1.1
LMC7101BI
0.5
0.5
0.4
0.4
Units
V/µs
min
1.1
MHz
Phase Margin
45
Deg
Gain Margin
10
dB
37
Current Noise
T.H.D.
Total Harmonic Distortion
%
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
Note 2: Human body model, 1.5 kΩ in series with 100 pF.
Note 3: Applies to both single-supply and split-supply operation. Continuous short operation at elevated ambient temperature can result in exceeding the maximum
allowed junction temperature at 150˚C.
Note 4: The maximum power dissipation is a function of TJ(max), θJA and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(max)
− TA)/θJA. All numbers apply for packages soldered directly into a PC board.
Note 5: Typical Values represent the most likely parametric norm.
Note 6: All limits are guaranteed by testing or statistical analysis.
Note 7: V+ = 15V, VCM = 1.5V and RL connect to 7.5V. For Sourcing tests, 7.5V ≤ VO ≤ 12.5V. For Sinking tests, 2.5V ≤ VO ≤ 7.5V.
Note 8: V+ = 15V. Connected as a Voltage Follower with a 10V step input. Number specified is the slower of the positive and negative slew rates. RL = 100 kΩ connected to 7.5V. Amp excited with 1 kHz to produce VO = 10 VPP.
Note 9: Do not short circuit output to V+ when V+ is greater than 12V or reliability will be adversely affected.
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6
Typical Performance Characteristics
VS = +15V, Single Supply, TA = 25˚C unless specified
2.7V PERFORMANCE
Open Loop
Frequency Response (2.7V)
Input Voltage vs
Output Voltage (2.7V)
DS011991-16
Gain and Phase vs
Capacitance Load (2.7V)
Gain and Phase vs
Capacitance Load (2.7V)
DS011991-17
dVOS vs
Supply Voltage
dVOS vs Common
Mode Voltage (2.7V)
DS011991-20
DS011991-19
Sinking Current vs
Output Voltage (2.7V)
DS011991-18
DS011991-21
Sourcing Current vs
Output Voltage (2.7V)
DS011991-22
DS011991-23
7
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Typical Performance Characteristics
Single Supply, TA = 25˚C unless specified
3V PERFORMANCE
Open Loop
Frequency Response (3V)
Input Voltage vs
Output Voltage (3V)
DS011991-25
DS011991-24
Sourcing Current
vs Output Voltage (3V)
Input Voltage Noise
vs Input Voltage (3V)
Sinking Current vs
Output Voltage (3V)
DS011991-26
CMRR vs Input Voltage (3V)
DS011991-29
DS011991-27
DS011991-28
5V PERFORMANCE
Open Loop
Frequency Response (5V)
Input Voltage vs
Output Voltage (5V)
Input Voltage Noise
vs Input Voltage (5V)
DS011991-31
DS011991-30
DS011991-32
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8
5V PERFORMANCE
(Continued)
Sourcing Current
vs Output Voltage (5V)
Sinking Current vs
Output Voltage (5V)
CMRR vs Input Voltage (5V)
DS011991-35
DS011991-33
DS011991-34
Typical Performance Characteristics
Open Loop
Frequency Response (15V)
VS = +15V, Single Supply, TA = 25˚C unless specified
Input Voltage vs
Output Voltage (15V)
Input Voltage Noise
vs Input Voltage (15V)
DS011991-36
DS011991-37
Sourcing Current vs
Output Voltage (15V)
Sinking Current vs
Output Voltage (15V)
DS011991-38
CMRR vs Input Voltage (15V)
DS011991-41
DS011991-39
DS011991-40
9
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Typical Performance Characteristics
VS = +15V, Single Supply, TA = 25˚C unless
specified (Continued)
Supply Current vs
Supply Voltage
Input Current vs
Temperature
Output Voltage Swing
vs Supply Voltage
DS011991-42
Input Voltage Noise
vs Frequency
Positive PSRR
vs Frequency
Negative PSRR
vs Frequency
DS011991-45
CMRR vs Frequency
DS011991-44
DS011991-43
DS011991-46
Open Loop Frequency
Response @ −40˚C
DS011991-47
Open Loop Frequency
Response @ 25˚C
DS011991-48
DS011991-49
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10
DS011991-50
Typical Performance Characteristics
VS = +15V, Single Supply, TA = 25˚C unless
specified (Continued)
Open Loop Frequency
Response @ 85˚C
Maximum Output Swing
vs Frequency
DS011991-51
Gain and Phase
vs Capacitive Load
Gain and Phase
vs Capacitive Load
DS011991-52
Output Impedance
vs Frequency
DS011991-54
DS011991-53
Slew Rate vs
Temperature
DS011991-55
DS011991-56
Slew Rate vs
Supply Voltage
Inverting Small Signal
Pulse Response
Inverting Small Signal
Pulse Response
DS011991-58
DS011991-57
11
DS011991-59
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Typical Performance Characteristics
VS = +15V, Single Supply, TA = 25˚C unless
specified (Continued)
Inverting Small Signal
Pulse Response
Inverting Large Signal
Pulse Response
DS011991-60
Inverting Large Signal
Pulse Response
DS011991-61
Non-Inverting Small Signal
Pulse Response
DS011991-63
Non-Inverting Small Signal
Pulse Response
DS011991-64
Non-Inverting Large Signal
Pulse Response
DS011991-66
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Inverting Large Signal
Pulse Response
DS011991-67
12
DS011991-62
Non-Inverting Small Signal
Pulse Response
DS011991-65
Non-Inverting Large Signal
Pulse Response
DS011991-68
Typical Performance Characteristics
VS = +15V, Single Supply, TA = 25˚C unless
specified (Continued)
Non-Inverting Large Signal
Pulse Response
Stability vs
Capacitive Load
Stability vs
Capacitive Load
DS011991-69
DS011991-70
Stability vs
Capacitive Load
Stability vs
Capacitive Load
DS011991-71
Stability vs
Capacitive Load
DS011991-75
DS011991-76
DS011991-77
Stability vs
Capacitive Load
DS011991-78
13
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Application Information
1.0 Benefits of the LMC7101
Tiny Amp
Size. The small footprint of the SOT 23-5 packaged Tiny
amp, (0.120 x 0.118 inches, 3.05 x 3.00 mm) saves space on
printed circuit boards, and enable the design of smaller electronic products. Because they are easier to carry, many customers prefer smaller and lighter products.
Height. The height (0.056 inches, 1.43 mm) of the Tiny amp
makes it possible to use it in PCMCIA type III cards.
Signal Integrity. Signals can pick up noise between the signal source and the amplifier. By using a physically smaller
amplifier package, the Tiny amp can be placed closer to the
signal source, reducing noise pickup and increasing signal
integrity. The Tiny amp can also be placed next to the signal
destination, such as a buffer for the reference of an analog to
digital converter.
Simplified Board Layout. The Tiny amp can simplify board
layout in several ways. First, by placing an amp where amps
are needed, instead of routing signals to a dual or quad device, long pc traces may be avoided.
By using multiple Tiny amps instead of duals or quads, complex signal routing and possibly crosstalk can be reduced.
Low THD. The high open loop gain of the LMC7101 amp allows it to achieve very low audio distortion — typically 0.01%
at 10 kHz with a 10 kΩ load at 5V supplies. This makes the
Tiny an excellent for audio, modems, and low frequency signal processing.
Low Supply Current. The typical 0.5 mA supply current of
the LMC7101 extends battery life in portable applications,
and may allow the reduction of the size of batteries in some
applications.
Wide Voltage Range. The LMC7101 is characterized at
15V, 5V and 3V. Performance data is provided at these
popular voltages. This wide voltage range makes the
LMC7101 a good choice for devices where the voltage may
vary over the life of the batteries.
DS011991-8
FIGURE 1. An Input Voltage Signal Exceeds the
LMC7101 Power Supply Voltages with
No Output Phase Inversion
DS011991-9
FIGURE 2. A ± 7.5V Input Signal Greatly
Exceeds the 3V Supply in Figure 3 Causing
No Phase Inversion Due to RI
Applications that exceed this rating must externally limit the
maximum input current to ± 5 mA with an input resistor as
shown in Figure 3.
2.0 Input Common Mode
Voltage Range
The LMC7101 does not exhibit phase inversion when an input voltage exceeds the negative supply voltage. Figure 1
shows an input voltage exceeding both supplies with no resulting phase inversion of the output.
The absolute maximum input voltage is 300 mV beyond either rail at room temperature. Voltages greatly exceeding
this maximum rating, as in Figure 2, can cause excessive
current to flow in or out of the input pins, adversely affecting
reliability.
DS011991-10
FIGURE 3. RI Input Current Protection for
Voltages Exceeding the Supply Voltage
3.0 Rail-To-Rail Output
The approximate output resistance of the LMC7101 is 180Ω
sourcing and 130Ω sinking at VS = 3V and 110Ω sourcing
and 80Ω sinking at VS = 5V. Using the calculated output resistance, maximum output voltage swing can be estimated
as a function of load.
4.0 Capacitive Load Tolerance
The LMC7101 can typically directly drive a 100 pF load with
VS = 15V at unity gain without oscillating. The unity gain follower is the most sensitive configuration. Direct capacitive
loading reduces the phase margin of op-amps. The combiwww.national.com
14
4.0 Capacitive Load Tolerance
(Continued)
nation of the op-amp’s output impedance and the capacitive
load induces phase lag. This results in either an underdamped pulse response or oscillation.
Capacitive load compensation can be accomplished using
resistive isolation as shown in Figure 4. This simple technique is useful for isolating the capacitive input of multiplexers and A/D converters.
DS011991-11
FIGURE 4. Resistive Isolation
of a 330 pF Capacitive Load
5.0 Compensating for Input
Capacitance when Using Large
Value Feedback Resistors
When using very large value feedback resistors, (usually
> 500 kΩ) the large feed back resistance can react with the
input capacitance due to transducers, photodiodes, and circuit board parasitics to reduce phase margins.
The effect of input capacitance can be compensated for by
adding a feedback capacitor. The feedback capacitor (as in
Figure 5), Cf is first estimated by:
or
R1 CIN ≤ R2 Cf
which typically provides significant overcompensation.
Printed circuit board stray capacitance may be larger or
smaller than that of a breadboard, so the actual optimum
value for CF may be different. The values of CF should be
checked on the actual circuit. (Refer to the LMC660 quad
CMOS amplifier data sheet for a more detailed discussion.)
DS011991-12
FIGURE 5. Cancelling the Effect of Input Capacitance
15
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SOT-23-5 Tape and Reel Specification
TAPE FORMAT
Tape Section
# Cavities
Cavity Status
Cover Tape Status
Leader
0 (min)
Empty
Sealed
(Start End)
75 (min)
Empty
Sealed
Carrier
3000
Filled
Sealed
1000
Filled
Sealed
Trailer
125 (min)
Empty
Sealed
(Hub End)
0 (min)
Empty
Sealed
TAPE DIMENSIONS
DS011991-13
8 mm
Tape Size
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0.130
0.124
0.130
0.126
0.138 ± 0.002
0.055 ± 0.004
0.157
0.315 ± 0.012
(3.3)
(3.15)
(3.3)
(3.2)
(3.5 ± 0.05)
(1.4 ± 0.11)
(4)
(8 ± 0.3)
DIM A
DIM Ao
DIM B
DIM Bo
DIM F
DIM Ko
DIM P1
DIM W
16
SOT-23-5 Tape and Reel Specification
(Continued)
REEL DIMENSIONS
DS011991-14
8 mm
Tape Size
7.00
0.059 0.512 0.795 2.165
330.00
1.50
A
B
13.00 20.20 55.00
C
D
0.567
W1+ 0.078/−0.039
8.40 + 1.50/−0.00
14.40
W1 + 2.00/−1.00
W1
W2
W3
N
•
6.0 SPICE Macromodel
A SPICE macromodel is available for the LMC7101. This
model includes simulation of:
•
•
•
•
0.331 + 0.059/−0.000
Input common-mode voltage range
Frequency and transient response
GBW dependence on loading conditions
Quiescent and dynamic supply current
17
Output swing dependence on loading conditions and
many more characteristics as listed on the macro model
disk. Contact your local National Semiconductor sales office to obtain an operational amplifier spice model library
disk.
www.national.com
LMC7101 Tiny Low Power Operational Amplifier with Rail-To-Rail Input and Output
Physical Dimensions
inches (millimeters) unless otherwise noted
5-Pin SOT Package
Order Number LMC7101AIM5, LMC7101AIM5X, LMC7101BIM5 or LMC7101BIM5X
NS Package Number MA05A
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