ACPL-M484/P484/W484 Positive Logic High CMR Intelligent Power Module and Gate Drive Interface Optocoupler Data Sheet Description Features The ACPL-M484/P484/W484 fast speed optocoupler contains a AlGaAs LED and photo detector with built-in Schmitt trigger to provide logic-compatible waveforms, eliminating the need for additional wave shaping. The totem pole output eliminates the need for a pull up resistor and allows for direct drive Intelligent Power Module or gate drive. Minimized propagation delay difference between devices makes these optocouplers excellent solutions for improving inverter efficiency through reduced switching dead time. Positive output type (totem pole output) Truth Table Guaranteed: Vcc from 4.5 V to 30 V Performance Specified for Common IPM Applications Over Industrial Temperature Range. Short Maximum Propagation Delays Minimized Pulse Width Distortion (PWD) Very High Common Mode Rejection (CMR) Hysteresis Applications Available in SO-5 (ACPL-M484) and Stretched SO-6 package (ACPCL-P484/W484). IPM Interface Isolation Package Clearance/Creepage at 8 mm (ACPL-W484) Isolated IGBT/MOSFET Gate Drive Safety Approval: (pending) AC and Brushless DC Motor Drives Industrial Inverters – UL Recognized with 5000 Vrms (ACPL-W484) for 1 minute per UL1577. General Digital Isolation – CSA Approved. – IEC/EN/DIN EN 60747-5-5 Approved with VIORM = 567 Vpeak for ACPL-M484 and VIORM = 891 Vpeak for ACPL-P484 and VIORM = 1140 Vpeak for ACPL-W484, under option 060. Functional Diagram ACPL-M484 Anode 1 5 VCC 4 VO Cathode 2 3 Ground SHIELD Note: A 0.1 F bypass capacitor must be connected between pins Vcc and Ground. Specifications Wide operating temperature range: -40° C to 105° C Maximum propagation delay tPHL / tPLH = 150/120 ns ACPL-P484 & ACPL-W484 6 VCC Anode 1 N.C. 2 Cathode 3 5 VO SHIELD 4 Ground Truth Table (Positive Logic) Maximum Pulse Width Distortion (PWD) = 90 ns LED VO ON OFF HIGH LOW Wide Operating VCC Range: 4.5 to 30 Volts Truth Table Guaranteed: Vcc from 4.5 V to 30 V Propagation Delay Difference Min/Max = -130/130 ns 30 kV/s minimum common mode rejection (CMR) at VCM = 1000 V CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD. Ordering Information ACPL-M484/P484/W484 is UL recognized with 3750/3750/5000 Vrms/1 minute rating per UL 1577. Option Part number ACPL-M484 RoHS Compliant Package -000E SO-5 X -060E X -000E -500E X Stretched SO-6 Tape & Reel IEC/EN/DIN EN 60747-5-5 X -500E -560E ACPL-P484 ACPL-W484 Surface Mount 100 per tube X X 1500 per reel X 100 per tube X 1500 per reel X X -060E X -560E X Quantity 100 per tube X X 1000 per reel X 100 per tube X 1000 per reel To order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry. Example 1: ACPL-P484-560E to order product of Stretched SO-6 Surface Mount package in Tape and Reel packaging with IEC/EN/ DIN EN 60747-5-5 Safety Approval in RoHS compliant. Example 2: ACPL-P484-000E to order product of Stretched SO-6 Surface Mount package in Tube packaging and RoHS compliant. Example 3: ACPL-M484-000E to order product of SO-5 Surface Mount package in Tube packaging and RoHS compliant. Option datasheets are available. Contact your Avago sales representative or authorized distributor for information. 2 Package Outline Drawings ACPL-M484 SO-5 Package, 5 mm Creepage & Clearance ANODE 1 MXXX XXX 4.4 ± 0.1 (0.173 ± 0.004) 7.0 ± 0.2 (0.276 ± 0.008) CATHODE 3 6 VCC 5 VOUT 4 GND TYPE NUMBER (LAST 3 DIGITS) DATE CODE 0.4 ± 0.05 (0.016 ± 0.002) 3.6 ± 0.1* (0.142 ± 0.004) 0.102 ± 0.102 (0.004 ± 0.004) 2.5 ± 0.1 (0.098 ± 0.004) 0.15 ± 0.025 (0.006 ± 0.001) 7° MAX. 0.71 MIN (0.028) 1.27 BSC (0.050) MAX. LEAD COPLANARITY = 0.102 (0.004) Dimensions in millimeters (inches). * Maximum Mold flash on each side is 0.15 mm (0.006). Note: Foating Lead Protrusion is 0.15 mm (6 mils) max. Land Pattern Recommendation 4.4 (0.17) 1.3 (0.05) 2.5 (0.10) 2.0 (0.080) 0.64 (0.025) 8.27 (0.325) Dimension in millimeters (inches) 3 ACPL-P484 Stretched SO-6 Package, 7 mm clearance 4.580 + 0.254 0 1.27 (0.050) BSG 0.381 ±0.127 (0.015 ±0.005) Land Pattern Recommendation 10.7 (0.421) (0.180 + 0.010 0.000 ) 1.27 (0.050) 0.76 (0.030) 2.16 (0.085) 7.62 (0.300) 1.590 ±0.127 (0.063 ±0.005) 6.81 (0.268) 0.45 (0.018) 45° 3.180 ±0.127 (0.125 ±0.005) 7° 7° 7° 0.20 ±0.10 (0.008 ±0.004) 0.254 ±0.050 (0.010 ±0.002) 7° 5° NOM. 1 ±0.250 (0.040 ±0.010) Floating Lead Protusions max. 0.25 (0.01) Dimensions in Millimeters (Inches) 9.7 ±0.250 (0.382 ±0.010) Lead Coplanarity = 0.1 mm (0.004 Inches) ACPL-W484 Stretched SO-6 Package, 8 mm clearance Land Pattern Recommendation (W-type) 4.580 + 0.254 0 1.27 (0.050) BSG 0.381 ±0.127 (0.015 ±0.005) (0.180 + 0.010 0.000 ) 12.650 (0.498) 1 6 2 5 3 4 7.62 (0.300) 6.807 + 0.127 0 0.760 (0.030) 1.905 (0.075) 1.270 (0.050) (0.268 + 0.005 0.000 ) 1.590 ±0.127 (0.063 ±0.005) 7° 45° 0.45 (0.018) 3.180 ±0.127 (0.125 ±0.005) 7° 0.20 ±0.10 (0.008 ±0.004) 0.750 ±0.250 (0.0295 ±0.010) 7° 35° NOM. 11.500 ±0.25 (0.453 ±0.010) 4 7° 0.254 ±0.050 (0.010 ±0.002) Floating Lead Protusions max. 0.25 (0.01) Dimensions in Millimeters (Inches) Lead Coplanarity = 0.1 mm (0.004 Inches) Recommended Pb-Free IR Profile Recommended reflow condition as per JEDEC Standard, J-STD-020 (latest revision). Non-Halide Flux should be used. Regulatory Information The ACPL-M484/P484/W484 is pending approval by the following organizations: IEC/EN/DIN EN 60747-5-5 (Option 060 only) Approved with Maximum Working Insulation Voltage VIORM = 567 Vpeak for ACPL-M484, VIORM = 891 Vpeak for ACPL-P484 and VIORM = 1140 Vpeak for ACPL-W484 UL Approval under UL 1577, component recognition program up to VISO = 3750 VRMS File E55361 for ACPL-M484 & ACPLP484; Approval under UL 1577, component recognition program up to VISO = 5000 VRMS File E55361 for ACPL-W484; CSA Approval under CSA Component Acceptance Notice #5, File CA 88324. Table 1. IEC/EN/DIN EN 60747-5-5 Insulation Characteristics* (ACPL-M484/P484/W484 Option 060) Description ACPL-M484 ACPL-P484 ACPL-W484 Installation classification per DIN VDE 0110/1.89, Table 1 for rated mains voltage ≤ 150 Vrms for rated mains voltage ≤ 300 Vrms for rated mains voltage ≤ 600 Vrms Symbol I – IV I – III I – II I – IV I – III I – II I – IV I – III I – II Climatic Classification 55/105/21 55/105/21 55/105/21 Pollution Degree (DIN VDE 0110/1.89) 2 2 2 Unit Maximum Working Insulation Voltage VIORM 567 891 1140 Vpeak Input to Output Test Voltage, Method b* VIORM x 1.875 = VPR, 100% Production Test with tm = 1 sec, Partial discharge < 5 pC VPR 1063 1670 2137 Vpeak Input to Output Test Voltage, Method a* VIORM x 1.6 = VPR, Type and Sample Test, tm = 10 sec, Partial discharge < 5 pC VPR 907 1426 1824 Vpeak Highest Allowable Overvoltage (Transient Overvoltage tini = 60 sec) VIOTM 6000 6000 8000 Vpeak Safety-limiting values – maximum values allowed in the event of a failure. Case Temperature Input Current Output Power TS IS, INPUT PS, OUTPUT 175 230 600 175 230 600 175 230 600 °C mA mW Insulation Resistance at TS, VIO = 500 V RS >109 >109 >109 * 5 Refer to the optocoupler section of the Isolation and Control Components Designer’s Catalog, under Product Safety Regulations section, (IEC/EN/ DIN EN 60747-5-2) for a detailed description of Method a and Method b partial discharge test profiles. Table 2. Insulation and Safety Related Specifications Parameter Symbol ACPL-M484 ACPL-P484 ACPL-W484 Units Conditions Minimum External Air Gap (External Clearance) L(101) 5.0 7.0 8.0 mm Measured from input terminals to output terminals, shortest distance through air. Minimum External Tracking (External Creepage) L(102) 5.0 8.0 8.0 mm Measured from input terminals to output terminals, shortest distance path along body. 0.08 0.08 0.08 mm Through insulation distance conductor to conductor, usually the straight line distance thickness between the emitter and detector. >175 >175 >175 V DIN IEC 112/VDE 0303 Part 1 IIIa IIIa IIIa Minimum Internal Plastic Gap (Internal Clearance) Tracking Resistance (Comparative Tracking Index) CTI Isolation Group Material Group (DIN VDE 0110, 1/89, Table 1) Table 3. Absolute Maximum Ratings Parameter Symbol Min. Max. Units Storage Temperature TS -55 125 °C Operating Temperature TA -40 105 °C Average Input Current IF(avg) 10 mA Peak Transient Input Current (<1 s pulse width, 300 pps) (<200 s pulse width, < 1% duty cycle) IF(tran) 1.0 40 A mA Reverse Input Voltage VR 5 V 50 mA Average Output Current IO Supply Voltage VCC 0 35 Output Voltage VO -0.5 35 Note Total Package Power Dissipation (ACPL-M484) PT 145 mW 1 Total Package Power Dissipation PT 210 mW 1 Solder Reflow Temperature Profile See Reflow Thermal Profile. Table 4. Recommended Operating Conditions Parameter Symbol Min. Max. Units Note Power Supply Voltage (1) VCC 4.5 30 V 2 Forward Input Current (ON) IF(ON) 4 7 mA Forward Input Voltage (OFF) VF(OFF) – 0.8 V Operating Temperature TA -40 105 °C Note: 1. Truth Table guaranteed: 4.5 V to 30 V 6 Table 5. Electrical Specifications Over recommended operating conditions TA = -40° C to 105° C, VCC = +4.5 V to 30 V, IF(ON)= 4 mA to 7 mA, VF(OFF) = 0 V to 0.8 V, unless otherwise specified. All typical values at TA = 25° C. Parameter Symbol Logic Low Output Voltage VOL Min. Typ. Max. Units Test Conditions Fig. 0.3 V IOL = 3.5 mA 1, 3 0.5 Logic High Output Voltage Logic Low Supply Current Logic High Supply Current VOH VCC -0.3 VCC -0.04 Vcc -0.5 VCC -0.07 ICCL ICCH Threshold Input Current Low to High IFLH Threshold Input Voltage High to Low VFHL Logic Low Short Circuit Output Current IOSL Logic High Short Circuit Output Current IOSH Input Forward Voltage VF IOL = 6.5 mA V IOH = -3.5 mA 1.5 3.0 mA VCC = 5.5 V, VF = 0 V, Io = 0 mA 1.7 3.0 mA VCC = 20 V, VF = 0 V, Io = 0 mA 1.5 3.0 mA VCC = 5.5 V, IF = 7 mA, Io = 0 mA 1.7 3.0 mA VCC = 30 V, IF = 7 mA, Io = 0 mA 0.8 2.2 mA V IF = 4 mA 125 200 mA VO = VCC = 5.5 V, VF = 0 V 125 200 mA VO = VCC = 30 V, VF = 0 V -200 -125 mA VCC = 5.5 V, IF = 7 mA, VO = GND -200 -125 mA VCC = 20 V, IF = 7 mA, VO = GND 1.5 1.7 V TA = 25° C, IF = 4 mA 1.85 V IF = 4 mA V IR = 10 A Input Reverse Breakdown Voltage BVR Input Diode Temperature Coefficient VF/TA 1.7 mV/°C IF = 4 mA Input Capacitance CIN 60 pF f = 1 MHz, VF = 0 V 7 5 2, 3, 7 IOH = -6.5 mA 0.8 1.3 Note 3 3 4 4 Table 6. Switching Specifications Over recommended operating conditions TA = -40° C to 105° C, VCC = +4.5 V to 30 V, IF(ON) = 4 mA to 7 mA, VF(OFF) = 0 V to 0.8 V, unless otherwise specified. All typicals at TA = 25° C. Parameter Symbol Min. Typ. Max. Units Test Conditions Fig. Propagation Delay Time to Logic Low Output Level tPHL 95 150 ns CL = 100 pF, IF(ON) = 4 mA VF = 0 V 5, 6, 8 6 Propagation Delay Time to Logic High Output Level tPLH Pulse Width Distortion |tPHL - tPLH| = PWD Propagation Delay Difference Between Any 2 Parts PDD Output Rise Time (10-90%) tr 6 ns 5 Output Fall Time (90-10%) tf 6 ns 5 Logic High Common Mode Transient Immunity |CMH| 30 kV/s |VCM| = 1000 V, IF = 4.0 mA, VCC = 5 V, TA = 25° C 9 7 Logic Low Common Mode Transient Immunity |CML| 30 kV/s |VCM| = 1000 V, VF = 0 V, VCC = 5 V, TA = 25° C 9 7 150 85 120 Loaded as per Fig. 5 ns 120 90 130 -130 130 CL = 100 pF, VF = 0 V IF(ON) = 4 mA 5, 6, 8 6 Loaded as per Fig. 5 ns 90 -130 Note CL = 100 pF 9 Loaded as per Fig. 5 ns CL = 100 pF 10 Loaded as per Fig. 5 Table 7. Package Characteristics Parameter Symbol Min. Input-Output Momentary Withstand Voltage* VISO 3750 (ACPL-M484/P484) 5000 (ACPL-W484) Input-Output Resistance RI-O Input-Output Capacitance CI-O * Typ. Max. Units Test Conditions Fig. Note Vrms RH < 50%, t = 1 min. TA = 25° C 5, 8 1012 Ohm VI-O = 500 Vdc 5 0.6 pF f = 1 MHz, VI-O = 0 Vdc 5 The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. For the continuous voltage rating, refer to the IEC/EN/DIN EN 60747-5-5 Insulation Characteristics Table (if applicable). UVLO Figure 10a & b show typical output waveforms during Power-up and Power-down processes. Notes: 1. Derate total package power dissipation, PT, linearly above 70° C free-air temperature at a rate of 4.5mW/°C(ACPL-P484/W484) and linearly above 85° C free-air temperature at a rate of 0.75mW/°C(ACPL-M484). 2. Detector requires a Vcc of 4.5 V or higher for stable operation as output might be unstable if Vcc is lower than 4.5 V. Be sure to check the power ON/OFF operation other than the supply current. 3. Duration of output short circuit time should not exceed 500 s. 4. Input capacitance is measured between pin 1 and pin 3. 5. Device considered a two-terminal device: pins 1, 2 and 3 shorted together and pins 4, 5 and 6 shorted together. 6. The tPLH propagation delay is measured from the 50% point on the leading edge of the input pulse to the 1.3 V point on the leading edge of the output pulse. The tPHL propagation delay is measured from the 50% point on the trailing edge of the input pulse to the 1.3 V point on the trailing edge of the output pulse. 7. CMH is the maximum slew rate of the common mode voltage that can be sustained with the output voltage in the logic high state, VO > 2.0 V. CML is the maximum slew rate of the common mode voltage that can be sustained with the output voltage in the logic low state, VO < 0.8 V. Note: Equal value split resistors (Rin/2) must be used at both ends of the LED. 8. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 4500 VRMS for one second (leakage detection current limit, II-O < = 5 A). This test is performed before the 100% production test for partial discharge (Method b) shown in the IEC/EN/DIN EN 60747-5-5 Insulation Characteristics Table, if applicable. 9. Pulse Width Distortion (PWD) is defined as |tPHL - tPLH | for any given device. 10. The difference of tPLH and tPHL between any two devices under the same test condition. 11. Use of a 0.1 F bypass capacitor connected between pins Vcc and Ground is recommended. 8 (VCC-VOH) - High Level Output Voltage - V VOL - LOW LEVEL OUTPUT VOLTAGE - V 0.045 VCC = 4.5 V VF = 0 V 0.04 0.035 IO = 6.5 mA 0.03 0.025 IO = 3.5 mA 0.02 0.015 0.01 -40 -10 20 50 TA - TEMPERATURE - °C 80 110 Figure 1. Typical Logic Low Output Voltage vs. Temperature 0.1 IF = 4 mA IO = -6.5 mA 0.08 0.06 IO = -3.5 mA 0.04 0.02 -40 -10 4 IF - FORWARD CURRENT - mA Vo - OUTPUT VOLTAGE - V 110 100.00000 TA = 25° C 10.00000 VCC = 4.5 V TA = 25° C 3 2 1 0 0.5 1 1.5 2 IF - INPUT CURRENT - mA 2.5 1.00000 0.10000 0.01000 0.00100 0.00010 0.00001 1.1 3 Figure 3. Typical Output Voltage vs. Forward Input Current 1.3 1.4 VF - FORWARD VOLTAGE - V 5V 1 6 2 5 3 OUTPUT Vo MONITORING * NODE SHIELD C1 = 15 pF Figure 5. Circuit for tPLH, tPHL, tr, tf R1 1000 : 560 : IF(ON) 4 mA 7 mA IF(ON) D1 5 k: INPUT IF tPLH 50% IF(ON) 0 mA tPHL D3 VOH D4 OUTPUT V *0.1 PF BYPASS – SEE NOTE 11 1.6 ALL DIODES ARE EITHER 1N916 OR 1N3064 619 : 4 R1 1.5 THE PROBE AND JIG CAPACITANCES ARE INCLUDED IN C1. VCC D2 INPUT MONITORING NODE 1.2 Figure 4. Typical Input Diode Forward Characteristic PULSE GEN. tr = tf = 5 ns f = 100 kHz 1% DUTY CYCLE Vo = 5 V Zo = 50 9 80 Figure 2. Typical Logic High Output Current vs. Temperature 5 0 20 50 TA - TEMPERATURE - °C 1.3 V VOL (0 V) 35 VCC = 4.5 V TPHL (IF = 4 mA) 100 TPHL (IF = 7 mA) TPLH (IF = 4 mA) 80 TPLH (IF = 7 mA) 60 -40 IF = 4 mA TA = 25° C 30 VO - Output Voltage - V Tp - Propagation Delay - ns 120 -10 20 50 TA - Temperature - °C 25 20 15 10 5 80 0 110 Figure 6. Typical Propagation Delays vs. Temperature 0 5 10 15 20 25 VCC - Supply Voltage - V Figure 7. Typical Logic High Output Voltage vs. Supply Voltage 120 Tp - Propagation Delay - ns TA = 25° C TPHL (IF = 4 mA) 100 TPHL (IF = 7 mA) TPLH (IF = 4 mA) 80 60 TPLH (IF = 7 mA) 0 5 10 15 20 25 VCC - Supply Voltage - V 30 35 Figure 8. Typical Propagation Delay vs. Supply Voltage VCC RIN/2 CMH A 1 VFF 6 B + – 0.1 PF 2 3 RIN/2 CML VCM (PEAK) |VCM| 0V 5 4 SHIELD + OUTPUT Vo MONITORING NODE VCM – VOH SWITCH AT A: IF = 4 mA Vo (MIN.)* OUTPUT Vo SWITCH AT B: VF = 0 V VOL * SEE NOTE 7 Figure 9. Test Circuit for Common Mode Transient Immunity and Typical Waveforms 10 Vo (MAX.)* 30 35 10 V Vcc = 2~4 V Vcc Vcc = 1.8 V (typ) Vcc = 2~4 V Vcc = 1.8 V (typ) 0V Output High Impedance state High Impedance state 1 ms i. LED is ON Discharge delay, depending on the power supply slew rate Figure 10a. Vcc Ramp when LED is ON 10V Vcc = 2~4 V Vcc Vcc = 1.8 V (typ) Vcc = 2~4 V Vcc = 1.8 V (typ) 0V High Impedance state High Impedance state Output 1 ms Figure 10b. Vcc Ramp when LED is OFF 11 ii. LED is OFF Discharge delay, depending on the power supply slew rate Thermal Model for ACPL-M484 SO5 Package Optocoupler Thermal Model for ACPL-P484/W484 SO6 Package Optocoupler Definitions Definitions R11: Junction to Ambient Thermal Resistance of LED due to heating of LED R11: Junction to Ambient Thermal Resistance of LED due to heating of LED R12: Junction to Ambient Thermal Resistance of LED due to heating of Detector (Output IC) R12: Junction to Ambient Thermal Resistance of LED due to heating of Detector (Output IC) R21: Junction to Ambient Thermal Resistance of Detector (Output IC) due to heating of LED. R21: Junction to Ambient Thermal Resistance of Detector (Output IC) due to heating of LED. R22: Junction to Ambient Thermal Resistance of Detector (Output IC) due to heating of Detector (Output IC). R22: Junction to Ambient Thermal Resistance of Detector (Output IC) due to heating of Detector (Output IC). P1: Power dissipation of LED (W). P1: Power dissipation of LED (W). P2: Power dissipation of Detector / Output IC (W). P2: Power dissipation of Detector / Output IC (W). T1: Junction temperature of LED (˚C). T1: Junction temperature of LED (˚C). T2: Junction temperature of Detector (˚C). T2: Junction temperature of Detector (˚C). Ta: Ambient temperature. Ta: Ambient temperature. ΔT1: Temperature difference between LED junction and ambient (˚C). ΔT1: Temperature difference between LED junction and ambient (˚C). ΔT2: Temperature deference between Detector junction and ambient. ΔT2: Temperature deference between Detector junction and ambient. Ambient Temperature: Junction to Ambient Thermal Resistances were measured approximately 1.25cm above optocoupler at ~23˚C in still air Ambient Temperature: Junction to Ambient Thermal Resistances were measured approximately 1.25cm above optocoupler at ~23˚C in still air Description Description This thermal model assumes that an 5-pin single-channel plastic package optocoupler is soldered into a 7.62 cm x 7.62 cm printed circuit board (PCB). The temperature at the LED and Detector junctions of the optocoupler can be calculated using the equations below. This thermal model assumes that an 6-pin single-channel plastic package optocoupler is soldered into a 7.62 cm x 7.62 cm printed circuit board (PCB). The temperature at the LED and Detector junctions of the optocoupler can be calculated using the equations below. T1 = (R11 * P1 + R12 * P2) + Ta -- (1) T1 = (R11 * P1 + R12 * P2) + Ta -- (1) T2 = (R21 * P1 + R22 * P2) + Ta -- (2) T2 = (R21 * P1 + R22 * P2) + Ta -- (2) Jedec Specifications R11 R12, R21 R22 Jedec Specifications R11 R12, R21 R22 low K board 191 77, 91 99 low K board 167 64, 81 89 high K board 126 26, 35 51 high K board 117 31, 39 54 Notes: 1. Maximum junction temperature for above parts: 125 °C. For product information and a complete list of distributors, please go to our web site: Notes: 1. Maximum junction temperature for above parts: 125 °C. www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright © 2005-2012 Avago Technologies. All rights reserved. AV02-2947EN - February 17, 2012