AVAGO AMMP-6442

AMMP-6442
37- 40 GHz, 1W Linear Power Amplifier
in SMT Package
Data Sheet
Description
Features
The AMMP-6442 MMIC is a 1W linear power amplifier in
a surface mount package designed for use in transmitters that operate at frequencies between 37GHz and
40GHz. In the operational band, it provides 30dBm of
output power (P-1dB) and 23dB of small-signal gain. This
PA is also designed for high linear applications with typical
performance of 36dBm OIP3 at 18dBm SCL output.
• 5x5mm SMT package
• 1 watt output power
• 50 Ω match on input and output
• ESD protection (50V MM, and 250V HBM)
Typical Performance (Vdd = 5V, Id(q) = 0.7A)
• Frequency range 37 to 40 GHz
Applications
• Small signal Gain of 23dB (Typ.)
• Point-to-Point Radio Systems
• Output power @P-1 of 30dBm (Typ.)
• mmW Communications
• Input and Output return losses -8dB
Package Diagram
• OIP3 of 35dBm @Po=18dBm (scl)
Vd1
Vd2
Vd3
1
2
3
Functional Block Diagram
1
RF IN
8
GND
4
2
3
RF OUT
8
7
6
5
Vg1
Vg2
Vd3
Note:
1. This MMIC uses depletion mode pHEMT devices. Negative supply is used for DC gate biasing.
4
7
6
Pin
Function
1
2
3
4
5
6
7
8
Vd1
Vd2
Vd3
RF OUT
Vd3
Vg2
Vg1
RF IN
5
Attention: Observe Precautions for
handling electrostatic sensitive devices.
ESD Machine Model (Class A): 50V
ESD Human Body Model (Class 1A): 250V
Refer to Avago Application Note A004R:
Electrostatic Discharge Damage and Control.
Note: MSL Rating = Level 2A
Electrical Specifications
1. Small/Large -signal data measured in a fully de-embedded test fixture form TA = 25°C.
2. Pre-assembly into package performance verified 100% on-wafer per AMMC-6442 published specifications.
3. This final package part performance is verified by a functional test correlated to actual performance at one or more
frequencies.
4. Specifications are derived from measurements in a 50 Ω test environment. Aspects of the amplifier performance may
be improved over a more narrow bandwidth by application of additional conjugate, linearity, or low noise (Гopt)
matching.
5. The Gain and P1dB tested at 37GHz and 40GHz guaranteed with measurement accuracy +/-1.5dB for gain and +/1.6dB for P1dB.
Table 1. RF Electrical Characteristics
TA=25°C, Vdd=5.0V, Idq=0.7V, Vg=-1V, Zo=50 Ω
Parameter
Min
Typ.
Max
Unit
Operational Frequency, Freq
37
40
GHz
Small-signal Gain, Gain
20
23
dB
Output Power at 1dB Gain Compression, P-1dB
28
30
dBm
Relative Third Order Inter-modulation level (∆f=10MHz, Po=+12dBm, SCL), IM3
36
dBc
Input Return Loss, RLin
8
dB
Output Return Loss, RLout
8
dB
Reverse Isolation, Isolation
45
dB
Table 2. Recommended Operating Range
1. Ambient operational temperature TA = 25°C unless otherwise noted.
2. Channel-to-backside Thermal Resistance (Tchannel (Tc) = 34°C) as measured using infrared microscopy. Thermal
Resistance at backside temperature (Tb) = 25°C calculated from measured data.
Description
Min.
Drain Supply Current, Idq
Gate Supply Operating Voltage, Vg
2
Typical
Max.
700
-1.3
-1
-0.7
Unit
Comments
mA
Vdd = 5V, Vg set for Idq Typical
V
Idq=700mA
Table 3. Thermal Properties
Parameter
Test Conditions
Value
Channel Temperature, Tch
Thermal Resistance [1]
(Channel-to-Base Plate), qch-bs
Tch=150 °C
Ambient operational temperature TA = 25°C
Channel-to-backside Thermal Resistance Tchannel(Tc)=34°C
Thermal Resistance at backside temperature Tb=25°C
qJC = 17 °C/W
Note:
1. Assume AnPb soldering to an evaluation RF module at 90.5 °C base plate temperatures.
Absolute Minimum and Maximum Ratings
Table 4. Minimum and Maximum Ratings [1]
Description Pin
Min.
Drain Supply Voltage, Vd [2]
Gate Supply Voltage, Vg
-2
Max.
Unit
5.5
V
0
Power Dissipation, Pd [2,3]
6
CW Input Power, Pin [2]
20
dBm
Channel Temperature [4,5]
+150
°C
+155
°C
+260
°C
Storage Temperature
Maximum Assembly Temperature
-65
Comments
CW
30 second maximum
Notes:
1. Operation in excess of any one of these conditions may result in permanent damage to this device.
2. Combinations of supply voltage, drain current, input power, and output power shall not exceed PD.
3. These ratings apply to each individual FET
4. The operating channel temperature will directly affect the device MTTF. For maximum life, it is recommended that junction temperatures be
maintained at the lowest possible levels.
3
Typical Performance (Data was obtained from a 2.4mm connector based test fixture and includes connector and
board losses. Connector and board loss is approximately 0.75dB at input and output ports for an approximate total
of 1.5dB.)
(TA = 25°C, Vdd = 5V, Id(q) = 0.7 A, Vg = -1 V, Zin = Zout = 50 Ω)
30
S21[dB]
S12[dB]
0
-35
-5
-40
15
-45
10
-50
5
-55
-20
-60
-25
0
30
32
34
36
38 40 42 44
Frequency [GHz]
46
48
50
Figure 1. Typical gain and reverse Isolation
Noise Figure [dB]
Gain[dB], P-1[dBm], PAE[%]
20
15
P-1
[email protected]
P-3
[email protected]
10
5
30
32
34
36
38 40 42
Frequency [GHz]
44
46
48
50
35
36
0
37
38
Frequency [GHz]
39
40
-50
-60
37
38
Frequency [GHz]
39
41
Frequency [GHz]
43
45
39
40
Figure 5. Typical third order inter-modulation product level vs. frequency at
different single carrier output level (SCL)
1400
30
25
1300
1200
1100
20
1000
15
900
10
800
5
700
0
600
-5
-15
-10
-5
0
Pin [dBm]
5
10
15
500
Figure 6. Typical output power, PAE, and total drain current versus Input
power at 38GHz
Ids [mA]
-40
36
37
Pout(dBm)
PAE[%]
Id(total)
35
-30
35
35
Figure 4. Typical noise figure
Po[dBm], and, PAE[%]
-20
4
0
40
SCL=10[dBm]
SCL=15[dBm]
SCL=18.5[dBm]
-10
6
2
Figure 3. Typical output power (P-1 and P-3) vs. frequency
Relative IM3 Level [dBc]
S11[dB]
S22[dB]
8
25
-70
-15
10
30
0
-10
Figure 2. Typical return Loss (input and output)
35
4
Return Loss [dB]
20
S12 [dB]
S21[dB]
25
-30
Typical over temperature dependencies
(TA = 25°C, Vdd = 5V, Idq = 0.7 A, Vg = -1 V, Zin = Zout = 50 Ω)
0
S21[dB]
-10
S11_25
S11_-40
S11_85
-15
-20
20
25
30
35
40
Frequency[GHz]
45
50
Figure 7. Typical S11 over temperature
P-1 [dBm]
S22[dB]
-5
-10
-20
S22_25
S22_-40
S22_85
20
25
30
35
40
Frequency[GHz]
45
50
Figure 9. Typical S22 over temperature
20
OIP3 [dBm]
K_factor
25
30
10
5
33
32
31
30
29
28
27
26
25
24
23
34
35
36
30
35
40
Frequency (GHz)
Figure 11. Typical K-factor over temperature
5
50
37
38
39
Frequency [GHz]
40
41
42
45
-10
40
-15
35
-20
30
-25
25
-30
20
-35
15
-40
10
25
45
P-1_-40deg
P-1_25deg
P-1_85deg
OIP3(-40C)
OIP3(85C)
IM3(25C)
5
0
20
35
40
Frequency[GHz]
Figure 10. Typical P1 over temperature
K() Meas_25C
K() Meas_85C
K() Meas_n40C
15
20
Figure 8. Typical Gain over temperature
0
-15
S21_25
S21_-40
S21_85
45
50
0
34
35
36
-45
OIP3(25C)
IM3(-40C)
IM3(85C)
37
38
39
Frequency [GHz]
-50
40
41
Figure 12. Typical IM3 level over temperature at Po=18dBm, SCL
42
-55
IM3 Level [dBc]
S11[dB]
-5
30
28
26
24
22
20
18
16
14
12
10
Typical Scattering Parameters [1], (TA = 25°C, Vdd =5 V, Idq = 0.7A, Zin = Zout = 50 Ω)
Freq
S11
[dB]
S11
Mag.
S11
Ang.
S21
[dB]
S21
Mag.
S21
Ang.
S12
[dB]
S12
Mag.
S12
Ang.
S22
[dB]
S22
Mag.
S22
Ang.
20
-2.90
0.72
164.53
-23.81
0.06
-141.01
-48.88
3.60E-03
-57.97
-2.69
0.73
21.40
21
-3.00
0.71
86.65
-15.74
0.16
115.71
-52.28
2.43E-03
-104.05 -2.41
0.76
-70.16
22
-3.08
0.70
4.08
-7.22
0.44
0.83
-45.40
5.37E-03
152.36
-2.25
0.77
-161.69
23
-3.18
0.69
-87.20
0.27
1.03
-131.23
-46.50
4.73E-03
103.80
-2.68
0.73
112.41
24
-3.62
0.66
176.98
4.45
1.67
92.82
-48.17
3.90E-03
-13.03
-3.39
0.68
32.65
25
-4.52
0.59
84.30
7.24
2.30
-36.02
-48.90
3.59E-03
-66.94
-3.55
0.66
-45.60
26
-5.00
0.56
-8.28
9.35
2.93
-154.65
-50.90
2.85E-03
-147.71 -2.98
0.71
-125.74
27
-4.11
0.62
-104.27
11.05
3.57
81.71
-48.42
3.79E-03
176.54
-2.72
0.73
155.15
28
-3.00
0.71
168.96
13.11
4.52
-26.13
-48.48
3.77E-03
100.75
-3.20
0.69
77.20
29
-2.20
0.78
90.69
16.36
6.57
-143.75
-44.95
5.66E-03
16.82
-4.92
0.57
-11.91
30
-3.25
0.69
7.32
21.27
11.57
95.82
-42.75
7.28E-03
-67.62
-7.33
0.43
-126.78
31
-5.62
0.52
-81.47
24.48
16.76
-48.77
-45.14
5.53E-03
-173.22 -7.23
0.44
132.40
32
-8.31
0.38
151.65
23.09
14.27
172.96
-48.44
3.78E-03
113.12
-5.77
0.51
54.23
33
-7.80
0.41
55.51
22.16
12.83
59.22
-48.10
3.94E-03
83.43
-6.33
0.48
-12.99
34
-6.69
0.46
-3.34
23.03
14.18
-64.46
-47.20
4.36E-03
14.73
-12.04
0.25
-100.71
35
-5.11
0.56
-64.50
23.07
14.25
169.26
-46.03
5.00E-03
-72.16
-13.67
0.21
6.05
36
-5.77
0.51
-136.84
22.91
13.97
48.13
-47.62
4.16E-03
-147.24 -8.21
0.39
-77.65
37
-10.68
0.29
144.16
24.12
16.07
-78.82
-50.37
3.03E-03
131.49
-7.25
0.43
-146.43
38
-32.53
0.02
70.22
23.59
15.11
148.85
-55.62
1.66E-03
37.70
-10.74
0.29
121.48
39
-16.09
0.16
123.23
23.65
15.23
12.30
-54.20
1.95E-03
-76.46
-15.37
0.17
-4.18
40
-29.19
0.03
44.21
20.79
10.95
-116.29
-43.80
6.46E-03
70.75
-13.01
0.22
-123.56
41
-13.30
0.22
-59.99
21.33
11.66
112.89
-44.57
5.91E-03
-75.57
-8.63
0.37
173.01
42
-11.59
0.26
149.87
20.57
10.68
-35.23
-43.90
6.39E-03
146.83
-6.41
0.48
75.90
43
-12.74
0.23
70.60
14.55
5.34
-173.04
-46.59
4.69E-03
7.19
-10.12
0.31
4.46
44
-10.80
0.29
4.51
12.27
4.10
48.86
-47.60
4.17E-03
-74.19
-15.97
0.16
-73.99
45
-7.28
0.43
-68.05
6.64
2.15
-95.90
-50.63
2.94E-03
175.00
-21.81
0.08
-64.83
46
-5.57
0.53
-149.37
-0.54
0.94
129.12
-45.96
5.04E-03
157.54
-11.06
0.28
-107.83
47
-5.11
0.56
128.69
-7.71
0.41
4.98
-43.66
6.56E-03
42.47
-7.63
0.42
164.84
48
-5.10
0.56
40.23
-14.75
0.18
-116.43
-47.75
4.10E-03
-27.21
-7.78
0.41
65.52
49
-5.16
0.55
-55.86
-21.51
0.08
127.74
-40.36
9.59E-03
-151.21 -7.59
0.42
-65.16
50
-4.69
0.58
-154.92
-33.07
0.02
27.73
-41.94
8.00E-03
170.09
0.55
-177.64
-5.13
Note:
1. Data obtained from 2.4-mm connecter based modules, and this data is including connecter loss, and board loss. The measurement reference plane
is at the RF connectors.
6
Biasing and Operation
Recommended quiescent DC bias condition for optimum
power and linearity performances is Vdd=5 volts with Vgg
(-1V) set for Idq=700 mA. Minor improvements in performance are possible depending on the application. The
drain bias voltage range is 3 to 5V. A single DC gate supply
connected to Vgg will bias all gain stages. Muting can be
accomplished by setting Vgg to the pinch-off voltage Vp
(-2V).
A typical DC bias configuration is shown in Figure 13. Vd3
may be biased from either side (Pin 3 or Pin 5). The RF
input and output ports are DC decoupled internally. No
ground wires are needed since ground connections are
made with plated through-holes to the backside of the
device.
100 pF > 0.1 µF
1
7
> 0.1 µF
100 pF
6
Note:
Vd3 may be biased
from either side.
3
8
RF_IN
Vgg
2
4
RF_OUT
> 0.1 µF
Vdd
5
100 pF
Figure 13. Schematic and recommended assemble example
Note: No RF performance degradation is seen due to ESD up to 250V HBM and 50V MM. The DC characteristics in general show increased leakage at
lower ESD discharge voltages. The user is reminded that this device is ESD sensitive and needs to be handled with all necessary ESD protocols.
7
AMMP-64xx Part Number Ordering Information
Part Number
Devices Per
Container
Container
AMMP-6442-BLKG
10
Antistatic bag
AMMP-6442-TR1G
100
7” Reel
AMMP-6442-TR2G
500
7” Reel
Package Dimension, PCB Layout and Tape and Reel information
Please refer to Avago Technologies Application Note 5521, AMxP-xxxx production Assembly Process (Land Pattern B).
For product information and a complete list of distributors, please go to our web site:
www.avagotech.com
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Data subject to change. Copyright © 2005-2013 Avago Technologies. All rights reserved.
AV02-2399EN - July 9, 2013