AVAGO APDS-9700-020

APDS-9700
Signal Conditioning IC for Optical Proximity Sensors
Data Sheet
Description
Features
APDS-9700 is a signal conditioning IC that enhances the
performance and robustness of the optical sensors used
for proximity or object detection.
x Low power consumption
APDS-9700 is a single chip solution that consists of a LED
driver circuit, sunlight cancellation and built-in LED stuck
high protection circuit integrated into a single chip. APDS9700 has artificial light immunity and is also operational
under the sun. Design flexibility is optimized as APDS9700 can be paired up with an integrated proximity sensor or discrete pair solution.
APDS-9700 can be disabled to maximize power savings
and battery life in applications such as portable or battery-operated devices. The LED current of the optical
proximity sensors can be configured to different levels
using a limiting resistor at the LEDA pin. APDS-9700 also
provides user flexibility to control the pulse width with
suitable burst rate, duty cycle and frequency that can reduce power consumption. These low power consumption features makes it also ideal for low power mobile and
handheld devices.
APDS-9700 is capable of operating at voltage supply ranging from 2.4 V to 3.6 V. APDS-9700 has two separate output pins for analog and digital outputs. This provides flexibility to use either the analog or digital output (or both)
depending on the requirements of the application.
The device is packaged in 8-pin QFN package measuring
0.55mm(H) x 2mm(W) x 2mm(L).
LED pulse width control
Low shut down current
External LED drive-current control
x Complete shutdown mode
x Supply voltage : 2.4 V to 3.6 V
x Operational in sunlight conditions up to 100klux(with
HSDL-9100)
x Artificial light immunity
x Analog & Digital output available
Built in hysteresis comparator for digital output
x LED stuck High protection
x Wide bandwidth Trans-impedance amplifier
x External capacitor and resistor for integration and gain
controls
x Flexibility to enhance detection distance up to 200mm
with HSDL-9100 or further with external discretes pair
x Small 2mm x 2mm QFN 8-pin package
x Design flexibility to pair with Avago Proximity Sensors
or discretes pair solution
x Lead-free & ROHS Compliant
Applications
x PDA and mobile phones
Ordering Information
x Portable and Handheld devices
Part Number
Package
Shipping Option
x Personal Computers/Notebooks
APDS-9700-020
Tape & Reel
2500
x Amusement/Games/Vending Machines
x Industrial Automation
Application Support Information
x Contactless Switches
The Application Engineering Group is available to assist
you with the application design associated with APDS9700 module. You can contact them through your local
sales representatives for additional details.
x Sanitary Automation
Absolute Maximum Ratings (Ta=25°C)
Parameter
Symbol
Min.
Max.
Units
Supply Voltage
VCC
0
4.5
V
Input Logic Voltage
Vi
0
4.5
V
260
°C
Reflow Soldering Temperature
Conditions
Recommended Operating Conditions
Parameter
Symbol
Min.
Max.
Units
Conditions
Operating Temperature
TA
-40
105
°C
Storage Temperature
Ts
-40
125
°C
Supply Voltage
VCC
2.4
3.6
V
Symbol
Minimum
Typical
Logic High Voltage, LEDON
VIH
1.6
Vcc
V
Logic High Voltage, ENB
VIH
1.4
Vcc
V
For Vcc = 2.4V
1.5
Vcc
V
For 2.4V <Vcc d 3V
1.7
Vcc
V
For 3V < Vcc d 3.6V
Electrical & Optical Specifications (Ta=25°C)
Parameters
Maximum Units
Conditions
Input
Logic Low Voltage, LEDON
VIL
0
0.3
V
Logic Low Voltage, ENB
VIL
0
0.3
V
Logic High Input Current, LEDON
IIH
0.1
1
uA
VI ≥ VIH
Logic High Input Current, ENB
IIH
0.1
1
μA
VI ≥ VIH
Logic Low Input Current, LEDON
IIL
0.1
1
μA
VI ≤ VIL
Logic Low Input Current, ENB
IIL
0.1
1
μA
VI ≤ VIL
Shutdown Current
ISD
0.3
1
μA
Vcc=3V, ENB=3V
Idle Current
Icc
500
650
μA
Vcc=3V, ENB=0V
0.3
V
IDOUT(Low) = 2mA, Vcc = 3V
Output
0
Digital Output
VOL
Rise Time(DOUT)
TR
1
us
Vcc = 3V, R2 = 10kΩ, Frequency = 10kHz
Fall Time(DOUT)
TF
1
us
Vcc = 3V, R2 = 10kΩ, Frequency = 10kHz
Rise Time (LEDA)
TR
40
ns
Vcc = 3V , ILED = 120mA, Freq = 10kHz
Fall Time (LEDA)
TF
40
ns
Vcc = 3V , ILED = 120mA, Freq = 10kHz
Max ILED Pulse Width
Max-PW
120
μs
Vcc=3V, ENB=0V
ILED Pulse Current
ILED
120
mA
Vcc=3V, R1 = 10Ω
Transmitter
2
300
Electrical & Optical Specification (continued)
Parameters
Symbol
Minimum
Typical
Maximum Units
Conditions
Photodiode input current (PD)
IPD
0
Current Gain
IPFiLT/IPD
20
times Vcc = 3V
Hysterisis
VHYS
40
mV
Vcc= 3.0V
Threshold voltage
V TH
655
mV
Vcc= 3.0V
IDC
100
μA
Vcc= 3.0V
Receiver
3
μA
Hysterisis Comparator
Sunlight Cancellation
DC Current, PD
APDS-9700 pin-out and I/O Configurations
PIN #1
CORNER
Pin 1
Pin 8
Pin 2
Pin 7
Pin 3
Pin 6
Pin 4
Pin 5
I/O Pins Configuration Table
Pin Symbol
Type
Description
1
LEDON
Digital
I/P
LED Driver Input
LEDA will turn off when LEDON is
stuck in high state for > Max-PW
2
ENB
Digital
I/P
Power Down Enable
ENB = 0 Normal mode operation
ENB = 1 Shut down mode
3
DOUT
Digital
O/P
Digital Output
An open drain output that requires
a pull-up resistor of recommended
value 10k Ω
DOUT = Low when VPFILT > V TH
DOUT = High when VPFILT < V TH
4
GND
Ground
Ground
5
PD
Analog
I/P
Photo-Detector Input Connect
to Cathode of photo-detector
(proximity sensor)
6
PFILT
Analog
O/P
Analog Output
Connect to integration circuit
(R3 & CX3)
7
LEDA
Analog
O/P
LED Driver Output
Connect to Anode of LED
(proximity sensor)
LEDA will turn off when LEDON is
stuck in high state for > Max-PW
8
VCC
Supply
Voltage Supply
Figure 1. APDS-9700 pin-out and I/O Configurations
3
Application Circuit for APDS-9700
VIO
R2
PWM/
GPIO
LEDON
1
8
Vcc
CX2
CX1
R1
ENB
GPIO
2
MCU
7
LEDA
APDS-9700
GPIO
DOUT
3
R3
6
PFILT
CX3
GND
ADC
4
5
PD
Avago
Proximity Sensor
Reflective Object
Figure 2. Typical Application Circuit for APDS-9700
Recommended Avago Proximity Sensor
Description
HSDL-9100
Integrated Reflective Proximity Sensor
Component
Recommended Values ( with HSDL-9100)
R1
10 Ω
R2
10k Ω
R3
100k Ω to 500k Ω
CX1
100 nF ± 20% X 7R, Ceramic,
CX2
6.8 μF ± 20%, Tantalum
CX3
3.3 nF ± 20% X 7R, Ceramic
4
APDS-9700 Block Diagram
(1) LEDON
(7) LEDA
Stuck High
Protection
Sunlight
Cancellation
R1
(5) PD
TIA
Avago
Proximity Sensor
V IO
PIN
(6) PFILT
R2
CX3
V-I CONVERTER
(2) ENB
(3) DOUT
Hysteresis
Comparator
(4) DOUT
Figure 3. APDS-9700 Block Diagram
5
LED
R3
APDS-9700 Typical Timing Waveforms
Vcc
ENB
>50ns
Burst Pulses
LEDON
>20μs
V TH
PFLIT
DOUT
Note:
Pulses at LEDON can only be activated at least 20us after ENB turn from high to low.
Figure 4. APDS-9700 Typical Timing Waveforms
6
APDS-9700 Performance Charts (Typical Conditions)
1.6
1.1
1.4
1
NORMALIZED ILED
NORMALIZED ILED
1.2
1
0.8
0.9
0.8
0.7
0.6
0.6
0.4
0.5
0.2
2.4
2.6
2.8
3
VCC (V)
3.2
3.4
-40
3.6
-20
0
20
40
60
80
100
TEMP(ºC)
Figure 5. Normalized ILED Vs Vcc (T=25 qC, R1=10Ω )
Figure 6. Normalized ILED VS Temp (VCC=3V,R1=10Ω)
1.1
0.7
Vcc=2.4V
Vcc=2.7V
0.6
Vcc=3V
0.5
TYPICAL ILED (A)
NORMALIZED ICC IDLE
1.05
1
Vcc=3.3V
Vcc=3.6V
0.4
0.3
0.2
0.95
0.1
0.9
2.4
0
2.6
2.8
3
VCC(V)
3.2
3.4
3.6
Figure 7. Normalized ICC Idle Vs Vcc (T=25qC)
2
1.02
1.15
1.01
NORMALIZED ICC IDLE
NORMALIZED ICC SD
5
6
RLED (-)
7
8
9
10
1.00
1.1
1.05
1
0.95
0.9
0.99
0.98
0.97
0.96
0.95
0.85
0.94
2.6
2.8
3
VCC(V)
Figure 9. Normalized ICC SD VS VCC (T=25qC)
7
4
Figure 8. ILED VS RLED (T=25qC)
1.2
0.8
2.4
3
3.2
3.4
3.6
0.93
-40
-20
0
20
40
TEMP(ºC)
Figure 10. Normalized ICC IDLE VS TEMP (VCC=3V)
60
80
100
APDS-9700 Package Dimensions
2
8
7
6
5
2
Marking Information
Pin #1 ID On Top
1
2
3
4
0.02
0.50
0.10
TOP VIEW
SIDE VIEW
1.20
0.28
0.40
2
3
4
8
7
6
5
0.60
0.7
1
0.35 X 45°
0.125 (x4)
0.25 (x8)
0.25 (x6)
BOTTOM VIEW
Dimensions in mm. Tolerance ±0.1mm
Figure 11. Package Outline Dimensions and land patterm
8
The unit is marked ‘YWW LL’ on the chip.
Y = Year (Last digit of the year)
WW = work week (1-54)
LL = Lot number (01-99)
Recommended Minimum Land pattern and Keep-out
Area
Keep-out Area Recommendations:
1. Area of Solder Land pattern = 2.3mm x 2.1mm
0.1
0.32
0.5
2. Module placement tolerance & keep out on each side
with no lead = 0.55mm & keep out on each side solder
lead = 0.8mm
0.25
0.22
R0
.17
5
2
0.22
3. Keep-out area = 3.9mm x 3.2mm
0.25
0.5
2
SOLDER LAND PATTERN
Dimension in mm. Tolerances +0.1mm
Figure 12. Recommended Minimum Land pattern and Keep-out Area
APDS-9700 Tape Dimensions
4.00 ± 0.10
2.00 ± .05
Ø 1.50 + .10
4.00 ± 0.10
1.75 ± 0.10
3.50 ± .05
.30
8.00 + .10
Ø 1.00 + 0.25
YWW
LLa
UNIT ORIENTATION
IN POCKET
.254 ± 0.02
5° MAX
5° MAX
2.30 ± 0.10
A.
Figure 13. APDS-9700 Tape Dimensions
9
0.75 ± 0.10
K.
2.30 ± 0.10
B.
ALL DIMENSIONS IN mm.
Reel Drawings
XXX-REPRESENTS SUPPLIERS’S
LOGO OR NAME (OPTION)
TEXT HEIGHT: 6.25mm HIGH
X 1.6mm WIDE (EMBOSSED LETTERS)
CL
1.5 MIN.
120º
+0.50
Ø13.00 -0.20
SEE DETAIL “ B”
SLOT 180º APART
(2 PLACES)
ø20.2 MIN.
FRONT SIDE
15º
R 10.65
DETAIL “B”
SCALE: 1:3
45º
14.40 MAX.
R 5.20
45º
EMBOSSED RIBS
RAISED 0.25mm
WIDTH 1.25mm
179.00 ±0.50
55.00 ±0.50
CL
ø51.20 ± 0.30
+1.50
8.40 -0.0
ø164.30 ± 0.30
BACK VIEW
ø179.00 ± 0.50
Figure 14. Reel Dimension Drawing
APDS-9700 Packaging
All APDS-9700 options are shipped in ESD proof package.
This part is compliant to JEDEC MSL1.
10
Recommended Storage Conditions
Storage
Temperature
The units in tape and reel are recommended
to be kept in a controlled climate
environment, with temp at 25 +5/-10°C and
relative humidity at 55 +/-15%.
Time from
unsealing to
soldering
This part is compliant to JEDEC MSL-1
(unlimited floor life at < 30’C / 85%RH)
Recommended Reflow Profile
MAX 260C
T - TEMPERATURE (°C)
255
R3
230
217
200
180
R2
R4
60 sec to 90 sec
Above 217 C
150
R5
R1
120
80
25
0
P1
HEAT
UP
50
100
150
200
P2
SOLDER PASTE DRY
P3
SOLDER
REFLOW
250
P4
COOL DOWN
300
t-TIME
(SECONDS)
Figure 15. Recommended Reflow Profile
The reflow profile is a straight-line representation of a
nominal temperature profile for a convective reflow solder process. The temperature profile is divided into four
process zones, each with different 'T/'time temperature
change rates or duration. The 'T/'time rates or duration
are detailed in the above table. The temperatures are
measured at the component to printed circuit board connections.
In process zone P1, the PC board and APDS-9700 pins are
heated to a temperature of 150°C to activate the flux in
the solder paste. The temperature ramp up rate, R1, is limited to 3°C per second to allow for even heating of both
the PC board and APDS-9700 pins.
Process zone P2 should be of sufficient time duration (100
to 180 seconds) to dry the solder paste. The temperature
is raised to a level just below the liquidus point of the solder, usually 200°C (392°F).
Process zone P3 is the solder reflow zone. In zone P3, the
temperature is quickly raised above the liquidus point of
For product information and a complete list of distributors, please go to our web site:
solder to 255°C (491°F) for optimum results. The dwell time
above the liquidus point of solder should be between 20
and 40 seconds. It usually takes about 20 seconds to assure proper coalescing of the solder balls into liquid solder
and the formation of good solder connections. Beyond a
dwell time of 40 seconds, the intermetallic growth within
the solder connections becomes excessive, resulting in
the formation of weak and unreliable connections. The
temperature is then rapidly reduced to a point below the
solidus temperature of the solder, usually 200°C (392°F),
to allow the solder within the connections to freeze solid.
Process zone P4 is the cool down after solder freeze. The
cool down rate, R5, from the liquidus point of the solder to
25°C (77°F) should not exceed 6°C per second maximum.
This limitation is necessary to allow the PC board and
APDS-9700 pins to change dimensions evenly, putting
minimal stresses on the APDS-9700.
It is recommended to perform reflow soldering no more
than twice.
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Data subject to change. Copyright © 2005-2010 Avago Technologies. All rights reserved.
AV02-0893EN - March 4, 2010