Data sheet Single Phase Synchronous Buck PWM Controller General Description Features The AP3586A/B/C is a compact synchronous -rectified buck controller specifically designed to operate from 5V or 12V supply voltage and deliver high-quality output voltage as low as 0.6V (AP3586A) or 0.8V (AP3586B/C). This device operates at fixed 300kHz (AP3586A/B) or 200kHz (AP3586C) frequency and provides an optimal level of integration to reduce size and cost of the power supply. • • • • • • • • • This controller integrates internal MOSFET drivers that support 12V+12V bootstrapped voltage for highefficiency power conversion. The bootstrap diode is built-in to simplify the circuit design and minimize external part count. • • • • • • • • • This controller provides single feedback loop, voltage-mode control with fast transient response. The error amplifier features a 10MHz gain-bandwidth product and 6V/µs slew rate which enables high converter bandwidth for fast transient performance. Other features include internal soft-start, under voltage protection, over current protection and shutdown function. With afore-mentioned functions, this part provides customers a compact, high efficiency, well-protected and cost-effective solutions. AP3586A/B/C Supply Voltage: 5V/12V VIN Input Range: 3.3V to 12V 0.6V/0.8V to 82% of VIN Output Range Internal Reference: 0.6V/0.8V Simple Single-loop Control Voltage-mode PWM Control Duty Cycle: 0% to 82% Fast Transient Response 10MHz High-bandwidth Error Amplifier with 6V/µs Slew Rate Fixed Oscillator Frequency: 300kHz/200kHz Lossless, Programmable Over Current Protection (Uses Lower MOSFET RDS(ON) ) Start-up into Pre-biased Load Built-in Thermal Shutdown Built-in Soft-start Over Current Protection Over Voltage Protection Under Voltage Protection Integrated Boot Diode Applications • • • • The AP3586A/B/C is available in SOIC-8 and PSOP-8 packages. • Subsystem Power Supplies PCI, AGP, Graphics Cards, Digital TV SSTL-2 and DDR/2/3 SDRAM Bus Termination Supply Cable Modems, Set Top Boxes, and DSL Modems Industrial Power Supplies and General Purpose Supplies SOIC-8/PSOP-8 Figure 1. Package Types of AP3586A/B/C Mar. 2012 Rev. 1. 1 BCD Semiconductor Manufacturing Limited 1 Data sheet Single Phase Synchronous Buck PWM Controller AP3586A/B/C Pin Configuration MP Package (PSOP-8) M Package (SOIC-8) 1 8 1 8 2 7 2 7 3 6 3 6 4 5 4 5 Figure 2. Pin Configuration of AP3586A/B/C (Top View) Pin Description Pin Number SOIC-8 PSOP-8 Pin Name 1 1 BOOT 2 2 UGATE 3 3 GND 4 4 LGATE/OCSET 5 5 VCC 6 6 FB 7 7 COMP/EN 8 8 PHASE 9 Exposed Pad Mar. 2012 Function Bootstrap pin. Connect a bootstrap capacitor from this pin to PHASE for creating a BOOT voltage suitable to drive a standard N-Channel MOSFET. Upper-gate drive pin. Connect this pin to the upper MOSFET gate providing the gate drive. This pin is monitored by the adaptive shoot-through protection circuitry to determine when the upper MOSFET has turned off. Ground for the IC. All voltage levels are measured with respect to this pin. Connect this pin directly to the low side MOSFET source and ground plane with the lowest impedance. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. Low-side Gate Driver Output and Over-Current Setting Input. This pin is the gate driver for low-side MOSFET. It is also used to set the maximum inductor current. Refer to the section in “Function Description” for detail. Bias supply pin. Provides a 5V or 12V bias supply for the chip from this pin. The pin should be bypassed with a capacitor to GND. Feedback pin. This pin is the inverting input of the internal error amplifier. Use FB pin, in combination with the COMP pin, to compensate the voltage control feedback loop of the converter. A resistor divider from output to GND is used to set the output voltage. Compensation and disable pin. This pin is the output of the Error Amplifier. Pull COMP pin low will shut down the IC. This pin connects to the source of the upper MOSFET and the drain of the lower MOSFET. This pin is also monitored by the adaptive shoot-through protection circuitry to determine when the upper MOSFET has turned off. Exposed Pad as ground pin. Rev. 1. 1 BCD Semiconductor Manufacturing Limited 2 Data sheet Single Phase Synchronous Buck PWM Controller AP3586A/B/C Functional Block Diagram 5 1 2 8 4 /OCSET /0.6V 6 3 7 /EN Figure 3. Functional Block Diagram of AP3586A/B/C Mar. 2012 Rev. 1. 1 BCD Semiconductor Manufacturing Limited 3 Data sheet Single Phase Synchronous Buck PWM Controller AP3586A/B/C Ordering Information AP3586 - Circuit Type G1: Green A: AP3586A B: AP3586B C: AP3586C Blank: Tube TR: Tape & Reel Package M: SOIC-8 MP: PSOP-8 Package Temperature Range SOIC-8 -40 to 85°C PSOP-8 Part Number Marking ID Packing Type AP3586AM-G1 3586AM-G1 Tube AP3586AMTR-G1 3586AM-G1 Tape & Reel AP3586BM-G1 3586BM-G1 Tube AP3586BMTR-G1 3586BM-G1 Tape & Reel AP3586CM-G1 3586CM-G1 Tube AP3586CMTR-G1 3586CM-G1 Tape & Reel AP3586AMP-G1 3586AMP-G1 Tube AP3586AMPTR-G1 3586AMP-G1 Tape & Reel AP3586BMP-G1 3586BMP-G1 Tube AP3586BMPTR-G1 3586BMP-G1 Tape & Reel AP3586CMP-G1 3586CMP-G1 Tube AP3586CMPTR-G1 3586CMP-G1 Tape & Reel BCD Semiconductor's Pb-free products, as designated with "G1" suffix in the part number, are RoHS compliant and green. Mar. 2012 Rev. 1. 1 BCD Semiconductor Manufacturing Limited 4 Data sheet Single Phase Synchronous Buck PWM Controller AP3586A/B/C Absolute Maximum Ratings (Note 1) Parameter Symbol Value Unit VCC -0.3 to 15 V BOOT Voltage VBOOT -0.3 to VPHASE +15 V UGATE to PHASE Voltage VUGATE -0.3 to 15 V PHASE, LGATE to GND Voltage VPHASE, VLGATE -1 to 15 V -0.3 to 6 V Supply Input Voltage Other Pin Voltage Power Dissipation PD TBD mW Thermal Resistance θJA 50 ºC/W Operating Junction Temperature TJ -40 to 125 ºC Storage Temperature TSTG -65 to 150 ºC Lead Temperature (Soldering, 10 sec) TLEAD 260 ºC ESD (Human Body Model) (Note 2) 2000 V ESD (Machine Model) (Note 2) 200 V Note 1: Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “Recommended Operating Conditions” is not implied. Exposure to “Absolute Maximum Ratings” for extended periods may affect device reliability. Note 2: Devices are ESD sensitive. Handling precaution is recommended. Recommended Operating Conditions Parameter Symbol Min Max Unit Supply Input Voltage VCC 5 12 V Operating Ambient Temperature TA -40 85 °C Mar. 2012 Rev. 1. 1 BCD Semiconductor Manufacturing Limited 5 Data sheet Single Phase Synchronous Buck PWM Controller AP3586A/B/C Electrical Characteristics VCC=12V, TA=25°C, unless otherwise specified. Parameter Symbol Conditions Min Typ Max Unit SUPPLY INPUT ICC Supply Current Quiescent Supply Current ICC_Q Power Input Voltage VIN UGATE and LGATE Open; Switching VFB=VREF+0.1V, No Switching Pins 5 mA 4 mA 3.0 13.2 V 4.4 V POWER ON RESET VCC Rising Threshold VPOR VCC Threshold Hysteresis VCC Rising 4.0 VPOR_HYS 4.2 500 mV OSCILLATOR fOSC Oscillator Frequency For AP3586A/B 270 300 330 kHz For AP3586C 180 200 220 kHz ∆VOSC Ramp Amplitude 1.4 VP-P 70 dB 10 MHz 6 V/µs ERROR AMPLIFIER GDC_OL Open Loop DC Gain Gain-bandwidth Product GBW Slew Rate SR 55 3 Transconductance 800 1100 µA/V Output Source Current VFB<VREF 80 120 µA Output Sink Current VFB>VREF 80 120 µA -1.0 A 1.5 A PWM CONTROLLER GATE DRIVERS Upper Current Gate Source Upper Gate Sink Current Upper Gate Resistance Lower Gate Current Sink IUG_SRC IUG_SNK VBOOT-VPHASE=12V, VBOOT-VUGATE=6V VBOOT-VPHASE=12V, VBOOT-VUGATE=6V RUGATE 50mA Source Current 2 ILG_SRC VCC-VLGATE=6V -1 A Lower Gate Sink Current ILG_SNK VLGATE=6V 1.5 A Lower Gate Resistance RLGATE 50mA Source Current 1 VPHASE<1.2V to VLGATE>1.2V 50 ns VLGATE<1.2V to (VUGATE-VPHASE)>1.2V 50 ns Source Sink PHASE Falling to LGATE Rising Delay LGATE Falling to UGATE Rising Delay Mar. 2012 Rev. 1. 1 4 2 Ω Ω BCD Semiconductor Manufacturing Limited 6 Data sheet Single Phase Synchronous Buck PWM Controller AP3586A/B/C Electrical Characteristics (Continued) VCC=12V, TA=25ºC, unless otherwise specified. Parameter Symbol Conditions Min Minimum Duty Cycle Typ Max 0 Maximum Duty Cycle Unit % 75 82 89 % AP3586A 0.591 0.6 0.609 V AP3586B/C 0.788 0.8 0.812 V 10 50 nA 0.4 0.5 V REFERENCE VOLTAGE Feedback Voltage VFB Feedback Bias Current IFB VFB=5V PROTECTION Under Voltage Protection VFB_UVP Over Voltage Protection VFB_OVP OC Current Source Built-in Maximum OCP Voltage Soft-start Interval Enable Threshold 0.3 1.1 IOPS 19.5 VOCP_MAX tSS 21.5 V 23.5 0.3 AP3586A 2 AP3586B 2.7 AP3586C 3.6 VCOMP/EN 0.25 0.30 µA V ms 0.35 V Thermal Shutdown TOTSD 160 ºC Thermal Shutdown Hysteresis THYS 20 ºC Mar. 2012 Rev. 1. 1 BCD Semiconductor Manufacturing Limited 7 Data sheet Single Phase Synchronous Buck PWM Controller AP3586A/B/C Typical Performance Characteristics 4 1.0 Output Voltage Variation (%) Output Voltage Variation (%) 3 VOUT= 1.2V 0.5 0.0 -0.5 VOUT= 1.2V 2 1 0 -1 -2 -3 -4 -1.0 5 6 7 8 9 10 11 12 0 13 2 4 6 Input Voltage (V) 320 320 315 315 310 310 305 300 295 290 285 280 12 14 16 18 20 12 13 14 305 300 295 290 285 280 275 275 270 -20 0 20 40 60 80 100 4 120 5 6 7 8 9 10 11 Input Voltage (V) o Temperature ( C) Figure 6. Switching Frequency vs. Temperature Mar. 2012 10 Figure 5. Load Regulation Switching Frequency (kHz) Switching Frequency (kHz) Figure 4. Line Regulation 270 -40 8 Output Current (A) Figure 7. Switching Frequency vs. Input Voltage Rev. 1. 1 BCD Semiconductor Manufacturing Limited 8 Data sheet Single Phase Synchronous Buck PWM Controller AP3586A/B/C 0.810 0.810 0.808 0.808 0.806 0.806 Reference Voltage (V) Reference Voltage (V) Typical Performance Characteristics (Continued) 0.804 0.802 0.800 0.798 0.796 0.804 0.802 0.800 0.798 0.796 0.794 0.794 0.792 0.792 0.790 -40 0.790 -20 0 20 40 60 80 100 4 120 Figure 8. Reference Voltage vs. Temperature 6 7 8 9 10 11 12 13 14 Figure 9. Reference Voltage vs. Input Voltage VIN 10V/div IL 5A/div VOUT 0.5V/div VCOMP 0.5V/div VOUT 0.5V/div VCOMP 1V/div VLGATE 5V/div VLGATE 20V/div Time 2ms/div Time 1ms/div Figure 10. Power-on Waveform (VIN=12V, VOUT=1.2V, IOUT=0A) Mar. 2012 5 Input Voltage (V) o Temperature ( C) Figure 11. Enable Waveform (VIN=12V, VOUT=1.2V, IOUT=0A) Rev. 1. 1 BCD Semiconductor Manufacturing Limited 9 Data sheet Single Phase Synchronous Buck PWM Controller AP3586A/B/C Typical Performance Characteristics (Continued) VOUT_AC 50mV/div VOUT_AC 50mV/div IOUT 2A/div IOUT 5A/div Time 20µs/div Time 20µs/div Figure 12. Load Transient Response (VIN=12V, VOUT=1.2V, IOUT=0A to 10A) Figure 13. Load Transient Response (VIN=12V, VOUT=1.2V, IOUT=0A to 20A) VIN 10V/div VOUT 1V/div VUGATE 10V/div VLGATE 20V/div VFB 0.5V/div VCOMP 1V/div VLGATE 5V/div IL 10A/div Time 20ms/div Time 10ms/div Figure 15. Under Voltage Protection (VIN=12V, VOUT=1.2V, IOUT=20A) Figure 14. Over Current Protection (VIN=12V, VOUT=1.2V, IOUT=20A) Mar. 2012 Rev. 1. 1 BCD Semiconductor Manufacturing Limited 10 Data sheet Single Phase Synchronous Buck PWM Controller AP3586A/B/C Typical Application Figure 16. Typical Application Circuit of AP3586A/B/C Mar. 2012 Rev. 1. 1 BCD Semiconductor Manufacturing Limited 11 Data sheet Single Phase Synchronous Buck PWM Controller AP3586A/B/C Function Description from power supply input VIN during turn-on (Referring to the Functional Block Diagram). The error amplifier is a three-input device. Reference voltage VREF or the internal soft start voltage SS whichever is smaller dominates the behavior of the non-inverting inputs of the error amplifier. SS internally ramps up to 0.6V in 2ms for AP3586A (to 0.8V in 2.7ms for AP3586B; to 0.8V in 3.6ms for AP3586C) after the soft start cycle is initiated. The ramp is created digitally, so there will be 100 small discrete steps. Accordingly, the output voltage will follow the SS signal and ramp up smoothly to its target level. The AP3586A/B/C is a voltage-mode single phase synchronous buck controller with embedded MOSFET drivers. This part provides complete protection functions such as over voltage protection, under voltage protection and over current protection. Inductor current information is sensed by RDS(ON) of the low side MOSFET. The over current protection threshold can be simply programmed by a resistor. Power on Reset and Chip Enable A power on reset (POR) circuitry continuously monitors the supply voltage at VCC pin. Once the rising POR threshold is exceeded, the AP3586A/B/C sets itself to active state and is ready to accept chip enable command. The rising POR threshold is typically 4.2V at VCC rising. The SS signal keeps ramping up after it exceeds the internal 0.6V (0.8V for AP3586B/C) reference voltage. However, the internal 0.6V(0.8V for AP3586B/C) reference voltage takes over the behavior of error amplifier after SS>VREF. When the SS signal climbs to its ceiling voltage (4.2V), AP3586A/B/C claims the end of soft start cycle and enables the under voltage protection of the output voltage. The COMP/EN is a multifunctional pin: control loop compensation and chip enable as shown in Figure 17. An Enable Comparator monitors the COMP/EN pin voltage for chip enable. A signal level transistor is adequate to pull this pin down to ground and shut down AP3586. A 120µA current source charges the external compensation network with 0.45V ceiling when this pin is released. If the voltage at COMP/EN pin exceeds 0.3V, the AP3586A/B/C initiates its soft start cycle. Figure 18 shows a typical start up interval for AP3586A/B/C where the COMP/EN pin has been released from a grounded (system shutdown) state. The internal 120µA current source starts charge the compensation network after the COMP/EN pin is released from ground at T1. The COMP/EN exceeds 0.3V and enables the AP3586A/B/C at T2. The COMP/EN continues ramping up the stays at 0.45V before the SS starts ramping at T3. The output voltage follows the internal SS and ramps up to its final level during T3 and T4. At T4, the reference voltage VREF takes over the behavior of the error amplifier as the internal SS crosses VREF. The internal SS keeps ramping up and stays at 4.2V at T5, where AP3586A/B/C asserts the end of soft start cycle. The 120µA current source keeps charging the COMP pin to its ceiling until the feedback loop boosts the COMP pin higher than 0.45V according to the feedback signal. The current source is cut off when VCOMP is higher than 0.45V during normal operation. Figure 17. Chip Enable Function Soft Start A built-in Soft Start is used to prevent surge current Mar. 2012 Rev. 1. 1 BCD Semiconductor Manufacturing Limited 12 Data sheet Single Phase Synchronous Buck PWM Controller AP3586A/B/C Function Description (Continued) following equation: VIN 10V/Div I LIMIT = VOUT 0.5V/Div Because the RDS(ON) of MOSFET increases with temperature, it is necessary to take this thermal effect into consideration in calculating OCP point. COMP 0.5V/Div When OCP is triggered, both UGATE and LGATE will go low to stop the energy transfer to the load. Controller will try to restart in a hiccupped way. Figure 20 shows the hiccupped over current protection. Only four times of hiccup is allowed in over current protection. If over current condition still exists after four times of hiccup, controller will be latched. LGATE 10V/Div 1ms/Div Figure 18. Soft Start Behavior of AP3586A/B/C Power Input Detection The AP3586A/B/C detects PHASE voltage for the present of power input VIN when UGATE turns on the first time. If the PHASE voltage does not exceed 2.0V when UGATE turns on, AP3586A/B/C asserts that VIN is not ready and stops the soft start cycle. However, the internal SS continues ramping up to VDD. Another soft start is initiated after SS ramps up to VDD. The hiccup period is about 1ms. Figure 19 shows the start-up waveform where VIN does not present initially. Figure 20. Hiccupped Over Current Protection Over Voltage Protection (OVP) The feedback voltage is continuously monitored for over voltage protection. When OVP is triggered, LGATE will go high and UGATE will go low to discharge the output capacitor. VIN 10V/Div The AP3586A/B/C provides full-time over voltage protection whenever soft start completes or not. The typical OVP threshold is 137.5% of the internal reference voltage VREF. AP3586A/B/C provides non-latched OVP. The controller will return to normal operation if over voltage condition is removed. VOUT 0.5V/Div LGATE 10V/Div IL 10A/Div Under Voltage Protection (UVP) The feedback voltage is also monitored for under voltage protection. The under voltage protection has 15µs triggered delay. When UVP is triggered, both UGATE and LGATE will go low. Unlike OCP, UVP is not a latched protection; controller will always try to restart in a hiccupped way. 1ms/Div Figure 19. Soft Start Where VIN Does Not Present Initially Over Current Protection (OCP) A resistor ROCSET connected from LGATE pin sets the threshold. An internal current source IOC(21.5µA typically), flowing through ROCSET determines the OCP trigger point, which can be calculated using the Mar. 2012 2 × I OCSET × R OCSET R DS(ON) of the low side MOSFET Thermal Shutdown If the junction temperature of the device reaches the thermal shutdown limit of 160°C, the PWM and the Rev. 1. 1 BCD Semiconductor Manufacturing Limited 13 Data sheet Single Phase Synchronous Buck PWM Controller AP3586A/B/C Function Description (Continued) 1) oscillator are turned off and UGATE and LGATE are driven low, turning off both MOSFETs. When the junction cools to the required level (140°C nominal), the PWM initiates soft start as during a normal power-up cycle. Output Voltage Selection The output voltage can be programmed to any level between the 0.6V internal reference (0.8V for AP3586B/C) to the 82% of VIN supply. The lower limitation of output voltage is caused by the internal reference. The upper limitation of the output voltage is caused by the maximum available duty cycle (82%). This is to leave enough time for over-current detection. Output voltage out of this range is not allowed. 2) A voltage divider sets the output voltage (Refer to the typical application circuit). In real applications, choose R1 in 100Ω to 10kΩ range and choose appropriate R2 according to the desired output voltage. VOUT = 0.6V × VOUT = 0.8V × R1 + R2 R2 R1 + R2 R2 3) 4) AP3586A AP3586B/C 5) PCB Layout Considerations High speed switching and relatively large peak currents in a synchronous-rectified buck converter make the PCB layout a very important part of design. Switching current from one power device to another can generate voltage spikes across the impedances of the interconnecting bond wires and circuit traces. The voltage spikes can degrade efficiency and radiate noise, that results in over-voltage stress on devices. Careful component placement layout a printed circuit design can minimize the voltage spikes induced in the converter. 6) Follow the below layout guidelines for optimal performance of AP3586A/B/C. Mar. 2012 Rev. 1. 1 The turn-off transition of the upper MOSFET prior to turn-off, the upper MOSFET was carrying the full load current. During turn-off, current stops flowing in the upper MOSFET and is picked up by the low side MOSFET. Any inductance in the switched path generates a large voltage spike during the switching interval. Careful component selections, layout of the critical components, and use shorter and wider PCB traces help in minimizing the magnitude of voltage spikes. The power components and the PWM controller should be placed firstly. Place the input capacitors, especially the high-frequency ceramic decoupling capacitors, close to the power switches. Place the output inductor and output capacitors between the MOSFETs and the load. Also locate the PWM controller near MOSFETs. Use a dedicated grounding plane and use vias to ground all critical components to this layer. Use an immediate via to connect the component to ground plane including GND of AP3586A/B/C. Apply another solid layer as a power plane and cut this plane into smaller islands of common voltage levels. The power plane should support the input power and output power nodes. Use copper filled polygons on the top and bottom circuit layers for the PHASE node. The PHASE node is subject to very high dV/dt voltages. Stray capacitance between this island and the surrounding circuitry tend to induce current spike and capacitive noise coupling. Keep the sensitive circuit away from the PHASE node and keep the PCB area small to limit the capacitive coupling. However, the PCB area should be kept moderate since it also acts as main heat convection path of the lower MOSFET. The PCB traces between the PWM controller and the gate of MOSFET and also the traces connecting source of MOSFETs should be sized to carry 2A peak currents. BCD Semiconductor Manufacturing Limited 14 Data sheet Single Phase Synchronous Buck PWM Controller AP3586A/B/C Mechanical Dimensions SOIC-8 4.700(0.185) 5.100(0.201) 7° Unit: mm(inch) 0.320(0.013) 1.350(0.053) 1.750(0.069) 8° 8° 7° 0.675(0.027) 0.725(0.029) D 5.800(0.228) 1.270(0.050) 6.200(0.244) TYP D 20:1 0.800(0.031) 0.300(0.012) R0.150(0.006) 0.100(0.004) 0.200(0.008) 0° 8° 1.000(0.039) 3.800(0.150) 4.000(0.157) 0.330(0.013) 0.190(0.007) 0.250(0.010) 1° 5° 0.510(0.020) 0.900(0.035) R0.150(0.006) 0.450(0.017) 0.800(0.031) Note: Eject hole, oriented hole and mold mark is optional. Mar. 2012 Rev. 1. 1 BCD Semiconductor Manufacturing Limited 15 Data sheet Single Phase Synchronous Buck PWM Controller AP3586A/B/C Mechanical Dimensions (Continued) Unit: mm(inch) 3.202(0.126) 3.402(0.134) PSOP-8 Mar. 2012 Rev. 1. 1 BCD Semiconductor Manufacturing Limited 16 BCD Semiconductor Manufacturing Limited http://www.bcdsemi.com IMPORTANT NOTICE IMPORTANT NOTICE BCD Semiconductor BCD Semiconductor Manufacturing Manufacturing Limited Limited reserves reserves the the right right to to make make changes changes without without further further notice notice to to any any products products or or specifispecifications herein. cations herein. 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